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Copy pathati9200_pllfix.diff
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ati9200_pllfix.diff
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--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -243,7 +243,8 @@ void radeon_get_clock_info(struct drm_device *dev)
if (rdev->family >= CHIP_R420) {
p1pll->pll_in_min = 100;
p1pll->pll_in_max = 1350;
- p1pll->pll_out_min = 20000;
+ //p1pll->pll_out_min = 20000;
+ p1pll->pll_out_min = 4308;
p1pll->pll_out_max = 50000;
p2pll->pll_in_min = 100;
p2pll->pll_in_max = 1350;
@@ -252,7 +253,8 @@ void radeon_get_clock_info(struct drm_device *dev)
} else {
p1pll->pll_in_min = 40;
p1pll->pll_in_max = 500;
- p1pll->pll_out_min = 12500;
+ //p1pll->pll_out_min = 12500;
+ p1pll->pll_out_min = 4308;
p1pll->pll_out_max = 35000;
p2pll->pll_in_min = 40;
p2pll->pll_in_max = 500;
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -744,7 +744,8 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
/* pixel clocks */
p1pll->reference_freq = RBIOS16(pll_info + 0xe);
p1pll->reference_div = RBIOS16(pll_info + 0x10);
- p1pll->pll_out_min = RBIOS32(pll_info + 0x12);
+ //p1pll->pll_out_min = RBIOS32(pll_info + 0x12);
+ p1pll->pll_out_min = 4308;
p1pll->pll_out_max = RBIOS32(pll_info + 0x16);
p1pll->lcd_pll_out_min = p1pll->pll_out_min;
p1pll->lcd_pll_out_max = p1pll->pll_out_max;