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spec.txt
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spec.txt
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_____ ____ _____ _ __ _
/ ___// __ \/ ___/ (_)____ / /_ ____ _____(_)___ ____ _
\__ \/ / / /\__ \ / / ___/ / __ \/ __ \/ ___/ / __ \/ __ `/
___/ / /_/ /___/ / / (__ ) / /_/ / /_/ / / / / / / / /_/ /
/____/\____//____/ /_/____/ /_.___/\____/_/ /_/_/ /_/\__, /
virtual machine /____/
Table of contents:
* Summary
* Instruction length
* Instruction set
* Opcode table
* ALU flags
* Values table
* Startup
=== Summary ====================================================================
* 32-bit architecture
* numbers are stored in two's complement
* big endian
* registers:
* 16 general use registers: R0 .. R15
* loop counter: LC
* stack pointer: SP
* program counter: PC
In this document, anything within [brackets] is shorthand for "the value of the
RAM at the location of the value inside the brackets". For example, SP register
is "stack pointer", but [SP] means the value of the RAM at the location the
stack pointer is pointing to.
=== Instruction length =========================================================
MOV a b, when b is a number is 64 bits long.
All remaining instructions are 32 bits long.
Opcode: 8 bits
Value A: 8 bits
Value B: 8 bits
Value C: 8 bits
Value D: 32 bits
----------------
Total: 64 bits
OOAABBCC
DDDDDDDD
=== Instruction set ============================================================
--- Instructions table -----------------------------------------------+--------+
opcode | instruction | description | length |
-------+-------------+------------------------------------------------+--------+
0x00 | NOP | no operation | 32 |
0x01 | HCF | halt | 32 |
- - - -+- - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - + - - - -+
0x02 | MOV a b | sets a to value of b when b is number, | 32/64 |
| | sets a to b otherwise | |
0x03 | ADD a b | sets a to a + b | 32 |
0x04 | SUB a b | sets a to a - b | 32 |
0x05 | MUL a b | sets a to a * b | 32 |
0x06 | IMUL a b | sets a to a * b (signed only) | 32 |
0x07 | DIV a b | sets a to a / b | 32 |
0x08 | IDIV a b | sets a to a / b (signed only) | 32 |
0x09 | MOD a b | sets a to a % b | 32 |
0x0A | IMOD a b | sets a to a % b (signed only) | 32 |
0x0B | INC a | sets a to a + 1 | 32 |
0x0C | DEC a | sets a to a - 1 | 32 |
0x0D | SAR a b | sets a to a >> b (sign bit preserved) | 32 |
0x0E | SAL a b | sets a to a << b | 32 |
| SHL a b | | |
0x0F | SHR a b | sets a to a >> b | 32 |
0x10 | AND a b | sets a to a & b | 32 |
0x11 | OR a b | sets a to a | b | 32 |
0x12 | XOR a b | sets a to a ^ b | 32 |
0x13 | NOT a | negates a, and stores the result in a | 32 |
- - - -+- - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - + - - - -+
0x14 | PUSH a | push a to stack | 32 |
0x15 | POP a | pop value from stack and set a to it | 32 |
- - - -+- - - - - - -+- - - - - - - - - - - - - - - - - - - - - - - - + - - - -+
0x16 | JMP addr | sets PC the memory address of label addr | 32 |
0x17 | JMR a | adds value of a to PC | 32 |
0x18 | CMP a b | compares a with b and sets flags | 32 |
0x19 | JZ addr | executes "JMP addr" if ZERO flag is set | 32 |
0x1A | JNZ addr | executes "JMP addr" if ZERO flag isn't set | 32 |
0x1B | JB addr | executes "JMP addr" if BELOW flag is set | 32 |
0x1C | JNB addr | executes "JMP addr" if BELOW flag isn't set | 32 |
0x1D | JL addr | executes "JMP addr" if LOWER flag is set | 32 |
0x1E | JNL addr | executes "JMP addr" if LOWER flag isn't set | 32 |
0x1F | JA addr | executes "JMP addr" if ABOVE flag is set | 32 |
0x20 | JNA addr | executes "JMP addr" if ABOVE flag isn't set | 32 |
0x21 | JG addr | executes "JMP addr" if GREATER flag is set | 32 |
0x22 | JNG addr | executes "JMP addr" if GREATER flag isn't set | 32 |
0x23 | JO addr | executes "JMP addr" if OVERFLOW flag is set | 32 |
0x24 | JNO addr | executes "JMP addr" if OVERFLOW flag isn't set | 32 |
0x25 | JC addr | executes "JMP addr" if CARRY flag is set | 32 |
0x26 | JNC addr | executes "JMP addr" if CARRY flag isn't set | 32 |
0x27 | LOOP addr | executes "JMP addr" and "DEC LC" if LC > 0 | 32 |
0x28 | CALL addr | executes "PUSH PC" and "JMP addr" | 32 |
0x29 | RET | executes "PULL PC" and "INC PC" | 32 |
-------+-------------+------------------------------------------------+--------+
--- ALU flags ------------------------------------------------------------------
flag | description
---------+----------------------------------------------------------------------
ZERO | set by CMP if a = b
BELOW | set by CMP if a < b
LOWER | set by CMP if a < b (signed only)
ABOVE | set by CMP if a > b
GREATER | set by CMP if a > b (signed only)
OVERFLOW | set by ADD, SUB, IMUL, INC and DEC
| if 31-bits limit is exceeded (signed carry)
CARRY | set by ADD, SUB, MUL, INC, DEC, SAL and SHL
| if 32-bits limit is exceeded (unsigned carry)
---------+----------------------------------------------------------------------
--- Values table ---------------------------------------------------------------
value | description
------------+-------------------------------------------------------------------
0x00 - 0x0F | register (R0 .. R15)
0x10 | loop counter
0x11 | stack pointer
0x12 | program counter
0x80 - 0x8F | [register]
0x90 | [loop counter]
0x91 | [stack pointer]
0x92 | [program counter]
------------+-------------------------------------------------------------------
=== Startup ====================================================================
All registers are set to 0x00000000 when the CPU starts.