Hardware

Logic Gates
- Nand (2 relays)
- Invert (1 nand gate)
- And (2 nand gates)
- Or (3 nand gates)
- Xor (4 nand gates)
Arithmetics
- Half Adder (5 nand gates)
- Full Adder (9 nand gates)
- Multi-bit Adder (18 nand gates)
- Increment (145 nand gates)
- Subtraction (161 nand gates)
- Equal to Zero (10 nand gates)
- Less than Zero
Switching
- Selector (4 nand gates)
- Switch (4 nand gates)
Arithmetic Logic Unit
- Logic Unit (X nand gates)
- Arithmetic Unit (X nand gates)
- ALU
- Condition (X nand gates)
Memory
- Latch (4 nand gates)
- Data Flip-Flop (10 nand gates)
- Register (20 nand gates)
- Counter (370 nand gates)
- RAM (388 nand gates)
Processor
- Combined Memory (240 + 79104 nand gates)
- Instruction (X nand gates)
- Control Unit (1162 + 79104 nand gates)
- Computer (1492 + 79104 nand gates)
- Input and Output (66 nand gates)

Logic Gates

Nand

Relay (Default on)

x y x < y

0 0 0

0 1 1

1 0 0

1 1 0

graph BT;
    X((X))-->R(Relay);
    Y((Y))-->R;
    R-->O((out))

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relay1 fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X, in1
	class Y, in2
	class O, out1
    class R relay1
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0 stroke:blue,color:blue
	linkStyle 1 stroke:red,color:red
	linkStyle 2 stroke:red,color:red

Loading

y x y < x

0 0 0

1 0 0

0 1 1

1 1 0

graph BT;
    Y((Y))-->R(Relay);
    X((X))-->R;
    R-->O((out))

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relay1 fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class Y, in1
	class X, in2
	class O, out1
    class R relay1
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0 stroke:blue,color:blue
	linkStyle 1 stroke:red,color:red
	linkStyle 2 stroke:red,color:red

Loading

x 1 !x

0 1 1

0 1 1

1 1 0

1 1 0

graph BT;
    X((X))-->R(Relay);
    One((1))-->R;
    R-->O((out))

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relay1 fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X, in1
	class One, in2
	class O, out1
    class R relay1
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0 stroke:blue,color:blue
	linkStyle 1 stroke:red,color:red
	linkStyle 2 stroke:red,color:red

Loading

y 1 !y

0 1 1

0 1 0

1 1 1

1 1 0

graph BT;
    Y((Y))-->R(Relay);
    One((1))-->R;
    R-->O((out))

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relay1 fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class Y, in1
	class One, in2
	class O, out1
    class R relay1
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0 stroke:blue,color:blue
	linkStyle 1 stroke:red,color:red
	linkStyle 2 stroke:red,color:red

Loading

Relay (Default off)

x y x & y

0 0 0

0 1 0

1 0 0

1 1 1

graph BT;
    X((X))-->R(Relay);
    Y((Y))-->R;
    R-->O((out))

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relay1 fill:#f66,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X, in1
	class Y, in2
	class O, out1
    class R relay1
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0 stroke:blue,color:blue
	linkStyle 1 stroke:red,color:red
	linkStyle 2 stroke:grey,color:grey

Loading

Solutions:

!( !y < x )

y	1	→	!y	x	→	r < x	1	→	!r
0	1	→	1	0	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

graph LR;
	Y((Y))--0\n1\n0\n1-->R1(Relay);
	One((1))--1\n1\n1\n1-->R1;
    X((X))--0\n0\n1\n1--->R2(Relay);
    R1--1\n0\n1\n0-->R2;
    R2--0\n0\n0\n1-->R3(Relay);
    R3--1\n1\n1\n0-->O((out));
	One((1))--1\n1\n1\n1-->R3;

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relayDefOn fill:#f66,stroke:#000,stroke-width:2px;
    classDef relayDefOff fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X in1
    class Y in1
    class One in2
    class O out1
    class R1,R2,R3 relayDefOff
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0,2 stroke:blue,color:black
	linkStyle 1,3,5,6 stroke:red,color:black,stroke-dasharray:8 3
	linkStyle 4 stroke:violet,color:black
	linkStyle 5 stroke:red,color:black

Loading

!( !x < y )

x	1	→	!x	y	→	r < y	1	→	!r
0	1	→	1	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

graph LR;
	X((X))--0\n0\n1\n1-->R1(Relay);
	One((1))--1\n1\n1\n1-->R1;
    Y((Y))--0\n1\n0\n1--->R2(Relay);
    R1--1\n1\n0\n0-->R2;
    R2--0\n0\n0\n1-->R3(Relay);
    R3--1\n1\n1\n0-->O((out));
	One((1))--1\n1\n1\n1-->R3;

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relayDefOn fill:#f66,stroke:#000,stroke-width:2px;
    classDef relayDefOff fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X in1
    class Y in1
    class One in2
    class O out1
    class R1,R2,R3 relayDefOff
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0,2 stroke:blue,color:black
	linkStyle 1,3,6 stroke:red,color:black,stroke-dasharray:8 3
	linkStyle 4 stroke:violet,color:black
	linkStyle 5 stroke:red,color:black

Loading

!( x & y )

x	y	→	x & y	1	→	!r
0	0	→	0	1	→	1
0	1	→	0	1	→	1
1	0	→	0	1	→	1
1	1	→	1	1	→	0

graph LR;
	X((X))--0\n0\n1\n1-->R1(Relay);
    Y((Y))--0\n1\n0\n1-->R1(Relay);
    R1--1\n1\n1\n0-->R2(Relay);
	One((1))--1\n1\n1\n1-->R1;
	One((1))--1\n1\n1\n1-->R2;
    R2--1\n1\n1\n0-->O((out));

	classDef in1 fill:#333,stroke:#000,stroke-width:2px,color:#55f,font-size:120%;
    classDef in2 fill:#333,stroke:#000,stroke-width:2px,color:#f55,font-size:120%;
    classDef out1 fill:#333,stroke:#000,stroke-width:2px,color:#aaa,font-size:90%;
    classDef relayDefOn fill:#f66,stroke:#000,stroke-width:2px;
    classDef relayDefOff fill:#66f,stroke:#000,stroke-width:2px;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X in1
    class Y in1
    class One in2
    class O out1
    class R2,R3 relayDefOff
    class R1 relayDefOn
	class I inv
	linkStyle default stroke-width:2px,fill:none,stroke:grey
	linkStyle 0,1 stroke:blue,color:black
	linkStyle 3,4 stroke:red,color:black,stroke-dasharray:8 3
	linkStyle 2 stroke:green,color:black
	linkStyle 5 stroke:red,color:black

Loading

Invert

x	out
0	1	!x
1	0

not(x) → x nand x

graph LR;
    X((X))--0\n1-->N(NAND);
    X-->N;
    N--1\n0-->O((out))
	classDef in1 fill:#ffff80ff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef out1 fill:#aeff73ff,stroke:#000,stroke-width:2px,font-size:90%;
    classDef nand fill:#222,stroke:#000,stroke-width:2px,color:#fff;
    class X, in1
	class O, out1
    class N nand
	linkStyle default stroke:red,color:black,stroke-width:2px,fill:none,stroke-head:red

Loading

And

x	y	out
0	0	0
0	1	0
1	0	0
1	1	1	x & y

x and y → (x nand y) nand (x nand y) → inv(x nand y)

graph LR;
    X((X))--0\n0\n1\n1-->N(NAND);
    Y((Y))--0\n1\n0\n1-->N;
    N--1\n1\n1\n0-->I{{Invert}};
	I--0\n0\n0\n1-->O((out))

	classDef in1 fill:#ffff80ff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef in2 fill:#00ffffff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef out1 fill:#aeff73ff,stroke:#000,stroke-width:2px,font-size:90%;
    classDef nand fill:#222,stroke:#000,stroke-width:2px,color:#fff;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X, in1
	class Y, in2
	class O, out1
    class N nand
	class I inv
	linkStyle default stroke:red,color:black,stroke-width:2px,fill:none

Loading

Scheme

Or

x	y	out
0	0	0
0	1	1	!x & y
1	0	1	x & !y
1	1	1	x & y

(not(x) and y) or (x and not(y)) or (x and y) → (x nand x) nand (y nand y) → inv(x) nand inv(y)

graph LR;
    X((X))--0\n0\n1\n1-->I1{{Invert}}
	I1--1\n1\n0\n0-->N(NAND)
    Y((Y))--0\n1\n0\n1-->I2{{Invert}}
	I2--1\n0\n1\n0-->N(NAND)
    N--0\n1\n1\n1-->O((out))

	classDef in1 fill:#ffff80ff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef in2 fill:#00ffffff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef out1 fill:#aeff73ff,stroke:#000,stroke-width:2px,font-size:90%;
    classDef nand fill:#222,stroke:#000,stroke-width:2px,color:#fff;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    class X in1
	class Y in2
	class O out1
    class N nand
	class I1,I2 inv
	linkStyle default stroke:red,color:black,stroke-width:2px,fill:none

Loading

Base gates

Xor

x	y	out
0	0	0
0	1	1	!x & y
1	0	1	x & !y
1	1	0

Solution #1 (not(x) and y) or (x and not(y)) → ((x nand y) nand x) nand ((x nand y) nand y)

graph LR;
    X((X))--->N1([NAND])
    Y((Y))--0\n1\n0\n1--->N2([NAND])
    X((X))--0\n0\n1\n1--->N2
    Y((Y))--->N3([NAND])
	N2--1\n1\n1\n0-->N1
	N2--1\n1\n1\n0-->N3
	N1--1\n1\n0\n1-->N4([NAND])
	N3--1\n0\n1\n1-->N4
    N4--0\n1\n1\n0-->O((out))

	classDef in1 fill:#ffff80ff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef in2 fill:#00ffffff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef out1 fill:#aeff73ff,stroke:#000,stroke-width:2px,font-size:90%;
    classDef nand fill:#222,stroke:#000,stroke-width:2px,color:#fff;
    class X in1
	class Y in2
	class O out1
    class N1,N2,N3,N4 nand
	linkStyle default stroke:red,color:black,stroke-width:2px,fill:none
	linkStyle 0,2 stroke:yellow,color:black,stroke-width:2px,fill:none
	linkStyle 1,3 stroke:blue,color:black,stroke-width:2px,fill:none
	linkStyle 5,4 stroke:green,color:black,stroke-width:2px,fill:none

Loading

The simplest possible solution

Solution #2

x	y		x ^ y	x \| y		r1 & r2
0	0	→	0	1	→	0
0	1	→	1	1	→	1
1	0	→	1	1	→	1
1	1	→	1	0	→	0

(x nand y) and (x or y)

Scheme

graph LR;
    X((X))--0\n0\n1\n1--->N1([NAND])
    Y((Y))--0\n1\n0\n1--->N1
    X((X))--0\n0\n1\n1--->Or1
    Y((Y))--0\n1\n0\n1--->Or1
	N1--1\n1\n1\n0-->And1([AND])
	Or1([OR])--0\n1\n1\n1-->And1
    And1--0\n1\n1\n0-->O((out))

	classDef in1 fill:#ffff80ff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef in2 fill:#00ffffff,stroke:#000,stroke-width:2px,font-size:130%;
    classDef out1 fill:#aeff73ff,stroke:#000,stroke-width:2px,font-size:90%;
    classDef nand fill:#222,stroke:#000,stroke-width:2px,color:#fff;
    classDef inv fill:#f55,stroke:#000,stroke-width:2px;
    classDef or fill:#fa1,stroke:#000,stroke-width:2px;
    classDef and fill:#f55,stroke:#000,stroke-width:2px;
    class X in1
	class Y in2
	class O out1
    class N1 nand
	class Or1 or
	class And1 and
	linkStyle default stroke:red,color:black,stroke-width:2px,fill:none
	linkStyle 0,2 stroke:yellow,color:black,stroke-width:2px,fill:none
	linkStyle 1,3 stroke:blue,color:black,stroke-width:2px,fill:none
	linkStyle 5,4 stroke:green,color:black,stroke-width:2px,fill:none

Loading

Full True Table

Arithmetics

Half Adder

a	b		h	l		high	low
0	0	→	0	0	→
0	1	→	0	1	→		!a & b
1	0	→	0	1	→		a & !b
1	1	→	1	0	→	a & b

h = a and b

l = a xor b

Full Adder

a	b	c		high	low		high	low
0	0	0	→	0	1	→		!a & !b & !c
0	0	1	→	0	1	→		!a & !b & c
0	1	0	→	0	1	→		!a & b & !c
0	1	1	→	1	0	→	!a & b & c
1	0	0	→	0	1	→		a & !b & !c
1	0	1	→	1	0	→	a & !b & c
1	1	0	→	1	0	→	a & b & !c
1	1	1	→	1	1	→	a & b & c	a & b & c

h = (not(a) and b and c) or (a and not(b) and c) or (a and b and not(c)) or (a and b and c)

l = (not(a) and not(b) and not(c)) or (not(a) and not(b) and c) or (not(a) and b and not(c)) or (a and not(b) and not(c)) or (a and b and c)

y	1	→	!y	x	→	r < x	1	→	!r
0	1	→	1	0	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

x	1	→	!x	y	→	r < y	1	→	!r
0	1	→	1	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

y	1	→	!y	x	→	r < x	1	→	!r
0	1	→	1	0	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

x	1	→	!x	y	→	r < y	1	→	!r
0	1	→	1	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

Files

Hardware.md

Latest commit

History

Hardware.md

File metadata and controls

Hardware

Logic Gates

Nand

Solutions:

Invert

And

Or

Xor

Full True Table

Arithmetics

Half Adder

Full Adder

Multi-bit Adder

Increment

Subtraction

Equal to Zero

Less than Zero

Switching

Selector

Switch

Arithmetic Logic Unit

Logic Unit

Arithmetic Unit

ALU

Condition

Memory

Latch

Data Flip-Flop

Register

Counter

RAM

Processor

Combined Memory

Instruction

Control Unit

Computer

Input and Output

y	1	→	!y	x	→	r < x	1	→	!r
0	1	→	1	0	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0

x	1	→	!x	y	→	r < y	1	→	!r
0	1	→	1	0	→	0	1	→	1
0	1	→	1	1	→	0	1	→	1
1	1	→	0	0	→	0	1	→	1
1	1	→	0	1	→	1	1	→	0