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I am reaching out to share my experience following the instructions provided on the Ettus Knowledge Base for RFNoC development, specifically using an N320 with the 10GigE (XG) configuration.
While I was able to progress through the initial steps of building my custom RFNoC blocks, I encountered several challenges that made the process more difficult than expected:
Limited Build Targets: Upon attempting to build my custom RFNoC block using make, the only available target was reg_x310_rfnoc_image_core. There was no clear guidance on how to configure the build for my N320_XG target, which caused confusion and delays.
Missing UHD Image Builder Tools: The documentation mentions uhd_image_builder and uhd_image_builder_gui, but these tools were not available in my UHD installation. There were no instructions on how to install or enable these utilities.
Lack of Target Selection Interface: It would be extremely beneficial to have a graphical or interactive tool that allows users to select which RFNoC blocks to include in the FPGA image and specify the build target (e.g., N320_XG) without manually editing configuration files.
Documentation Gaps: The documentation appears to be more aligned with X310 workflows, and it lacks clarity on building for the N320 platform, especially for the XG configuration.
I appreciate the robust capabilities of the RFNoC framework, but addressing these issues would greatly improve the development experience:
Provide clearer, N320-specific documentation that covers common configurations (e.g., N320_XG).
Ensure that uhd_image_builder and uhd_image_builder_gui are included or provide installation instructions.
Develop or integrate a GUI tool for selecting blocks and targets.
Thank you for your time and consideration. I hope this feedback helps improve the RFNoC development experience for future users.
The text was updated successfully, but these errors were encountered:
I am reaching out to share my experience following the instructions provided on the Ettus Knowledge Base for RFNoC development, specifically using an N320 with the 10GigE (XG) configuration.
While I was able to progress through the initial steps of building my custom RFNoC blocks, I encountered several challenges that made the process more difficult than expected:
Limited Build Targets: Upon attempting to build my custom RFNoC block using make, the only available target was reg_x310_rfnoc_image_core. There was no clear guidance on how to configure the build for my N320_XG target, which caused confusion and delays.
Missing UHD Image Builder Tools: The documentation mentions uhd_image_builder and uhd_image_builder_gui, but these tools were not available in my UHD installation. There were no instructions on how to install or enable these utilities.
Lack of Target Selection Interface: It would be extremely beneficial to have a graphical or interactive tool that allows users to select which RFNoC blocks to include in the FPGA image and specify the build target (e.g., N320_XG) without manually editing configuration files.
Documentation Gaps: The documentation appears to be more aligned with X310 workflows, and it lacks clarity on building for the N320 platform, especially for the XG configuration.
I appreciate the robust capabilities of the RFNoC framework, but addressing these issues would greatly improve the development experience:
Provide clearer, N320-specific documentation that covers common configurations (e.g., N320_XG).
Ensure that uhd_image_builder and uhd_image_builder_gui are included or provide installation instructions.
Develop or integrate a GUI tool for selecting blocks and targets.
Thank you for your time and consideration. I hope this feedback helps improve the RFNoC development experience for future users.
The text was updated successfully, but these errors were encountered: