Libresdr manufacturer source #45
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F5OEO
added
help wanted
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thanks, It was meant for @VasylSamoilov since he now has a known good unit after the first one with no vias, but I'll take any feedback I can get |
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@zx-ecco @F5OEO This one is better quality one: https://www.aliexpress.com/item/1005007369276242.html?spm=a2g0o.order_list.order_list_main.216.5ee41802uMWGMI |
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How to tell the difference?
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This one is fine. See them perforations on the board everywhere? These are "vias", or holes to connect layers on the PCB. On the lower quality one they are missing, turning part of the board into capacitor (on specific frequencies). |
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is there any difference between that listing and https://www.aliexpress.com/item/1005005165734650.html it seems to be the exact same device with the same markings and PCB pictures but with a different price (bigsave channel?) also, what frequencies did you experience issues with? @G0MJW did you have any of those issues with yours? (I see here that you've ordered from the same cheaper link I mention above) #11 (comment) ) |
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Hello Evariste, I have the cheap LibreSDR in test since November 2024. It is the version without the vias, so I have solderd a short piece of RG402 semi ridgid coax between the TX transformer and the TX SMA connector to prevent that the output is fluctuating for example at 2.4 Ghz. After the modification with the coax the output was stable from 2 M up to 13 cm. See attached photo of the modification.
I did also several tests with an External 40 Mhz ref signal, as a replacement of the internal 40 MhzVTCXCO but without success, due to the fact that the PLL circuit of the 40 Mhz is controlled by the FPGA and the output of the 40 Mhz signal is split-up in 2 signals, 1 for the FPGA and 1 for the AD9363. The pll circuit in the FPGA needs to look to the 10 Mhz external clock, compares the differences between the 10 Mhz and the 40 Mhz VTCXCO and via a DAC it is steering the VTCxCO. I tested your 0.0.95 version of the Tazuka firmware yesterday and that is running fine from the SD card. I am using the LibreSDR for the QO100 NB with SDRConsole v3.4 beta. It is working fine, except the frequency stability of the 40 MHZ oscillator. So a solution to use the LibreSDR with an external 10 Mhz reference would be the ideal solution. 73 Jaap |
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VIAS actually exist, it's just a very good mask and they're not visible. Problem in wrong type of zener diode that's installed in this model and has a capacity of 10 pF. Remove zener near the SMA connector and everything will work fine. see my video https://www.youtube.com/watch?v=ow0Q6Wli4es |
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How I know if my libresdr has the diode issue?
…On Tue, 4 Feb 2025, 18:29 VitG, ***@***.***> wrote:
VIAS actually exist, it's just a very good mask and they're not visible.
Problem in wrong type of zener diode that's installed in this model and has
a capacity of 10 pF. Remove zener near the SMA connector and everything
will work fine.
photo_2025-02-04_21-24-34.jpg (view on web)
<https://github.com/user-attachments/assets/ab4f0e4c-1bf6-4c48-965a-dedf5a5868e8>
see my video https://www.youtube.com/watch?v=ow0Q6Wli4es
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I removed the Tx diode earlier but the rf instability at 2.4 Ghz was still there.
The output power with the diode was around 2 db lower than after removing the diode.
By cutting the original tx stripline between transformer and connector and replace the connection with a small piece of rg405 or rg402 semi ridgid coax cable was solving the instability problem.
Attention required to solder the outer shield of the coax to Gnd on both sides.
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Op 4 feb 2025 19:29, om 19:29, VitG ***@***.***> schreef:
…VIAS actually exist, it's just a very good mask and they're not
visible. Problem in wrong type of zener diode that's installed in this
model and has a capacity of 10 pF. Remove zener near the SMA connector
and everything will work fine.
see my video https://www.youtube.com/watch?v=ow0Q6Wli4es
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I changed that baluns in a blacksdr n210mini by the mini-circuit ones. Just
in case you want a better mod. I read also a company removed the some coil
of the baluns to reduce cross-talking or something like that.
Didn't test if they improved anything but I guess, anyways they were
damaged so no other option.
There was a copy of minicircuits and others that are minicircuit but they
don't go to 6ghz
…On Mon, 3 Feb 2025, 11:02 lubuntu-l100, ***@***.***> wrote:
Hello Evariste, I have the cheap LibreSDR in test since November 2024. It
is the version without the vias, so I have solderd a short piece of RG402
semi ridgid coax between the TX transformer and the TX SMA connector to
prevent that the output is fluctuating for example at 2.4 Ghz.
After the modification with the coax the output was stable from 2 M up to
13 cm.
See attached photo of the modification.
20241228_141604.jpg (view on web)
<https://github.com/user-attachments/assets/6bf56d24-3d71-402f-8176-f3feff4f85b5>
I did also several tests with an External 40 Mhz ref signal, as a
replacement of the internal 40 MhzVTCXCO but without success, due to the
fact that the PLL circuit of the 40 Mhz is controlled by the FPGA and the
output of the 40 Mhz signal is split-up in 2 signals, 1 for the FPGA and 1
for the AD9363. The pll circuit in the FPGA needs to look to the 10 Mhz
external clock, compares the differences between the 10 Mhz and the 40 Mhz
VTCXCO and via a DAC it is steering the VTCxCO.
This way of controlling the 40 Mhz oscillator came from the Ettus B210.
I tested your 0.0.95 version of the Tazuka firmware yesterday and that is
running fine from the SD card.
I am using the LibreSDR for the QO100 NB with SDRConsole v3.4 beta. It is
working fine, except the frequency stability of the 40 MHZ oscillator. So a
solution to use the LibreSDR with an external 10 Mhz reference would be the
ideal solution.
73 Jaap
PA2JSA
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I also want to draw attention to the fact that in a cheaper version of LibreSDR known as AMGeekSDR, instead of VCTXO a regular TCXO is installed, which does not have external voltage control, and this device will not work from an external reference signal. To do this, you need to change the reference generator to VCTXO. But I advise you not to do this. In my experience, operation from an external reference signal does not stand up to any criticism. The PLL circuit is implemented on an 8-bit DAC that works too roughly and we have constant micro-jumps in frequency due to the fact that the PLL cannot make a frequency latch due to the large step of the tuning voltage. It would be better to use at least a 10-bit DAC there, and better yet, a 12-bit one. i`m use the freq calibration in config file. this work fine without external 10 MHz reference. |
if your zener diode marked as C5 then remove it. If Z3 then everything is fine, it has a capacity of 0.2 pF and it corresponds to what is indicated in the Libre original datasheet. By the way, don't forget to remove the C5 zener diodes from the RX part because they also significantly worsen reception at high frequencies. The original AdalmPluto and Pluto+ don't have any zeners at all. |
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The last sentence is not completely correct.
The AD Pluto rev D has also diodes at the tx and rx connector sites. Earlier pluto versions don't have these diodes.
The implementation in the LibreSDR is copied from the Pluto rev D.
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Op 5 feb 2025 07:05, om 07:05, VitG ***@***.***> schreef:
…> How I know if my libresdr has the diode issue?
>
if your zener diode marked as C5 then remove it. If Z3 then everything
is fine, it has a capacity of 0.2 pF and it corresponds to what is
indicated in the Libre original datasheet.
By the way, don't forget to remove the C5 zener diodes from the RX part
because they also significantly worsen reception at high frequencies.
The original AdalmPluto and Pluto+ don't have any zeners at all.
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ok. the Pluto versions that I had did not have diodes and I made a conclusion based on my experience. if they started installing diodes later, then apparently there were some reasons for this. but I personally do not see the need for them. if the original baluns from minicircut are installed, then they have all outputs connected to the ground via DC and the input will not be able to accumulate static charge. if you apply a powerful high-frequency signal to the input, then the zener most likely will not help and will burn out along with the rf chip =) |
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two screenshots of LibreSDR working with external synchronization connected and without it.
in the first case, the received signal is periodically shifted. I tried to redesign the PLL circuit to reduce the adjustment step using attenuation between the DAC and the TCXO, but nothing helped, it only got worse. this is a bad software module or a schematic design error |
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Thanks for the pictures.
I have tried to use an external 40 mhz signal at the 40 Mhz vtxcxo output, by disabling the vtxcxo. The problem was that the pll circuit stops to run. Another option which I want to test up coming weeks, is to bring the external 40 mhz to the external clock input of the Ad9363 and define the external clock input and frequency with putty for the Ad9363.
If that will run, the stabilisation problem is solved. It is the stability of the 40 mhz signal at the ad9363 that gives drifting at 2.4 ghz when transmitting in ssb over the QO100 satellite in a bandwidth of 2.8 kc.
My 40 mhz vtxcxo is about 5.5 khz of frequency at 2.4 Ghz and drifts about 500 hz over a time period of 4 hours. But for ssb this is a real problem.
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Op 5 feb 2025 10:28, om 10:28, VitG ***@***.***> schreef:
…
two screenshots of LibreSDR working with external synchronization
connected and without it.
in the first case, the received signal is periodically shifted. I tried
to redesign the PLL circuit to reduce the adjustment step using
attenuation between the DAC and the TCXO, but nothing helped, it only
got worse. this is a bad software module or a schematic design error
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So there is a reference clock implementation in tezuka apparently? |
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I haven't checked the latest version yet, but it wasn't in the previous one. |
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So how did you get even that broken version working? I reckon I can try to do it like the b210 does it. This and timestamping would make libre basically a b210-mini with a bw limit. |
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I can't remember where, but I found a firmware for SPI flash to work without a SD card. It has a name libreplutosdr-fw-v0.37-1-gf5ad-dirty.zip. I loaded pluto.frm and boot.frm into SPI and my LibreSDR works with UTP, USB and supports external sync 10 MHz when loaded without a SD card. I haven't seen support ext clk in any other firmware, and I don't know who made it. =( |
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This reminds me of sdy623/hdl@5b9bcef maybe that? |
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I have tested this libreplutosdr-fw-v0.37-1-gf5ad-dirty.zip version however what I noticed that the 40 Mhz vctcxo is drifting from left to right around the required frequency without a proper lock. I have exported the 10 mhz lock led to see if there is a lock. But the lock led is not on.
It look likes that the fpga is looking for the frequency correction without the correct reference. Even without the external 10 mhz the 40 mhz vctcxo was drifting all the time around 40 mhz. I akso checked the pps external, also without succes.
I also tested an unknown Chinese firmware for the Libresdr. As a pluto clone firmware. In that version 10 mhz external clock led was directly on at startup, however the fpga was not running. So that fw was not working for this version of fpga.
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Op 5 feb 2025 14:18, om 14:18, VitG ***@***.***> schreef:
…I can't remember where, but I found a firmware for SPI flash to work
without a SD card. It has a name
libreplutosdr-fw-v0.37-1-gf5ad-dirty.zip. I loaded pluto.frm and
boot.frm into SPI and my LibreSDR works with UTP, USB and supports
external sync 10 MHz when loaded without a SD card. I haven't seen
support ext clk in any other firmware, and I don't know who made it. =(
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Okay when I get mine I will test a few stuff and first try to do something for the vctcxo with the pps because thats easier to get, to make pps work on the rising edge so it works ootb with radiosondes like rs41 as gpsdo some sort of interrupt on that could do the job though I still have no idea how to program fpgas and my libresdr will be the first fpga I can play with. This and timestamping is what I want to work on libresdr by end of February or soon ™ |
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Be aware that the LibreSDR is more or less an Ettus B210 clone instead of an AD Pluto clone. Especially around the 10 Mhz external clock reference combined with the FPGA.
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Op 5 feb 2025 21:08, om 21:08, Panagiotis Plessas ***@***.***> schreef:
…Okay when I get mine I will test a few stuff and first try to do
something for the vctcxo with the pps because thats easier to get, to
make pps work on the rising edge so it works ootb with radiosondes
like rs41 as gpsdo some sort of interrupt on that could do the job
though I still have no idea how to program fpgas and my libresdr will
be the first fpga I can play with. This and timestamping is what I want
to work on libresdr by end of February or soon ™
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yeah I figured , otherwise it would appear too simple. I have schematics , original adi whatever adi is( like a 30 gb uncompressed directory). Would love the sync to be fpga only but doubt how possible that would be. I still have way too many questions to figure out. I think I can do the sync stuff not sure about timestamps, would be interesting to hear f50e0's input on this, and maybe a sneakpeak of what they're working on. |
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Go to F5OEO/Tezuka on github. There you can find the current developments as well the future.
Also on Github the Maia Sdr project.
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Op 5 feb 2025 21:53, om 21:53, Panagiotis Plessas ***@***.***> schreef:
…yeah I figured , otherwise it would appear too simple. I have
schematics , original adi whatever adi is( like a 30 gb uncompressed
directory). Would love the sync to be fpga only but doubt how possible
that would be. I still have way too many questions to figure out. I
think I can do the sync stuff not sure about timestamps, would be
interesting to hear f50e0's input on this, and maybe a sneakpeak of
what they're working on.
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No it is not. Well, yes it is but also no it is not. There are two, maybe more LibreSDR models, one is a B210 clone, the other a Pluto clone. I expect neither is the same as the model they copy. The RF front end may be the same in both cases, or maybe not.
Mike
From: lubuntu-l100 ***@***.***>
Sent: 05 February 2025 20:23
To: F5OEO/tezuka_fw ***@***.***>
Cc: G0MJW ***@***.***>; Mention ***@***.***>
Subject: Re: [F5OEO/tezuka_fw] Libresdr manufacturer source (Issue #45)
Be aware that the LibreSDR is more or less an Ettus B210 clone instead of an AD Pluto clone. Especially around the 10 Mhz external clock reference combined with the FPGA.
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Op 5 feb 2025 21:08, om 21:08, Panagiotis Plessas ***@***.*** <mailto:***@***.***> > schreef:
Okay when I get mine I will test a few stuff and first try to do
something for the vctcxo with the pps because thats easier to get, to
make pps work on the rising edge so it works ootb with radiosondes
like rs41 as gpsdo some sort of interrupt on that could do the job
though I still have no idea how to program fpgas and my libresdr will
be the first fpga I can play with. This and timestamping is what I want
to work on libresdr by end of February or soon ™
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Yes,.the last model labeled by LibreSDR is a B210 clone, likely a
B210mini/BlackSDR , but likely cutted down in the external reference input,
only one Ipex connector vs 2 Ipex in BlackSDR.
They differ from Ettus one in they use a Artix7 instead a Spartan. So need
a special file to work with Ettus driver. It has not CPU built in as the
Zynq,.so.they are very different. The BlackSDR use USB3.0, AdiXX91 instead
xx93 unlocked, and it really gets the 61mhz bandwidth.
Any other LibreSDR are pluto based,.very different
…On Thu, 6 Feb 2025, 09:19 G0MJW, ***@***.***> wrote:
No it is not. Well, yes it is but also no it is not. There are two, maybe
more LibreSDR models, one is a B210 clone, the other a Pluto clone. I
expect neither is the same as the model they copy. The RF front end may be
the same in both cases, or maybe not.
Mike
From: lubuntu-l100 ***@***.***>
Sent: 05 February 2025 20:23
To: F5OEO/tezuka_fw ***@***.***>
Cc: G0MJW ***@***.***>; Mention ***@***.***>
Subject: Re: [F5OEO/tezuka_fw] Libresdr manufacturer source (Issue #45)
Be aware that the LibreSDR is more or less an Ettus B210 clone instead of
an AD Pluto clone. Especially around the 10 Mhz external clock reference
combined with the FPGA.
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Op 5 feb 2025 21:08, om 21:08, Panagiotis Plessas ***@***.*** <mailto:***@***.***>
> schreef:
>Okay when I get mine I will test a few stuff and first try to do
>something for the vctcxo with the pps because thats easier to get, to
>make pps work on the rising edge so it works ootb with radiosondes
>like rs41 as gpsdo some sort of interrupt on that could do the job
>though I still have no idea how to program fpgas and my libresdr will
>be the first fpga I can play with. This and timestamping is what I want
>to work on libresdr by end of February or soon ™
>
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I had good luck I have the good one with holes everywhere and z3 diode .
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First of all where did you buy this and secondly what sort of balun mod are you talking about |
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Your pictures are showing the Libresdr b210 clone.
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Op 6 feb 2025 21:01, om 21:01, FPSychotic ***@***.***> schreef:
…
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This last pictures are BlackSDR/B210Mini. |
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I have a separate 9361 chip, if I replace 9363 with it in Libre SDR, will it work or do I need to make a special firmware? |
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Libresdr firmware assume already that it is ad9361...so it works without other modification on firmware. |
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according to the datasheet, several pins of these chips do not match. It probably won't be possible to do this by simply replacing them. =( |
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"but what about software support the bandwidth range and the LO tuning step" |
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That’s interesting. Will it do 10m directly for DATV now?
From: F5OEO ***@***.***>
Sent: 07 February 2025 08:53
To: F5OEO/tezuka_fw ***@***.***>
Cc: G0MJW ***@***.***>; Mention ***@***.***>
Subject: Re: [F5OEO/tezuka_fw] Libresdr manufacturer source (Issue #45)
"but what about software support the bandwidth range and the LO tuning step"
Sample Rate is set to 61.4MS/56Mhz bandwidth, LO is extended to 47Mhz-6Ghz even with ad9363
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DATV on 10m : Need LO at 47Mhz, and Symbolrate at lease 47Mhz-28Mhz -> around 20MS. Then use NCO and interpolator : that's it. |
Originally posted by @zx-ecco in #38
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