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PipelineCPU.flow.rpt
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Flow report for PipelineCPU
Tue Jun 17 23:31:07 2014
Quartus II 32-bit Version 12.0 Build 178 05/31/2012 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Flow Summary
3. Flow Settings
4. Flow Non-Default Global Settings
5. Flow Elapsed Time
6. Flow OS Summary
7. Flow Log
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2012 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+--------------------------------------------------------------------------------+
; Flow Summary ;
+------------------------------------+-------------------------------------------+
; Flow Status ; Successful - Tue Jun 17 23:31:07 2014 ;
; Quartus II 32-bit Version ; 12.0 Build 178 05/31/2012 SJ Full Version ;
; Revision Name ; PipelineCPU ;
; Top-level Entity Name ; PipelineCPU ;
; Family ; Cyclone II ;
; Total logic elements ; 6,540 / 33,216 ( 20 % ) ;
; Total combinational functions ; 6,349 / 33,216 ( 19 % ) ;
; Dedicated logic registers ; 1,711 / 33,216 ( 5 % ) ;
; Total registers ; 1711 ;
; Total pins ; 336 / 475 ( 71 % ) ;
; Total virtual pins ; 0 ;
; Total memory bits ; 0 / 483,840 ( 0 % ) ;
; Embedded Multiplier 9-bit elements ; 0 / 70 ( 0 % ) ;
; Total PLLs ; 0 / 4 ( 0 % ) ;
; Device ; EP2C35F672C6 ;
; Timing Models ; Final ;
+------------------------------------+-------------------------------------------+
+-----------------------------------------+
; Flow Settings ;
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 06/17/2014 23:25:05 ;
; Main task ; Compilation ;
; Revision Name ; PipelineCPU ;
+-------------------+---------------------+
+-------------------------------------------------------------------------------------------------------------------------------+
; Flow Non-Default Global Settings ;
+--------------------------------------+------------------------------------+---------------+-------------+---------------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+--------------------------------------+------------------------------------+---------------+-------------+---------------------+
; COMPILER_SIGNATURE_ID ; 25173941750126.140301870306184 ; -- ; -- ; -- ;
; EDA_DESIGN_INSTANCE_NAME ; NA ; -- ; -- ; PipelineCPU_vlg_tst ;
; EDA_NATIVELINK_SIMULATION_TEST_BENCH ; PipelineCPU_vlg_tst ; -- ; -- ; eda_simulation ;
; EDA_OUTPUT_DATA_FORMAT ; Verilog Hdl ; -- ; -- ; eda_simulation ;
; EDA_SIMULATION_TOOL ; ModelSim-Altera (Verilog) ; <None> ; -- ; -- ;
; EDA_TEST_BENCH_ENABLE_STATUS ; TEST_BENCH_MODE ; -- ; -- ; eda_simulation ;
; EDA_TEST_BENCH_FILE ; simulation/modelsim/PipelineCPU.vt ; -- ; -- ; PipelineCPU_vlg_tst ;
; EDA_TEST_BENCH_MODULE_NAME ; PipelineCPU_vlg_tst ; -- ; -- ; PipelineCPU_vlg_tst ;
; EDA_TEST_BENCH_NAME ; PipelineCPU_vlg_tst ; -- ; -- ; eda_simulation ;
; EDA_TIME_SCALE ; 1 ps ; -- ; -- ; eda_simulation ;
; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
; PARTITION_FITTER_PRESERVATION_LEVEL ; PLACEMENT_AND_ROUTING ; -- ; -- ; Top ;
; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
+--------------------------------------+------------------------------------+---------------+-------------+---------------------+
+-------------------------------------------------------------------------------------------------------------------------------+
; Flow Elapsed Time ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:02:11 ; 1.0 ; 350 MB ; 00:01:56 ;
; Fitter ; 00:02:55 ; 2.7 ; 542 MB ; 00:03:57 ;
; Assembler ; 00:00:20 ; 1.0 ; 336 MB ; 00:00:07 ;
; TimeQuest Timing Analyzer ; 00:00:23 ; 1.3 ; 375 MB ; 00:00:12 ;
; EDA Netlist Writer ; 00:00:27 ; 1.0 ; 334 MB ; 00:00:12 ;
; Total ; 00:06:16 ; -- ; -- ; 00:06:24 ;
+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
+----------------------------------------------------------------------------------------+
; Flow OS Summary ;
+---------------------------+------------------+-----------+------------+----------------+
; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
+---------------------------+------------------+-----------+------------+----------------+
; Analysis & Synthesis ; John-PC ; Windows 7 ; 6.2 ; x86_64 ;
; Fitter ; John-PC ; Windows 7 ; 6.2 ; x86_64 ;
; Assembler ; John-PC ; Windows 7 ; 6.2 ; x86_64 ;
; TimeQuest Timing Analyzer ; John-PC ; Windows 7 ; 6.2 ; x86_64 ;
; EDA Netlist Writer ; John-PC ; Windows 7 ; 6.2 ; x86_64 ;
+---------------------------+------------------+-----------+------------+----------------+
------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off PipelineCPU -c PipelineCPU
quartus_fit --read_settings_files=off --write_settings_files=off PipelineCPU -c PipelineCPU
quartus_asm --read_settings_files=off --write_settings_files=off PipelineCPU -c PipelineCPU
quartus_sta PipelineCPU -c PipelineCPU
quartus_eda --read_settings_files=off --write_settings_files=off PipelineCPU -c PipelineCPU