From 492df33db842c7146c90af6d340a4b2d0ca57db1 Mon Sep 17 00:00:00 2001 From: Lucas Steuernagel <38472950+LucasSte@users.noreply.github.com> Date: Mon, 15 Jan 2024 14:43:16 -0300 Subject: [PATCH] [SOL] Remove `SBF_JMP32` instruction class (#80) * Remove SBF_JMP32 class --- .../SBF/Disassembler/SBFDisassembler.cpp | 1 - llvm/lib/Target/SBF/SBFISelLowering.cpp | 19 ++--- llvm/lib/Target/SBF/SBFISelLowering.h | 2 - llvm/lib/Target/SBF/SBFInstrFormats.td | 1 - llvm/lib/Target/SBF/SBFInstrInfo.td | 76 +++---------------- llvm/lib/Target/SBF/SBFSubtarget.cpp | 2 - llvm/lib/Target/SBF/SBFSubtarget.h | 5 -- llvm/test/CodeGen/SBF/adjust-opt-icmp3.ll | 4 +- llvm/test/CodeGen/SBF/adjust-opt-icmp4.ll | 4 +- llvm/test/CodeGen/SBF/adjust-opt-icmp5.ll | 4 +- llvm/test/CodeGen/SBF/adjust-opt-icmp6.ll | 4 +- llvm/test/CodeGen/SBF/atomics_sbf.ll | 24 ++++-- llvm/test/CodeGen/SBF/loop-exit-cond.ll | 9 ++- llvm/test/MC/Disassembler/SBF/sbf-jmp.txt | 42 ---------- llvm/test/MC/SBF/insn-unit-32.s | 47 ------------ llvm/test/MC/SBF/sbf-jmp.s | 62 --------------- 16 files changed, 51 insertions(+), 255 deletions(-) diff --git a/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp b/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp index 55932f6a307974..49a63e02eb3ea6 100644 --- a/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp +++ b/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp @@ -40,7 +40,6 @@ class SBFDisassembler : public MCDisassembler { SBF_STX = 0x3, SBF_ALU = 0x4, SBF_JMP = 0x5, - SBF_JMP32 = 0x6, SBF_ALU64 = 0x7 }; diff --git a/llvm/lib/Target/SBF/SBFISelLowering.cpp b/llvm/lib/Target/SBF/SBFISelLowering.cpp index 5ab4c21c6374a7..51b85d8cb66efd 100644 --- a/llvm/lib/Target/SBF/SBFISelLowering.cpp +++ b/llvm/lib/Target/SBF/SBFISelLowering.cpp @@ -150,8 +150,7 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM, if (STI.getHasAlu32()) { setOperationAction(ISD::BSWAP, MVT::i32, Promote); - setOperationAction(ISD::BR_CC, MVT::i32, - STI.getHasJmp32() ? Custom : Promote); + setOperationAction(ISD::BR_CC, MVT::i32, Promote); } if (Subtarget->isSolana()) { @@ -219,7 +218,6 @@ SBFTargetLowering::SBFTargetLowering(const TargetMachine &TM, // CPU/Feature control HasAlu32 = STI.getHasAlu32(); - HasJmp32 = STI.getHasJmp32(); HasJmpExt = STI.getHasJmpExt(); SBFRegisterInfo::FrameLength = STI.isSolana() ? 4096 : 512; } @@ -800,7 +798,7 @@ SDValue SBFTargetLowering::LowerBR_CC(SDValue Op, SelectionDAG &DAG) const { NegateCC(LHS, RHS, CC); return DAG.getNode(SBFISD::BR_CC, DL, Op.getValueType(), Chain, LHS, RHS, - DAG.getConstant(CC, DL, LHS.getValueType()), Dest); + DAG.getConstant(CC, DL, MVT::i64), Dest); } SDValue SBFTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { @@ -1091,12 +1089,9 @@ SBFTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, int CC = MI.getOperand(3).getImm(); int NewCC; switch (CC) { -#define SET_NEWCC(X, Y) \ - case ISD::X: \ - if (is32BitCmp && HasJmp32) \ - NewCC = isSelectRROp ? SBF::Y##_rr_32 : SBF::Y##_ri_32; \ - else \ - NewCC = isSelectRROp ? SBF::Y##_rr : SBF::Y##_ri; \ +#define SET_NEWCC(X, Y) \ + case ISD::X: \ + NewCC = isSelectRROp ? SBF::Y##_rr : SBF::Y##_ri; \ break SET_NEWCC(SETGT, JSGT); SET_NEWCC(SETUGT, JUGT); @@ -1125,13 +1120,13 @@ SBFTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, // // We simply do extension for all situations in this method, but we will // try to remove those unnecessary in SBFMIPeephole pass. - if (is32BitCmp && !HasJmp32) + if (is32BitCmp) LHS = EmitSubregExt(MI, BB, LHS, isSignedCmp); if (isSelectRROp) { Register RHS = MI.getOperand(2).getReg(); - if (is32BitCmp && !HasJmp32) + if (is32BitCmp) RHS = EmitSubregExt(MI, BB, RHS, isSignedCmp); BuildMI(BB, DL, TII.get(NewCC)).addReg(LHS).addReg(RHS).addMBB(Copy1MBB); diff --git a/llvm/lib/Target/SBF/SBFISelLowering.h b/llvm/lib/Target/SBF/SBFISelLowering.h index e017ce2c9805ec..1aa5a1f45aa4b7 100644 --- a/llvm/lib/Target/SBF/SBFISelLowering.h +++ b/llvm/lib/Target/SBF/SBFISelLowering.h @@ -63,7 +63,6 @@ class SBFTargetLowering : public TargetLowering { MachineBasicBlock *BB) const override; bool getHasAlu32() const { return HasAlu32; } - bool getHasJmp32() const { return HasJmp32; } bool getHasJmpExt() const { return HasJmpExt; } EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, @@ -77,7 +76,6 @@ class SBFTargetLowering : public TargetLowering { private: // Control Instruction Selection Features bool HasAlu32; - bool HasJmp32; bool HasJmpExt; SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; diff --git a/llvm/lib/Target/SBF/SBFInstrFormats.td b/llvm/lib/Target/SBF/SBFInstrFormats.td index 8bb8281c421857..de8b36da7af79b 100644 --- a/llvm/lib/Target/SBF/SBFInstrFormats.td +++ b/llvm/lib/Target/SBF/SBFInstrFormats.td @@ -16,7 +16,6 @@ def SBF_ST : SBFOpClass<0x2>; def SBF_STX : SBFOpClass<0x3>; def SBF_ALU : SBFOpClass<0x4>; def SBF_JMP : SBFOpClass<0x5>; -def SBF_JMP32 : SBFOpClass<0x6>; def SBF_ALU64 : SBFOpClass<0x7>; class SBFSrcType val> { diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td index 1f8ea2cd3b6114..381a0fbc27bb24 100644 --- a/llvm/lib/Target/SBF/SBFInstrInfo.td +++ b/llvm/lib/Target/SBF/SBFInstrInfo.td @@ -126,26 +126,6 @@ def SBF_CC_LTU : PatLeaf<(i64 imm), [{return (N->getZExtValue() == ISD::SETULT);}]>; def SBF_CC_LEU : PatLeaf<(i64 imm), [{return (N->getZExtValue() == ISD::SETULE);}]>; -def SBF_CC_EQ_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETEQ);}]>; -def SBF_CC_NE_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETNE);}]>; -def SBF_CC_GE_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETGE);}]>; -def SBF_CC_GT_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETGT);}]>; -def SBF_CC_GTU_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETUGT);}]>; -def SBF_CC_GEU_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETUGE);}]>; -def SBF_CC_LE_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETLE);}]>; -def SBF_CC_LT_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETLT);}]>; -def SBF_CC_LTU_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETULT);}]>; -def SBF_CC_LEU_32 : PatLeaf<(i32 imm), - [{return (N->getZExtValue() == ISD::SETULE);}]>; // For arithmetic and jump instructions the 8-bit 'code' // field is divided into three parts: @@ -211,57 +191,23 @@ class JMP_RI let SBFClass = SBF_JMP; } -class JMP_RR_32 - : TYPE_ALU_JMP { - bits<4> dst; - bits<4> src; - bits<16> BrDst; - - let Inst{55-52} = src; - let Inst{51-48} = dst; - let Inst{47-32} = BrDst; - let SBFClass = SBF_JMP32; -} - -class JMP_RI_32 - : TYPE_ALU_JMP { - bits<4> dst; - bits<16> BrDst; - bits<32> imm; - - let Inst{51-48} = dst; - let Inst{47-32} = BrDst; - let Inst{31-0} = imm; - let SBFClass = SBF_JMP32; -} - -multiclass J { +multiclass J { def _rr : JMP_RR; def _ri : JMP_RI; - def _rr_32 : JMP_RR_32; - def _ri_32 : JMP_RI_32; } let isBranch = 1, isTerminator = 1, hasDelaySlot=0 in { // cmp+goto instructions -defm JEQ : J; -defm JUGT : J; -defm JUGE : J; -defm JNE : J; -defm JSGT : J; -defm JSGE : J; -defm JULT : J; -defm JULE : J; -defm JSLT : J; -defm JSLE : J; +defm JEQ : J; +defm JUGT : J; +defm JUGE : J; +defm JNE : J; +defm JSGT : J; +defm JSGE : J; +defm JULT : J; +defm JULE : J; +defm JSLT : J; +defm JSLE : J; } // ALU instructions diff --git a/llvm/lib/Target/SBF/SBFSubtarget.cpp b/llvm/lib/Target/SBF/SBFSubtarget.cpp index e82fa30f0cc159..c820d3b13eca8d 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.cpp +++ b/llvm/lib/Target/SBF/SBFSubtarget.cpp @@ -37,7 +37,6 @@ void SBFSubtarget::initializeEnvironment(const Triple &TT) { assert(TT.getArch() == Triple::sbf && "expected Triple::sbf"); IsSolana = true; HasJmpExt = false; - HasJmp32 = false; HasAlu32 = false; HasSdiv = false; UseDwarfRIS = false; @@ -66,7 +65,6 @@ void SBFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { if (CPU == "v3") { HasJmpExt = true; - HasJmp32 = true; HasAlu32 = true; } diff --git a/llvm/lib/Target/SBF/SBFSubtarget.h b/llvm/lib/Target/SBF/SBFSubtarget.h index 5461d8a4765552..07ad4a8f1b225d 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.h +++ b/llvm/lib/Target/SBF/SBFSubtarget.h @@ -50,10 +50,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo { // whether the cpu supports jmp ext bool HasJmpExt; - // whether the cpu supports jmp32 ext. - // NOTE: jmp32 is not enabled when alu32 enabled. - bool HasJmp32; - // whether the cpu supports alu32 instructions. bool HasAlu32; @@ -99,7 +95,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo { void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS); bool isSolana() const { return IsSolana; } bool getHasJmpExt() const { return HasJmpExt; } - bool getHasJmp32() const { return HasJmp32; } bool getHasAlu32() const { return HasAlu32; } bool getHasDynamicFrames() const { return HasDynamicFrames; } bool getHasSdiv() const { return HasSdiv; } diff --git a/llvm/test/CodeGen/SBF/adjust-opt-icmp3.ll b/llvm/test/CodeGen/SBF/adjust-opt-icmp3.ll index 28d932bbf5937f..049ec7115325af 100644 --- a/llvm/test/CodeGen/SBF/adjust-opt-icmp3.ll +++ b/llvm/test/CodeGen/SBF/adjust-opt-icmp3.ll @@ -41,7 +41,7 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test1 ; CHECK-V1: jgt r[[#]], r[[#]], -; CHECK-V3: jlt w[[#]], 4, +; CHECK-V3: jlt r[[#]], 4, ; Function Attrs: nounwind define dso_local i32 @test2(i64 %a) #0 { @@ -69,7 +69,7 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test2 ; CHECK-V1: jgt r[[#]], r[[#]], -; CHECK-V3: jlt w[[#]], 4, +; CHECK-V3: jlt r[[#]], 4, attributes #0 = { nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SBF/adjust-opt-icmp4.ll b/llvm/test/CodeGen/SBF/adjust-opt-icmp4.ll index a3d202657847cc..16f300a8ba845d 100644 --- a/llvm/test/CodeGen/SBF/adjust-opt-icmp4.ll +++ b/llvm/test/CodeGen/SBF/adjust-opt-icmp4.ll @@ -41,7 +41,7 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test1 ; CHECK-V1: jgt r[[#]], 3, -; CHECK-V3: jgt w[[#]], 3, +; CHECK-V3: jgt r[[#]], 3, ; Function Attrs: nounwind define dso_local i32 @test2(i64 %a) #0 { @@ -69,7 +69,7 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test2 ; CHECK-V1: jgt r[[#]], 3, -; CHECK-V3: jgt w[[#]], 3, +; CHECK-V3: jgt r[[#]], 3, attributes #0 = { nounwind "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SBF/adjust-opt-icmp5.ll b/llvm/test/CodeGen/SBF/adjust-opt-icmp5.ll index 39f38c8499456f..5b88384b788f21 100644 --- a/llvm/test/CodeGen/SBF/adjust-opt-icmp5.ll +++ b/llvm/test/CodeGen/SBF/adjust-opt-icmp5.ll @@ -49,8 +49,8 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test ; CHECK-V1: jsgt r[[#]], r[[#]], ; CHECK-V1: jsgt r[[#]], 6, -; CHECK-V3: jslt w[[#]], 1, -; CHECK-V3: jsgt w[[#]], 6, +; CHECK-V3: jslt r[[#]], 1, +; CHECK-V3: jsgt r[[#]], 6, declare dso_local i32 @bar(i32 noundef) #1 diff --git a/llvm/test/CodeGen/SBF/adjust-opt-icmp6.ll b/llvm/test/CodeGen/SBF/adjust-opt-icmp6.ll index 51863589cd86a7..210beca0acfa97 100644 --- a/llvm/test/CodeGen/SBF/adjust-opt-icmp6.ll +++ b/llvm/test/CodeGen/SBF/adjust-opt-icmp6.ll @@ -49,8 +49,8 @@ return: ; preds = %if.end, %if.then ; CHECK-LABEL: test ; CHECK-V1: jgt r[[#]], r[[#]], ; CHECK-V1: jgt r[[#]], 6, -; CHECK-V3: jlt w[[#]], 2, -; CHECK-V3: jgt w[[#]], 6, +; CHECK-V3: jlt r[[#]], 2, +; CHECK-V3: jgt r[[#]], 6, declare dso_local i32 @bar(i32 noundef) #1 diff --git a/llvm/test/CodeGen/SBF/atomics_sbf.ll b/llvm/test/CodeGen/SBF/atomics_sbf.ll index 4af68c876f20e8..88e3e7c80ba9b2 100644 --- a/llvm/test/CodeGen/SBF/atomics_sbf.ll +++ b/llvm/test/CodeGen/SBF/atomics_sbf.ll @@ -67,7 +67,7 @@ entry: ; CHECK-LABEL: test_cas_32 ; CHECK: ldxw w0, [r1 + 0] -; CHECK: jeq w0, w2, +; CHECK: jeq r0, r2, ; CHECK: mov32 w3, w0 ; CHECK: stxw [r1 + 0], w3 define dso_local i32 @test_cas_32(i32* nocapture %p, i32 %old, i32 %new) local_unnamed_addr { @@ -181,8 +181,14 @@ entry: ; CHECK-LABEL: test_min_32 ; CHECK: ldxw w0, [r1 + 0] +; CHECK: mov64 r4, r0 +; CHECK: lsh64 r4, 32 +; CHECK: arsh64 r4, 32 +; CHECK: mov32 r5, w2 +; CHECK: lsh64 r5, 32 +; CHECK: arsh64 r5, 32 ; CHECK: mov32 w3, w0 -; CHECK: jslt w0, w2, +; CHECK: jslt r4, r5, LBB16_2 ; CHECK: mov32 w3, w2 ; CHECK: stxw [r1 + 0], w3 define dso_local i32 @test_min_32(i32* nocapture %ptr, i32 %v) local_unnamed_addr #0 { @@ -205,8 +211,14 @@ entry: ; CHECK-LABEL: test_max_32 ; CHECK: ldxw w0, [r1 + 0] +; CHECK: mov64 r4, r0 +; CHECK: lsh64 r4, 32 +; CHECK: arsh64 r4, 32 +; CHECK: mov32 r5, w2 +; CHECK: lsh64 r5, 32 +; CHECK: arsh64 r5, 32 ; CHECK: mov32 w3, w0 -; CHECK: jsgt w0, w2, +; CHECK: jsgt r4, r5, LBB18_2 ; CHECK: mov32 w3, w2 ; CHECK: stxw [r1 + 0], w3 define dso_local i32 @test_max_32(i32* nocapture %ptr, i32 %v) local_unnamed_addr #0 { @@ -229,8 +241,9 @@ entry: ; CHECK-LABEL: test_umin_32 ; CHECK: ldxw w0, [r1 + 0] +; CHECK: mov32 r4, w2 ; CHECK: mov32 w3, w0 -; CHECK: jlt w0, w2, +; CHECK: jlt r0, r4, ; CHECK: mov32 w3, w2 ; CHECK: stxw [r1 + 0], w3 define dso_local i32 @test_umin_32(i32* nocapture %ptr, i32 %v) local_unnamed_addr #0 { @@ -253,8 +266,9 @@ entry: ; CHECK-LABEL: test_umax_32 ; CHECK: ldxw w0, [r1 + 0] +; CHECK: mov32 r4, w2 ; CHECK: mov32 w3, w0 -; CHECK: jgt w0, w2, +; CHECK: jgt r0, r4, ; CHECK: mov32 w3, w2 ; CHECK: stxw [r1 + 0], w3 define dso_local i32 @test_umax_32(i32* nocapture %ptr, i32 %v) local_unnamed_addr #0 { diff --git a/llvm/test/CodeGen/SBF/loop-exit-cond.ll b/llvm/test/CodeGen/SBF/loop-exit-cond.ll index e42467d05cb8c7..9d422664232b0d 100644 --- a/llvm/test/CodeGen/SBF/loop-exit-cond.ll +++ b/llvm/test/CodeGen/SBF/loop-exit-cond.ll @@ -49,9 +49,12 @@ for.cond: ; preds = %for.inc, %if.then %cmp1 = icmp slt i32 %2, %3 br i1 %cmp1, label %for.body, label %for.cond.cleanup -; CHECK: mov32 w[[LEN:[0-9]+]], w1 -; CHECK: add32 w[[IDX:[0-9]+]], 1 -; CHECK-NEXT: jslt w[[IDX]], w[[LEN]], +; CHECK: mov32 r[[LEN:[0-9]+]], w1 +; CHECK: add32 w[[IDX32:[0-9]+]], 1 +; CHECK: mov64 r[[IDX:[0-9]+]], r[[IDX32:[0-9]+]] +; CHECK: lsh64 r[[IDX:[0-9]+]], 32 +; CHECK: arsh64 r[[IDX:[0-9]+]], 32 +; CHECK-NEXT: jslt r[[IDX]], r[[LEN]], for.cond.cleanup: ; preds = %for.cond %4 = bitcast i32* %i to i8* diff --git a/llvm/test/MC/Disassembler/SBF/sbf-jmp.txt b/llvm/test/MC/Disassembler/SBF/sbf-jmp.txt index b5a683f9a3a7e9..33a35d36a7a63d 100644 --- a/llvm/test/MC/Disassembler/SBF/sbf-jmp.txt +++ b/llvm/test/MC/Disassembler/SBF/sbf-jmp.txt @@ -96,48 +96,6 @@ 0xc5,0x05,0x08,0x00,0x85,0xff,0xff,0xff 0xd5,0x05,0x08,0x00,0x85,0xff,0xff,0xff -# CHECK-NEW: jeq w6, w2, +8 -# CHECK-NEW: jne w6, w2, +8 -# CHECK-NEW: jgt w6, w2, +8 -# CHECK-NEW: jge w6, w2, +8 -# CHECK-NEW: jlt w6, w2, +8 -# CHECK-NEW: jle w6, w2, +8 -# CHECK-NEW: jsgt w6, w2, +8 -# CHECK-NEW: jsge w6, w2, +8 -# CHECK-NEW: jslt w6, w2, +8 -# CHECK-NEW: jsle w6, w2, +8 -0x1e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0x5e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0x2e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0x3e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0xae,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0xbe,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0x6e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0x7e,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0xce,0x26,0x08,0x00,0x00,0x00,0x00,0x00 -0xde,0x26,0x08,0x00,0x00,0x00,0x00,0x00 - -# CHECK-NEW: jeq w5, -123, +8 -# CHECK-NEW: jne w5, -123, +8 -# CHECK-NEW: jgt w5, -123, +8 -# CHECK-NEW: jge w5, -123, +8 -# CHECK-NEW: jlt w5, -123, +8 -# CHECK-NEW: jle w5, -123, +8 -# CHECK-NEW: jsgt w5, -123, +8 -# CHECK-NEW: jsge w5, -123, +8 -# CHECK-NEW: jslt w5, -123, +8 -# CHECK-NEW: jsle w5, -123, +8 -0x16,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0x56,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0x26,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0x36,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0xa6,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0xb6,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0x66,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0x76,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0xc6,0x05,0x08,0x00,0x85,0xff,0xff,0xff -0xd6,0x05,0x08,0x00,0x85,0xff,0xff,0xff - # CHECK-NEW: call 8 0x85,0x00,0x00,0x00,0x08,0x00,0x00,0x00 diff --git a/llvm/test/MC/SBF/insn-unit-32.s b/llvm/test/MC/SBF/insn-unit-32.s index 9e7227258396e0..b44bbc375f40e1 100644 --- a/llvm/test/MC/SBF/insn-unit-32.s +++ b/llvm/test/MC/SBF/insn-unit-32.s @@ -56,50 +56,3 @@ // CHECK-alu32: b4 09 00 00 01 00 00 00 mov32 w9, 0x1 // CHECK-alu32: b4 09 00 00 ff ff ff ff mov32 w9, -0x1 // CHECK: c4 0a 00 00 40 00 00 00 arsh32 w10, 0x40 - - jeq w0, w1, Llabel0 // BPF_JEQ | BPF_X - jne w3, w4, Llabel0 // BPF_JNE | BPF_X -// CHECK: 1e 10 0b 00 00 00 00 00 jeq w0, w1, +0xb -// CHECK: 5e 43 0a 00 00 00 00 00 jne w3, w4, +0xa - - jgt w1, w2, Llabel0 // BPF_JGT | BPF_X - jge w2, w3, Llabel0 // BPF_JGE | BPF_X - jsgt w4, w5, Llabel0 // BPF_JSGT | BPF_X - jsge w5, w6, Llabel0 // BPF_JSGE | BPF_X -// CHECK: 2e 21 09 00 00 00 00 00 jgt w1, w2, +0x9 -// CHECK: 3e 32 08 00 00 00 00 00 jge w2, w3, +0x8 -// CHECK: 6e 54 07 00 00 00 00 00 jsgt w4, w5, +0x7 -// CHECK: 7e 65 06 00 00 00 00 00 jsge w5, w6, +0x6 - - jlt w6, w7, Llabel0 // BPF_JLT | BPF_X - jle w7, w8, Llabel0 // BPF_JLE | BPF_X - jslt w8, w9, Llabel0 // BPF_JSLT | BPF_X - jsle w9, w10, Llabel0 // BPF_JSLE | BPF_X -// CHECK: ae 76 05 00 00 00 00 00 jlt w6, w7, +0x5 -// CHECK: be 87 04 00 00 00 00 00 jle w7, w8, +0x4 -// CHECK: ce 98 03 00 00 00 00 00 jslt w8, w9, +0x3 -// CHECK: de a9 02 00 00 00 00 00 jsle w9, w10, +0x2 - - jeq w0, 0, Llabel0 // BPF_JEQ | BPF_K - jne w3, -1, Llabel0 // BPF_JNE | BPF_K -// CHECK: 16 00 01 00 00 00 00 00 jeq w0, 0x0, +0x1 -// CHECK: 56 03 00 00 ff ff ff ff jne w3, -0x1, +0x0 - -Llabel0 : - jgt w1, 64, Llabel0 // BPF_JGT | BPF_K - jge w2, 0xffffffff, Llabel0 // BPF_JGE | BPF_K - jsgt w4, 0xffffffff, Llabel0 // BPF_JSGT | BPF_K - jsge w5, 0x7fffffff, Llabel0 // BPF_JSGE | BPF_K -// CHECK: 26 01 ff ff 40 00 00 00 jgt w1, 0x40, -0x1 -// CHECK: 36 02 fe ff ff ff ff ff jge w2, -0x1, -0x2 -// CHECK: 66 04 fd ff ff ff ff ff jsgt w4, -0x1, -0x3 -// CHECK: 76 05 fc ff ff ff ff 7f jsge w5, 0x7fffffff, -0x4 - - jlt w6, 0xff, Llabel0 // BPF_JLT | BPF_K - jle w7, 0xffff, Llabel0 // BPF_JLE | BPF_K - jslt w8, 0, Llabel0 // BPF_JSLT | BPF_K - jsle w9, -1, Llabel0 // BPF_JSLE | BPF_K -// CHECK: a6 06 fb ff ff 00 00 00 jlt w6, 0xff, -0x5 -// CHECK: b6 07 fa ff ff ff 00 00 jle w7, 0xffff, -0x6 -// CHECK: c6 08 f9 ff 00 00 00 00 jslt w8, 0x0, -0x7 -// CHECK: d6 09 f8 ff ff ff ff ff jsle w9, -0x1, -0x8 diff --git a/llvm/test/MC/SBF/sbf-jmp.s b/llvm/test/MC/SBF/sbf-jmp.s index ca39066d8d11f6..ac1dbdde2b9294 100644 --- a/llvm/test/MC/SBF/sbf-jmp.s +++ b/llvm/test/MC/SBF/sbf-jmp.s @@ -152,68 +152,6 @@ jsge r5, -123, +8 jslt r5, -123, +8 jsle r5, -123, +8 -# CHECK-OBJ-NEW: jeq w6, w2, +0x8 -# CHECK-OBJ-NEW: jne w6, w2, +0x8 -# CHECK-OBJ-NEW: jgt w6, w2, +0x8 -# CHECK-OBJ-NEW: jge w6, w2, +0x8 -# CHECK-OBJ-NEW: jlt w6, w2, +0x8 -# CHECK-OBJ-NEW: jle w6, w2, +0x8 -# CHECK-OBJ-NEW: jsgt w6, w2, +0x8 -# CHECK-OBJ-NEW: jsge w6, w2, +0x8 -# CHECK-OBJ-NEW: jslt w6, w2, +0x8 -# CHECK-OBJ-NEW: jsle w6, w2, +0x8 -# CHECK-ASM-NEW: encoding: [0x1e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0x5e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0x2e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0x3e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0xae,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0xbe,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0x6e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0x7e,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0xce,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -# CHECK-ASM-NEW: encoding: [0xde,0x26,0x08,0x00,0x00,0x00,0x00,0x00] -jeq w6, w2, +8 -jne w6, w2, +8 -jgt w6, w2, +8 -jge w6, w2, +8 -jlt w6, w2, +8 -jle w6, w2, +8 -jsgt w6, w2, +8 -jsge w6, w2, +8 -jslt w6, w2, +8 -jsle w6, w2, +8 - -# CHECK-OBJ-NEW: jeq w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jne w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jgt w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jge w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jlt w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jle w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jsgt w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jsge w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jslt w5, -0x7b, +0x8 -# CHECK-OBJ-NEW: jsle w5, -0x7b, +0x8 -# CHECK-ASM-NEW: encoding: [0x16,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0x56,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0x26,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0x36,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0xa6,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0xb6,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0x66,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0x76,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0xc6,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -# CHECK-ASM-NEW: encoding: [0xd6,0x05,0x08,0x00,0x85,0xff,0xff,0xff] -jeq w5, -123, +8 -jne w5, -123, +8 -jgt w5, -123, +8 -jge w5, -123, +8 -jlt w5, -123, +8 -jle w5, -123, +8 -jsgt w5, -123, +8 -jsge w5, -123, +8 -jslt w5, -123, +8 -jsle w5, -123, +8 - # CHECK-OBJ-NEW: call 0x8 # CHECK-ASM-NEW: encoding: [0x85,0x00,0x00,0x00,0x08,0x00,0x00,0x00]