From bfa9eb4fa7f07057d75545288cd654f1081d6df1 Mon Sep 17 00:00:00 2001 From: Lucas Date: Wed, 20 Nov 2024 19:52:00 -0300 Subject: [PATCH] Test peephole --- llvm/lib/Target/SBF/SBFInstrInfo.td | 7 ++ llvm/lib/Target/SBF/SBFMIPeephole.cpp | 125 +++++++++++++++++++-- llvm/lib/Target/SBF/SBFTargetMachine.cpp | 6 +- llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll | 4 +- 4 files changed, 131 insertions(+), 11 deletions(-) diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td index 5216f2e661c37ee..39abe3ef5fc891a 100644 --- a/llvm/lib/Target/SBF/SBFInstrInfo.td +++ b/llvm/lib/Target/SBF/SBFInstrInfo.td @@ -423,6 +423,12 @@ let DecoderNamespace = "SBFv2" in { (ins GPR32:$src), "mov64 $dst, $src", []>, Requires<[SBFExplicitSignExt]>; + + def MOV_64_sign_ext : MATH_RR, Requires<[SBFExplicitSignExt]>; } def MOV_ri_32 : MATH_RI, Requires<[SBFExplicitSignExt]>; + // SBFv1 sign extension def : Pat<(i64 (sext GPR32:$src)), (SRA_ri (SLL_ri (MOV_32_64 GPR32:$src), 32), 32)>, Requires<[SBFNoExplicitSignExt]>; diff --git a/llvm/lib/Target/SBF/SBFMIPeephole.cpp b/llvm/lib/Target/SBF/SBFMIPeephole.cpp index e88bad1e46c396c..ee8bb80f0ad6a23 100644 --- a/llvm/lib/Target/SBF/SBFMIPeephole.cpp +++ b/llvm/lib/Target/SBF/SBFMIPeephole.cpp @@ -28,6 +28,7 @@ #include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Support/Debug.h" #include +#include using namespace llvm; @@ -58,6 +59,8 @@ struct SBFMIPeephole : public MachineFunctionPass { bool isMovFrom32Def(MachineInstr *MovMI); bool eliminateZExtSeq(); bool eliminateZExt(); + bool simplifySext(); + bool simplifyZext(); std::set PhiInsns; @@ -65,17 +68,19 @@ struct SBFMIPeephole : public MachineFunctionPass { // Main entry point for this pass. bool runOnMachineFunction(MachineFunction &MF) override { - if (skipFunction(MF.getFunction())) - return false; + std::cout << "running!" << std::endl; +// if (skipFunction(MF.getFunction())) +// return false; initialize(MF); + return simplifySext(); // || simplifyZext(); // First try to eliminate (zext, lshift, rshift) and then // try to eliminate zext. - bool ZExtSeqExist, ZExtExist; - ZExtSeqExist = eliminateZExtSeq(); - ZExtExist = eliminateZExt(); - return ZExtSeqExist || ZExtExist; +// bool ZExtSeqExist, ZExtExist; +// ZExtSeqExist = eliminateZExtSeq(); +// ZExtExist = eliminateZExt(); +// return ZExtSeqExist || ZExtExist; } }; @@ -87,6 +92,112 @@ void SBFMIPeephole::initialize(MachineFunction &MFParm) { LLVM_DEBUG(dbgs() << "*** SBF MachineSSA ZEXT Elim peephole pass ***\n\n"); } +bool SBFMIPeephole::simplifySext() { + std::cout << "Simplifying!" << std::endl; + MachineInstr * ToErase = nullptr; + bool Eliminated = false; + for (MachineBasicBlock &MBB : *MF) { + for (MachineInstr &MI: MBB) { + if (ToErase) { + ToErase->eraseFromParent(); + ToErase = nullptr; + } + + if (MI.getOpcode() == SBF::SRA_ri && + MI.getOperand(2).getImm() == 32) { + + Register DstReg = MI.getOperand(0).getReg(); + Register ShfReg = MI.getOperand(1).getReg(); + MachineInstr *SllMI = MRI->getVRegDef(ShfReg); + + std::cout << "Found SRA" << std::endl; + if (!SllMI || + SllMI->isPHI() || + SllMI->getOpcode() != SBF::SLL_ri || + SllMI->getOperand(2).getImm() != 32) + continue; + + MachineInstr *MovMI = MRI->getVRegDef(SllMI->getOperand(1).getReg()); + std::cout << "Found SLL" << std::endl; + + std::cout << "MOV: " << MovMI->getOpcode() << std::endl; + if (!MovMI || + MovMI->isPHI() || + MovMI->getOpcode() != SBF::COPY) + continue; + + std::cout << "Found MOV" << std::endl; + Register SubReg = MovMI->getOperand(1).getReg(); + //MachineInstr *PrevInstr = MRI->getVRegDef(SllMI->getOperand(1).getReg()); + +// Register DstMy = MRI->createVirtualRegister(&SBF::GPRRegClass); + BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(SBF::MOV_64_sign_ext), DstReg) + .addReg(SubReg); + + std::cout << "Built Instr" << std::endl; + SllMI->eraseFromParent(); + MovMI->eraseFromParent(); + std::cout << "Erased one" << std::endl; + ToErase = &MI; + Eliminated = true; + } + } + } + + if (ToErase) { + ToErase->eraseFromParent(); + ToErase = nullptr; + } + return Eliminated; +} + +bool SBFMIPeephole::simplifyZext() { + std::cout << "Simplifying!" << std::endl; + MachineInstr * ToErase = nullptr; + bool Eliminated = false; + for (MachineBasicBlock &MBB : *MF) { + for (MachineInstr &MI: MBB) { + if (ToErase) { + ToErase->eraseFromParent(); + ToErase = nullptr; + } + + if (MI.getOpcode() == SBF::SRL_ri && + MI.getOperand(2).getImm() == 32) { + std::cout << "Found arsh64" << std::endl; + + Register DstReg = MI.getOperand(0).getReg(); + Register ShfReg = MI.getOperand(1).getReg(); + MachineInstr *SllMI = MRI->getVRegDef(ShfReg); + + if (!SllMI || + SllMI->isPHI() || + SllMI->getOpcode() != SBF::SLL_ri || + SllMI->getOperand(2).getImm() != 32) + continue; + + std::cout << "Found lsh" << std::endl; + MachineInstr *PrevInstr = MRI->getVRegDef(SllMI->getOperand(1).getReg()); + std::cout << "Got prev instr: " << (uint64_t)PrevInstr << std::endl; + BuildMI(MBB, PrevInstr, PrevInstr->getDebugLoc(), TII->get(SBF::AND_ri_32), DstReg) + .addReg(DstReg).addImm(0xffffffff); + + std::cout << "Built Instr" << std::endl; + SllMI->eraseFromParent(); + std::cout << "Erased one" << std::endl; + ToErase = &MI; + Eliminated = true; + } + } + } + + if (ToErase) { + ToErase->eraseFromParent(); + ToErase = nullptr; + } + return Eliminated; +} + bool SBFMIPeephole::isCopyFrom32Def(MachineInstr *CopyMI) { MachineOperand &opnd = CopyMI->getOperand(1); @@ -323,7 +434,7 @@ struct SBFMIPreEmitPeephole : public MachineFunctionPass { initialize(MF); - return eliminateRedundantMov(); + return false; //eliminateRedundantMov(); } }; diff --git a/llvm/lib/Target/SBF/SBFTargetMachine.cpp b/llvm/lib/Target/SBF/SBFTargetMachine.cpp index 20f1de30d04f47d..c9a27345161556e 100644 --- a/llvm/lib/Target/SBF/SBFTargetMachine.cpp +++ b/llvm/lib/Target/SBF/SBFTargetMachine.cpp @@ -159,9 +159,11 @@ void SBFPassConfig::addMachineSSAOptimization() { TargetPassConfig::addMachineSSAOptimization(); const SBFSubtarget *Subtarget = getSBFTargetMachine().getSubtargetImpl(); + addPass(createSBFMIPeepholePass()); + if (!DisableMIPeephole) { - if (Subtarget->getHasAlu32()) - addPass(createSBFMIPeepholePass()); +// if (Subtarget->getHasAlu32()) +// addPass(createSBFMIPeepholePass()); addPass(createSBFMIPeepholeTruncElimPass()); } } diff --git a/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll b/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll index 91183a6a09eadbd..e5abb673f4a94ae 100644 --- a/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll +++ b/llvm/test/CodeGen/SBF/32-bit-subreg-alu.ll @@ -130,7 +130,7 @@ define dso_local i32 @mov(i32 returned %a) local_unnamed_addr #0 { entry: ret i32 %a -; CHECK: mov32 w{{[0-9]+}}, w{{[0-9]+}} +; CHECK: mov64 w{{[0-9]+}}, w{{[0-9]+}} } ; Function Attrs: norecurse nounwind readnone @@ -320,6 +320,6 @@ entry: define dso_local i32 @neg(i32 %a) local_unnamed_addr #0 { entry: %sub = sub nsw i32 0, %a -; CHECK: mov32 w{{[0-9]+}}, w{{[0-9]+}} +; CHECK: mov64 w{{[0-9]+}}, w{{[0-9]+}} ret i32 %sub }