diff --git a/mlton/codegen/x86-codegen/x86-allocate-registers.fun b/mlton/codegen/x86-codegen/x86-allocate-registers.fun
index a747ad710..ae95b6181 100644
--- a/mlton/codegen/x86-codegen/x86-allocate-registers.fun
+++ b/mlton/codegen/x86-codegen/x86-allocate-registers.fun
@@ -6599,18 +6599,18 @@ struct
                  registerAllocation,
                  src, dst, srcsize, dstsize} =
          let
+            val {uses,defs,kills}
+               = Instruction.uses_defs_kills instruction
+            val {assembly = assembly_pre,
+                 registerAllocation}
+               = RA.pre {uses = uses,
+                         defs = defs,
+                         kills = kills,
+                         info = info,
+                         registerAllocation = registerAllocation}
+
             fun default ()
                = let
-                    val {uses,defs,kills} 
-                       = Instruction.uses_defs_kills instruction
-                    val {assembly = assembly_pre,
-                         registerAllocation}
-                       = RA.pre {uses = uses,
-                                 defs = defs,
-                                 kills = kills,
-                                 info = info,
-                                 registerAllocation = registerAllocation}
-
                     val {operand = final_src,
                          assembly = assembly_src,
                          registerAllocation,
@@ -6680,16 +6680,6 @@ struct
 
             fun default' ()
                = let
-                    val {uses,defs,kills} 
-                       = Instruction.uses_defs_kills instruction
-                    val {assembly = assembly_pre,
-                         registerAllocation}
-                       = RA.pre {uses = uses,
-                                 defs = defs,
-                                 kills = kills,
-                                 info = info,
-                                 registerAllocation = registerAllocation}
-
                     val {operand = final_src,
                          assembly = assembly_src,
                          registerAllocation,
@@ -6799,19 +6789,6 @@ struct
                                                         registerAllocation 
                                                         = registerAllocation}
 
-                                                  val {uses,defs,kills} 
-                                                     = Instruction.uses_defs_kills
-                                                       instruction
-                                                  val {assembly = assembly_pre,
-                                                       registerAllocation}
-                                                     = RA.pre 
-                                                       {uses = uses,
-                                                        defs = defs,
-                                                        kills = kills,
-                                                        info = info,
-                                                        registerAllocation 
-                                                        = registerAllocation}
-
                                                   val final_uses = []
                                                   val final_defs 
                                                      = [Operand.fltregister