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LOCK.htm
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LOCK.htm
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<!DOCTYPE HTML PUBLIC "-//IETF//DTD HTML 2.0//EN">
<HTML>
<HEAD>
<TITLE>80386 Programmer's Reference Manual -- Opcode LOCK</TITLE>
</HEAD>
<BODY STYLE="width:80ch">
<B>up:</B> <A HREF="c17.htm">
Chapter 17 -- 80386 Instruction Set</A><BR>
<B>prev:</B><A HREF="LMSW.htm"> LMSW Load Machine Status Word</A><BR>
<B>next:</B><A HREF="LODS.htm"> LODS/LODSB/LODSW/LODSD Load String Operand</A>
<P>
<HR>
<P>
<H1>LOCK -- Assert LOCK# Signal Prefix</H1>
<PRE>
Opcode Instruction Clocks Description
F0 LOCK 0 Assert LOCK# signal for the next instruction
</PRE>
<H2>Description</H2>
The LOCK prefix causes the LOCK# signal of the 80386 to be asserted
during execution of the instruction that follows it. In a multiprocessor
environment, this signal can be used to ensure that the 80386 has
exclusive use of any shared memory while LOCK# is asserted. The
read-modify-write sequence typically used to implement test-and-set on the
80386 is the
<A HREF="BTS.htm">BTS</A> instruction.
<P>
The LOCK prefix functions only with the following instructions:
<PRE>
<A HREF="BT.htm">BT</A>, <A HREF="BTS.htm">BTS</A>, <A HREF="BTR.htm">BTR</A>, <A HREF="BTC.htm">BTC</A> mem, reg/imm
<A HREF="XCHG.htm">XCHG</A> reg, mem
<A HREF="XCHG.htm">XCHG</A> mem, reg
<A HREF="ADD.htm">ADD</A>, <A HREF="OR.htm">OR</A>, <A HREF="ADC.htm">ADC</A>, <A HREF="SBB.htm">SBB</A>, <A HREF="AND.htm">AND</A>, <A HREF="SUB.htm">SUB</A>, <A HREF="XOR.htm">XOR</A> mem, reg/imm
<A HREF="NOT.htm">NOT</A>, <A HREF="NEG.htm">NEG</A>, <A HREF="INC.htm">INC</A>, <A HREF="DEC.htm">DEC</A> mem
</PRE>
An undefined opcode trap will be generated if a LOCK prefix is used
with any instruction not listed above.
<P>
<A HREF="XCHG.htm">XCHG</A> always asserts LOCK# regardless of the presence or absence of
the LOCK prefix.
<P>
The integrity of the LOCK is not affected by the alignment of the
memory field. Memory locking is observed for arbitrarily misaligned
fields.
<P>
Locked access is not assured if another 80386 processor is executing an
instruction concurrently that has one of the following characteristics:
<UL>
<LI> Is not preceded by a LOCK prefix
<LI> Is not one of the instructions in the preceding list
<LI> Specifies a memory operand that does not exactly overlap the
destination operand. Locking is not guaranteed for partial overlap,
even if one memory operand is wholly contained within another.
</UL>
<H2>Flags Affected</H2>
None
<H2>Protected Mode Exceptions</H2>
#UD if LOCK is used with an instruction not listed in the "Description"
section above; other exceptions can be generated by the subsequent
(locked) instruction
<H2>Real Address Mode Exceptions</H2>
Interrupt 6 if LOCK is used with an instruction not listed in the
"Description" section above; exceptions can still be generated by the
subsequent (locked) instruction
<H2>Virtual 8086 Mode Exceptions</H2>
#UD if LOCK is used with an instruction not listed in the "Description"
section above; exceptions can still be generated by the subsequent (locked)
instruction
<P>
<HR>
<P>
<B>up:</B> <A HREF="c17.htm">
Chapter 17 -- 80386 Instruction Set</A><BR>
<B>prev:</B><A HREF="LMSW.htm"> LMSW Load Machine Status Word</A><BR>
<B>next:</B><A HREF="LODS.htm"> LODS/LODSB/LODSW/LODSD Load String Operand</A>
</BODY>