From 5be369414b249dbc6a6eaf572d7bc1b6b2c0e8db Mon Sep 17 00:00:00 2001
From: Huaqi Fang <578567190@qq.com>
Date: Mon, 3 Jun 2024 18:09:19 +0800
Subject: [PATCH] backup code, flashxip mode wip
Signed-off-by: Huaqi Fang <578567190@qq.com>
---
OS/FreeRTOS/Source/portable/IAR/portasm.S | 8 +-------
OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S | 8 +++-----
OS/UCOSII/arch/os_cpu_port.c | 1 -
ideprojects/iar/baremetal/helloworld.ewp | 8 ++++----
ideprojects/iar/rtos/rtthread_demo.ewp | 7 ++-----
ideprojects/iar/rtos/rtthread_msh.ewp | 3 ---
6 files changed, 10 insertions(+), 25 deletions(-)
diff --git a/OS/FreeRTOS/Source/portable/IAR/portasm.S b/OS/FreeRTOS/Source/portable/IAR/portasm.S
index d29c95a8..a9d72c1c 100644
--- a/OS/FreeRTOS/Source/portable/IAR/portasm.S
+++ b/OS/FreeRTOS/Source/portable/IAR/portasm.S
@@ -37,7 +37,7 @@
#define portCONTEXT_SIZE ( portRegNum * REGBYTES )
- PUBLIC prvPortStartFirstTask, eclic_msip_handler
+ PUBLIC prvPortStartFirstTask, irqc_msip_handler
EXTERN xPortTaskSwitch
EXTERN pxCurrentTCB
EXTERN CSTACK$$Limit
@@ -55,8 +55,6 @@ prvPortStartFirstTask:
before the scheduler is started is
no longer required after the scheduler is started.
Interrupt stack pointer is stored in CSR_MSCRATCH */
- la t0, CSTACK$$Limit
- csrw CSR_MSCRATCH, t0
LOAD sp, pxCurrentTCB /* Load pxCurrentTCB. */
LOAD sp, 0x0(sp) /* Read sp from first TCB member */
@@ -198,8 +196,4 @@ irqc_msip_handler:
addi sp, sp, portCONTEXT_SIZE
mret
-default_intexc_handler:
-Undef_Handler:
- j Undef_Handler
-
END
diff --git a/OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S b/OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S
index ad887cfe..a3af9c29 100644
--- a/OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S
+++ b/OS/RTThread/libcpu/risc-v/nuclei/iar/context_iar.S
@@ -5,7 +5,7 @@
*
* Change Logs:
* Date Author Notes
- * 2023/09/15 Huaqi First Nuclei RISC-V porting implementation For IAR CC
+ * 2024/06/03 Huaqi First Nuclei N100 RISC-V porting implementation For IAR CC
*/
#include "riscv_encoding.h"
@@ -22,7 +22,7 @@
EXTERN rt_interrupt_to_thread
EXTERN CSTACK$$Limit
EXTERN xPortTaskSwitch
- PUBLIC rt_hw_context_switch_to, eclic_msip_handler
+ PUBLIC rt_hw_context_switch_to, irqc_msip_handler
SECTION `.text`:CODE:NOROOT(2)
CODE
@@ -43,8 +43,6 @@ rt_hw_context_switch_to:
before the scheduler is started is
no longer required after the scheduler is started.
Interrupt stack pointer is stored in CSR_MSCRATCH */
- la t0, CSTACK$$Limit
- csrw CSR_MSCRATCH, t0
LOAD sp, 0x0(a0) /* Read sp from first TCB member(a0) */
/* Pop PC from stack and set MEPC */
@@ -91,7 +89,7 @@ rt_hw_context_switch_to:
mret
ALIGN 2
-eclic_msip_handler:
+irqc_msip_handler:
addi sp, sp, -portCONTEXT_SIZE
STORE x1, 1 * REGBYTES(sp) /* RA */
STORE x5, 2 * REGBYTES(sp)
diff --git a/OS/UCOSII/arch/os_cpu_port.c b/OS/UCOSII/arch/os_cpu_port.c
index 1924859f..a209be03 100644
--- a/OS/UCOSII/arch/os_cpu_port.c
+++ b/OS/UCOSII/arch/os_cpu_port.c
@@ -54,7 +54,6 @@ void vPortSetupTimerInterrupt(void);
*/
#define xPortSysTickHandler irqc_mtip_handler
-void xPortSysTickHandler(void);
/*
* Start first task is a separate function so it can be tested in isolation.
diff --git a/ideprojects/iar/baremetal/helloworld.ewp b/ideprojects/iar/baremetal/helloworld.ewp
index a999b713..0a9eca1f 100644
--- a/ideprojects/iar/baremetal/helloworld.ewp
+++ b/ideprojects/iar/baremetal/helloworld.ewp
@@ -125,7 +125,7 @@