esp (8266/32) and 74HC595 in hardware through I2S DMA ?

[bschwand]

Hi,

I was wondering if the gpio expansion on the esp boards is using I2s DMA for fast no-cpu load step generation like explained here https://github.com/lhartmann/esp8266_reprap

Marlin uses it for example, some other firmwares too. On marlin they implemented it at the HAL level so everything above looks like a normal pin. I understand the current code uses hardware SPI too but I think the DMA approach has advantages too, also it might then be possible to do input pin expansion by using a 74hc165 and I2S input.

Also I do not know if anyone is doing that but with DMA it would be possible to pre-generate steps in blocks in order to reach very high steprates even if the control loop itself runs at a much lower frequency (since the I2S DMA would pump out the pin states on its own). I imagine with that even on a low esp8266 200kHz step rate could be possible (optimistically)

I was searching through uCNC code and can not find anything but software step generation on the esp with 74'595.
Am I right to think this I2S DMA scheme is not implemented in uCNC ?

Just asking before I go on another wild goose chase...

Thanks

[Paciente8159]

Hi there,

On ESP32 it's possible to drive up to 4 chained 74HC595 I2S with DMA buffer (it the solution used in some of the boards like MKS-DLC32 and Tinybee). See here
On RP2040 it's possible to drive up to 4 chained 74HC595 using a custom PIO (no DMA). See here
I'm currently working on refactoring the whole code for the ESP8266 (the I2S is also on the menu), but this will collide with the default UART pins and will mean that an UART configuration will be required. I'm also exploring the possibility of using the small SPI fifo buffer to get some headroom. The 200KHz step might be hard to achieve, specially if you add WiFi to the equation.

There are drawbacks to the whole DMA approach. One is the true realtime stuff (like some special modes), but they can be minimized or compensated in other ways.

As for 74hc165 as input, the HAL is partially designed with that in mind and should be fairly trivial to add it, but it's not currently fully implemented.

[bschwand]

I was looking the wrong way, I did not realize the esp32 had it.

Thanks a lot for the answers. Glad to see it's on the roadmap for the esp8266. Even if not 200kHz (I agree it's really an absolute best case scenario) it would be great to manage closer to 50-100kHz on that platform.

[Paciente8159]

This is a bit too early to commemorate...but I have been refactoring the ESP8266 code. I seem to be able to achieve 64kHz maximum stepping rate with up to 4 chained 74HC595 IC's via hardware SPI and Wifi working.

This is without any added modules (like the web pendant or others), so I don't know how this will stick.
I have not test the motion in this so I also don't now how smooth or not it is.

I went for the SPI solution first because as I said the I2S uses pinout that is overlapped with the UART used in most ESP8266 boards.

After a lot of brainstorming I came up with a solution that seems to work, although it might need some adjustments.
I'll give you some more feedback soon.

[bschwand]

Impressive, that is very encouraging !
I make my own boards with esp modules, I think pinout "compatibility" is not an issue

[Paciente8159]

This SPI/ISR as an added benefit. It very well might allow support for 74HC165 IC's integration in (almost) one take as any reading from the inputs can be handled in (almost true) realtime. DMA does not allow for that has the induced buffer delay would not for that.
This new approach made me have a bunch of ideas (using other API's on µCNC) that might be translatable to other MCU's to allow very high rate stepping frequencies.

[Paciente8159]

This new branch generalizes the HAL to work with both output shift registers (74HC595) as well as input shift registers (74HC165).
This still as to be tested and experimented on.