From ebad9b5274f7bf19757531c8519ca0a4b9c2309d Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 8 Dec 2015 20:34:06 -0600 Subject: [PATCH 01/18] Add support for Olimex AM3352-SOM fixes: https://github.com/beagleboard/linux/pull/53 fixes: https://github.com/beagleboard/linux/pull/52 Signed-off-by: Robert Nelson --- src/arm/am335x-olimex-som.dts | 189 ++++++++++++++ src/arm/am335x-som-common.dtsi | 451 +++++++++++++++++++++++++++++++++ 2 files changed, 640 insertions(+) create mode 100644 src/arm/am335x-olimex-som.dts create mode 100644 src/arm/am335x-som-common.dtsi diff --git a/src/arm/am335x-olimex-som.dts b/src/arm/am335x-olimex-som.dts new file mode 100644 index 0000000..63879e4 --- /dev/null +++ b/src/arm/am335x-olimex-som.dts @@ -0,0 +1,189 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-som-common.dtsi" + +/ { + model = "Olimex AM335x SOM"; + compatible = "ti,am33xx"; +}; + +&ldo3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; + +&am33xx_pinmux { + lcd_pins_default: lcd_pins_default { + pinctrl-single,pins = < + 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */ + 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */ + 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */ + 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */ + 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */ + 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */ + 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */ + 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */ + 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */ + 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */ + 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */ + 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */ + 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */ + 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */ + 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */ + 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */ + 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */ + 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */ + 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */ + 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */ + 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */ + 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */ + 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */ + 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */ + 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */ + 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */ + 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */ + 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */ + >; + }; + + lcd_pins_sleep: lcd_pins_sleep { + pinctrl-single,pins = < + 0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data16 */ + 0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data17 */ + 0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data18 */ + 0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data19 */ + 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data20 */ + 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data21 */ + 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data22 */ + 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data23 */ + 0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */ + 0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */ + 0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */ + 0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */ + 0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */ + 0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */ + 0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */ + 0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */ + 0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */ + 0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */ + 0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */ + 0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */ + 0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */ + 0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */ + 0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */ + 0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */ + /* lcd_vsync.lcd_vsync,OUTPUT | MODE0 */ + 0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */ + 0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */ + /* lcd_ac_bias_en.lcd_ac_bias_en */ + 0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + +}; + +&lcdc { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&lcd_pins_default>; + pinctrl-1 = <&lcd_pins_sleep>; + status = "okay"; + /* display-timings { + 480x272 { + hactive = <480>; + vactive = <272>; + hback-porch = <43>; + hfront-porch = <8>; + hsync-len = <4>; + vback-porch = <12>; + vfront-porch = <4>; + vsync-len = <10>; + clock-frequency = <9000000>; + hsync-active = <0>; + vsync-active = <0>; + }; + };*/ + + display-timings { + native-mode = <&vga1024x768>; + lcd4: 480x272 { + clock-frequency = <9000000>; + hactive = <480>; + vactive = <272>; + hfront-porch = <3>; + hback-porch = <40>; + vback-porch = <8>; + vfront-porch = <7>; + hsync-len = <2>; + vsync-len = <1>; + hsync-active = <0>; + vsync-active = <0>; + }; + lcd7: 800x480 { + clock-frequency = <33300000>; + hactive = <800>; + vactive = <480>; + hfront-porch = <210>; + hback-porch = <40>; + vback-porch = <23>; + vfront-porch = <20>; + hsync-len = <6>; + vsync-len = <2>; + hsync-active = <0>; + vsync-active = <0>; + }; + lcd10: 1024x600 { + clock-frequency = <51200000>; + hactive = <1024>; + vactive = <600>; + hfront-porch = <160>; + hback-porch = <140>; + vback-porch = <20>; + vfront-porch = <12>; + hsync-len = <20>; + vsync-len = <3>; + hsync-active = <0>; + vsync-active = <0>; + }; + + vga800x600: 800x600 { + clock-frequency = <40000000>; + hactive = <800>; + vactive = <600>; + hfront-porch = <40>; + hback-porch = <88>; + vfront-porch = <1>; + vback-porch = <23>; + hsync-len = <128>; + vsync-len = <4>; + hsync-active = <0>; + vsync-active = <0>; + }; + vga1024x768: 1024x768 { + clock-frequency = <65000000>; + hactive = <1024>; + hfront-porch = <24>; + hback-porch = <160>; + hsync-len = <136>; + vactive = <768>; + vfront-porch = <3>; + vback-porch = <29>; + vsync-len = <6>; + hsync-active = <0>; + vsync-active = <0>; + }; + }; +}; diff --git a/src/arm/am335x-som-common.dtsi b/src/arm/am335x-som-common.dtsi new file mode 100644 index 0000000..56e4ce4 --- /dev/null +++ b/src/arm/am335x-som-common.dtsi @@ -0,0 +1,451 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + + cpus { + cpu@0 { + cpu0-supply = <&dcdc2_fixed>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x80000000 0x20000000>; /* 512 MB */ + }; + + ocp { + uart0: serial@44e09000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + + status = "okay"; + }; + uart1: serial@48022000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + + }; + uart4: serial@481a8000 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + status = "okay"; + }; + epwmss0: epwmss@48300000 { + status = "okay"; + + ecap0: ecap@48300100 { + status = "okay"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ecap0_pins_default>; + pinctrl-1 = <&ecap0_pins_sleep>; + }; + }; + + musb: usb@47400000 { + status = "okay"; + + control@44e10000 { + status = "okay"; + }; + + usb-phy@47401300 { + status = "okay"; + }; + + usb-phy@47401b00 { + status = "okay"; + }; + + usb@47401000 { + status = "okay"; + dr_mode = "otg"; + }; + + usb@47401800 { + status = "okay"; + dr_mode = "host"; + }; + + dma-controller@07402000 { + status = "okay"; + }; + }; + + i2c0: i2c@44e0b000 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + + + tps: tps@24 { + reg = <0x24>; + }; + + }; + }; + + vmmcsd_fixed: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "vmmcsd_fixed"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + dcdc2_fixed: fixedregulator@1 { + /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */ + compatible = "regulator-fixed"; + regulator-name = "dcdc2_fixed"; + + regulator-min-microvolt = <1378000>; + regulator-max-microvolt = <1378000>; + regulator-boot-on; + regulator-always-on; + }; + + leds { + pinctrl-names = "default"; + pinctrl-0 = <&user_leds_s0>; + + compatible = "gpio-leds"; + + led@1 { + label = "led1:green:heartbeat"; + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led@2 { + label = "led2:red:heartbeat"; + gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led@3 { + label = "led3:yello:heartbeat"; + gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led@4 { + label = "bkl"; + gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + }; + + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ecap0 0 50000 1>; + brightness-levels = <0 51 53 56 62 75 101 152 255>; + default-brightness-level = <8>; + }; + +}; + +&am33xx_pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&clkout2_pin>; + + + user_leds_s0: user_leds_s0 { + pinctrl-single,pins = < + 0x1b0 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* xdma_event_intr0.gpio0_19 */ + 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_20 */ + 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr1.gpio3_21 */ + 0x1a4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_fsr.gpio3[19], INPUT_PULLDOWN | MODE7 */ + + >; + }; + + i2c0_pins: pinmux_i2c0_pins { + pinctrl-single,pins = < + 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ + 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ + >; + }; + + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ + 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ + >; + }; + + uart1_pins: pinmux_uart1_pins { + pinctrl-single,pins = < + 0x168 (PIN_INPUT_PULLUP | MUX_MODE1) + 0x16c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) + >; + }; + + uart4_pins: pinmux_uart4_pins { + pinctrl-single,pins = < + 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) + 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) + >; + }; + + + + clkout2_pin: pinmux_clkout2_pin { + pinctrl-single,pins = < + 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* xdma_event_intr1.clkout2 */ + >; + }; + + cpsw_default: cpsw_default { + pinctrl-single,pins = < + /* Slave 1 */ + 0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */ + 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */ + 0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */ + 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */ + 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */ + 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */ + 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */ + 0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */ + 0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */ + 0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */ + 0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */ + 0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */ + 0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */ + + 0x040 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a0.gmii2_txen, OUTPUT_PULLDOWN | MODE1 */ + 0x044 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a1.gmii2_rxdv, INPUT_PULLDOWN | MODE1 */ + 0x048 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a2.gmii2_txd3, OUTPUT_PULLDOWN | MODE1 */ + 0x04c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a3.gmii2_txd2, OUTPUT_PULLDOWN | MODE1 */ + 0x050 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a4.gmii2_txd1, OUTPUT_PULLDOWN | MODE1 */ + 0x054 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* gpmc_a5.gmii2_txd0, OUTPUT_PULLDOWN | MODE1 */ + 0x058 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a6.gmii2_txclk, INPUT_PULLDOWN | MODE1 */ + 0x05c (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a7.gmii2_rxclk, INPUT_PULLDOWN | MODE1 */ + 0x060 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a8.gmii2_rxd3, INPUT_PULLDOWN | MODE1 */ + 0x064 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a9.gmii2_rxd2, INPUT_PULLDOWN | MODE1 */ + 0x068 (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a10.gmii2_rxd1, INPUT_PULLDOWN | MODE1 */ + 0x06c (PIN_INPUT_PULLDOWN | MUX_MODE1 ) /* gpmc_a11.gmii2_rxd0, INPUT_PULLDOWN | MODE1 */ + 0x070 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_wait0.gmii2_crs, INPUT_PULLUP | MODE1 */ + 0x074 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_wpn.gmii2_rxer, INPUT_PULLUP | MODE1 */ + 0x078 (PIN_INPUT_PULLUP | MUX_MODE1 ) /* gpmc_ben1.gmii2_col, INPUT_PULLUP | MODE1 */ + + >; + }; + + cpsw_sleep: cpsw_sleep { + pinctrl-single,pins = < + /* Slave 1 reset value */ + 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) + + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x074 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x078 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + davinci_mdio_default: davinci_mdio_default { + pinctrl-single,pins = < + /* MDIO */ + 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ + 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ + >; + }; + + davinci_mdio_sleep: davinci_mdio_sleep { + pinctrl-single,pins = < + /* MDIO reset value */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + mmc1_pins_default: pinmux_mmc1_pins { + pinctrl-single,pins = < + 0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ + 0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ + 0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ + 0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ + 0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */ + 0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ + 0x1A0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3_18 */ + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ + >; + }; + + mmc1_pins_sleep: pinmux_mmc1_pins_sleep { + pinctrl-single,pins = < + 0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x1A0 (PIN_INPUT_PULLDOWN | MUX_MODE7) + 0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7) + >; + }; + + emmc_pins: pinmux_emmc_pins { + pinctrl-single,pins = < + 0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ + 0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ + 0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ + 0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ + 0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ + 0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ + 0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ + 0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ + 0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ + 0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ + >; + }; + + ecap0_pins_default: backlight_pins { + pinctrl-single,pins = < + 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */ + >; + }; + + ecap0_pins_sleep: ecap0_pins_sleep { + pinctrl-single,pins = < + 0x164 (PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ + >; + }; + dcan0_default: dcan0_default_pins { + pinctrl-single,pins = < + 0x178 0x0a /* uart1_ctsn.dcan0_tx_mux2, OUTPUT | MODE2 */ + 0x17c 0x2a /* uart1_rtsn.dcan0_rx_mux2, INPUT | MODE2 */ + >; + }; + }; + + +/include/ "tps65217.dtsi" + +&tps { + regulators { + dcdc1_reg: regulator@0 { + regulator-always-on; + }; + + dcdc2_reg: regulator@1 { + /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */ + regulator-name = "vdd_mpu"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1378000>; + regulator-boot-on; + regulator-always-on; + }; + + dcdc3_reg: regulator@2 { + /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ + regulator-name = "vdd_core"; + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <1150000>; + regulator-boot-on; + regulator-always-on; + }; + + ldo1_reg: regulator@3 { + regulator-always-on; + }; + + ldo2_reg: regulator@4 { + regulator-always-on; + }; + + ldo3_reg: regulator@5 { + regulator-always-on; + }; + + ldo4_reg: regulator@6 { + regulator-always-on; + }; + }; +}; + +&cpsw_emac0 { + phy_id = <&davinci_mdio>, <0>; + phy-mode = "mii"; +}; + +&cpsw_emac1 { + phy_id = <&davinci_mdio>, <1>; + phy-mode = "mii"; +}; + +&mac { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&cpsw_default>; + pinctrl-1 = <&cpsw_sleep>; + slaves = <2>; + dual_emac = <1>; + status = "okay"; +}; + +&davinci_mdio { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&davinci_mdio_default>; + pinctrl-1 = <&davinci_mdio_sleep>; + status = "okay"; +}; + +&mmc1 { + status = "okay"; + bus-width = <0x4>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_sleep>; + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + cd-inverted; +}; + +&dcan0 { + pinctrl-names = "default"; + pinctrl-0 = <&dcan0_default>; + status = "okay"; +}; + +&tscadc { + status = "okay"; + tsc { + ti,wires = <4>; + ti,x-plate-resistance = <200>; + ti,coordinate-readouts = <5>; + ti,wire-config = <0x00 0x11 0x22 0x33>; + }; + + adc { + ti,adc-channels = <0 1 2 3>; + }; +}; From 5d6ab5d7730809cca078dbd296e9c5e332638c50 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Thu, 10 Dec 2015 13:08:42 -0600 Subject: [PATCH 02/18] 4.1.13-ti-r36 Signed-off-by: Robert Nelson --- include/dt-bindings/reset/k2g.h | 22 +++++++++++++++++ src/arm/k2e.dtsi | 2 +- src/arm/k2g-evm.dts | 32 ++++++++++++++++++++++++ src/arm/k2g.dtsi | 44 +++++++++++++++++++++++++++++++++ src/arm/k2hk.dtsi | 16 ++++++------ src/arm/k2l.dtsi | 8 +++--- src/arm/keystone.dtsi | 6 +++++ 7 files changed, 117 insertions(+), 13 deletions(-) create mode 100644 include/dt-bindings/reset/k2g.h diff --git a/include/dt-bindings/reset/k2g.h b/include/dt-bindings/reset/k2g.h new file mode 100644 index 0000000..38b947b --- /dev/null +++ b/include/dt-bindings/reset/k2g.h @@ -0,0 +1,22 @@ +/* + * TI K2G SoC reset definitions + * + * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DT_BINDINGS_RESET_K2G_H__ +#define __DT_BINDINGS_RESET_K2G_H__ + +#define K2G_DEV_CGEM0_DSP0_RESET 0x1 + +#endif diff --git a/src/arm/k2e.dtsi b/src/arm/k2e.dtsi index be4d12c..148cfcb 100644 --- a/src/arm/k2e.dtsi +++ b/src/arm/k2e.dtsi @@ -110,7 +110,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem0>; ti,syscon-dev = <&devctrl 0x844>; - ti,syscon-psc = <&psc 0xa3c 0x83c>; + resets = <&pscrst 0xa3c 8 0 0x83c 8 0>; interrupt-parent = <&kirq0>; interrupts = <0 8>; interrupt-names = "vring", "exception"; diff --git a/src/arm/k2g-evm.dts b/src/arm/k2g-evm.dts index 5d37fa2..b6b74a6 100644 --- a/src/arm/k2g-evm.dts +++ b/src/arm/k2g-evm.dts @@ -25,6 +25,25 @@ reg = <0x00000008 0x00000000 0x00000000 0x80000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dsp_common_cma_pool: dsp_common_cma_pool { + compatible = "shared-dma-pool"; + reg = <0x00000008 0x1f800000 0x00000000 0x800000>; + reusable; + }; + + dsp_common_mpm_area: dsp_reserved_mpm_area { + compatible = "shared-dma-pool"; + reg = <0x00000008 0x20000000 0x00000000 0x20000000>; + no-map; + status = "okay"; + }; + }; + mmc0_reg: fixedregulator-mmc0 { compatible = "regulator-fixed"; regulator-name = "mmc0_fixed"; @@ -40,6 +59,14 @@ regulator-max-microvolt = <1800000>; regulator-always-on; }; + + soc { + mpm_mem: dspmem { + compatible = "ti,keystone-dsp-mem"; + reg = <0x0c000000 0x00100000>, + <0xa0000000 0x20000000>; + }; + }; }; &k2g_pinctrl { @@ -295,3 +322,8 @@ &gbe0 { phy-handle = <ðphy0>; }; + +&dsp0 { + memory-region = <&dsp_common_cma_pool>; +}; + diff --git a/src/arm/k2g.dtsi b/src/arm/k2g.dtsi index 346bd3a..3a1ae20 100644 --- a/src/arm/k2g.dtsi +++ b/src/arm/k2g.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -39,6 +40,7 @@ phy1 = &usb1_phy; d_can0 = &dcan0; d_can1 = &dcan1; + rproc0 = &dsp0; }; cpus { @@ -89,6 +91,11 @@ ranges = <0x0 0x0 0x0 0xc0000000>; dma-ranges = <0x80000000 0x8 0x00000000 0x80000000>; + devctrl: device-state-control@02620000 { + compatible = "ti,keystone-devctrl", "syscon"; + reg = <0x02620000 0x1000>; + }; + k2g_pinctrl: pinmux@02621000 { compatible = "pinctrl-single"; reg = <0x02621000 0x410>; @@ -475,6 +482,43 @@ ti,sci = <&pmmc>; }; + k2g_reset: k2g_reset { + compatible = "ti,sci-reset"; + ti,sci = <&pmmc>; + #reset-cells = <2>; + }; + + kirq0: keystone_irq@026202a0 { + compatible = "ti,keystone-irq"; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + ti,syscon-dev = <&devctrl 0x2a0>; + }; + + dspgpio0: keystone_dsp_gpio@02620240 { + compatible = "ti,keystone-dsp-gpio"; + gpio-controller; + #gpio-cells = <2>; + gpio,syscon-dev = <&devctrl 0x240>; + }; + + dsp0: dsp0 { + compatible = "ti,k2g-dsp"; + reg = <0x10800000 0x00100000>, + <0x10e00000 0x00008000>, + <0x10f00000 0x00008000>; + reg-names = "l2sram", "l1pram", "l1dram"; + power-domains = <&k2g_pds K2G_DEV_CGEM0>; + clocks = <&k2g_clks K2G_DEV_CGEM0 0>; + ti,syscon-dev = <&devctrl 0x844>; + resets = <&k2g_reset K2G_DEV_CGEM0 K2G_DEV_CGEM0_DSP0_RESET>; + interrupt-parent = <&kirq0>; + interrupts = <0 8>; + interrupt-names = "vring", "exception"; + kick-gpio = <&dspgpio0 27 0>; + }; + mdio: mdio@4200f00 { compatible = "ti,keystone_mdio", "ti,davinci_mdio"; #address-cells = <1>; diff --git a/src/arm/k2hk.dtsi b/src/arm/k2hk.dtsi index 7116b2e..84e7015 100644 --- a/src/arm/k2hk.dtsi +++ b/src/arm/k2hk.dtsi @@ -133,7 +133,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem0>; ti,syscon-dev = <&devctrl 0x40>; - ti,syscon-psc = <&psc 0xa3c 0x83c>; + resets = <&pscrst 0xa3c 8 0 0x83c 8 0>; interrupt-parent = <&kirq0>; interrupts = <0 8>; interrupt-names = "vring", "exception"; @@ -148,7 +148,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem1>; ti,syscon-dev = <&devctrl 0x44>; - ti,syscon-psc = <&psc 0xa40 0x840>; + resets = <&pscrst 0xa40 8 0 0x840 8 0>; interrupt-parent = <&kirq0>; interrupts = <1 9>; interrupt-names = "vring", "exception"; @@ -163,7 +163,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem2>; ti,syscon-dev = <&devctrl 0x48>; - ti,syscon-psc = <&psc 0xa44 0x844>; + resets = <&pscrst 0xa44 8 0 0x844 8 0>; interrupt-parent = <&kirq0>; interrupts = <2 10>; interrupt-names = "vring", "exception"; @@ -178,7 +178,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem3>; ti,syscon-dev = <&devctrl 0x4c>; - ti,syscon-psc = <&psc 0xa48 0x848>; + resets = <&pscrst 0xa48 8 0 0x848 8 0>; interrupt-parent = <&kirq0>; interrupts = <3 11>; interrupt-names = "vring", "exception"; @@ -193,7 +193,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem4>; ti,syscon-dev = <&devctrl 0x50>; - ti,syscon-psc = <&psc 0xa4c 0x84c>; + resets = <&pscrst 0xa4c 8 0 0x84c 8 0>; interrupt-parent = <&kirq0>; interrupts = <4 12>; interrupt-names = "vring", "exception"; @@ -208,7 +208,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem5>; ti,syscon-dev = <&devctrl 0x54>; - ti,syscon-psc = <&psc 0xa50 0x850>; + resets = <&pscrst 0xa50 8 0 0x850 8 0>; interrupt-parent = <&kirq0>; interrupts = <5 13>; interrupt-names = "vring", "exception"; @@ -223,7 +223,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem6>; ti,syscon-dev = <&devctrl 0x58>; - ti,syscon-psc = <&psc 0xa54 0x854>; + resets = <&pscrst 0xa54 8 0 0x854 8 0>; interrupt-parent = <&kirq0>; interrupts = <6 14>; interrupt-names = "vring", "exception"; @@ -238,7 +238,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem7>; ti,syscon-dev = <&devctrl 0x5c>; - ti,syscon-psc = <&psc 0xa58 0x858>; + resets = <&pscrst 0xa58 8 0 0x858 8 0>; interrupt-parent = <&kirq0>; interrupts = <7 15>; interrupt-names = "vring", "exception"; diff --git a/src/arm/k2l.dtsi b/src/arm/k2l.dtsi index e909064..fcee4d2 100644 --- a/src/arm/k2l.dtsi +++ b/src/arm/k2l.dtsi @@ -109,7 +109,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem0>; ti,syscon-dev = <&devctrl 0x844>; - ti,syscon-psc = <&psc 0xa3c 0x83c>; + resets = <&pscrst 0xa3c 8 0 0x83c 8 0>; interrupt-parent = <&kirq0>; interrupts = <0 8>; interrupt-names = "vring", "exception"; @@ -124,7 +124,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem1>; ti,syscon-dev = <&devctrl 0x848>; - ti,syscon-psc = <&psc 0xa40 0x840>; + resets = <&pscrst 0xa40 8 0 0x840 8 0>; interrupt-parent = <&kirq0>; interrupts = <1 9>; interrupt-names = "vring", "exception"; @@ -139,7 +139,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem2>; ti,syscon-dev = <&devctrl 0x84c>; - ti,syscon-psc = <&psc 0xa44 0x844>; + resets = <&pscrst 0xa44 8 0 0x844 8 0>; interrupt-parent = <&kirq0>; interrupts = <2 10>; interrupt-names = "vring", "exception"; @@ -154,7 +154,7 @@ reg-names = "l2sram", "l1pram", "l1dram"; clocks = <&clkgem3>; ti,syscon-dev = <&devctrl 0x850>; - ti,syscon-psc = <&psc 0xa48 0x848>; + resets = <&pscrst 0xa48 8 0 0x848 8 0>; interrupt-parent = <&kirq0>; interrupts = <3 11>; interrupt-names = "vring", "exception"; diff --git a/src/arm/keystone.dtsi b/src/arm/keystone.dtsi index 9969b5b..4e5dd18 100644 --- a/src/arm/keystone.dtsi +++ b/src/arm/keystone.dtsi @@ -89,6 +89,12 @@ ti,wdt-list = <0>; }; + pscrst: psc-reset { + compatible = "syscon-reset"; + syscon = <&psc>; + #reset-cells = <6>; + }; + /include/ "keystone-clocks.dtsi" uart0: serial@02530c00 { From d0c7564ce2065b86910c114b06f5efaa7df6383b Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 22 Dec 2015 10:39:38 -0600 Subject: [PATCH 03/18] omap5-uevm: fix hdmi regulator vdda_video-supply Signed-off-by: Robert Nelson --- src/arm/omap5-uevm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index a2c73b0..33bc592 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -663,7 +663,7 @@ &hdmi { status = "ok"; - vdda-supply = <&ldo4_reg>; + vdda_video-supply = <&ldo4_reg>; pinctrl-names = "default"; pinctrl-0 = <&dss_hdmi_pins>; From e6dc81da8d48c69edb2a2909b898f562edb71007 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 22 Dec 2015 10:50:52 -0600 Subject: [PATCH 04/18] omap5-uevm: define vdda_video-supply in dss Signed-off-by: Robert Nelson --- src/arm/omap5-uevm.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index 33bc592..0a323a0 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -659,11 +659,12 @@ &dss { status = "ok"; + vdda_video-supply = <&ldoln_reg>; }; &hdmi { status = "ok"; - vdda_video-supply = <&ldo4_reg>; + vdda-supply = <&ldo4_reg>; pinctrl-names = "default"; pinctrl-0 = <&dss_hdmi_pins>; From 05700a8c839efe7b62927ece6cc154c31cee005b Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 22 Dec 2015 11:20:06 -0600 Subject: [PATCH 05/18] Revert "omap5-uevm: define vdda_video-supply in dss" This reverts commit e6dc81da8d48c69edb2a2909b898f562edb71007. Signed-off-by: Robert Nelson --- src/arm/omap5-uevm.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index 0a323a0..33bc592 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -659,12 +659,11 @@ &dss { status = "ok"; - vdda_video-supply = <&ldoln_reg>; }; &hdmi { status = "ok"; - vdda-supply = <&ldo4_reg>; + vdda_video-supply = <&ldo4_reg>; pinctrl-names = "default"; pinctrl-0 = <&dss_hdmi_pins>; From eabd13a7fe6cb27046cc7ea258bf0b62e15d6f26 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 22 Dec 2015 11:20:13 -0600 Subject: [PATCH 06/18] Revert "omap5-uevm: fix hdmi regulator vdda_video-supply" This reverts commit d0c7564ce2065b86910c114b06f5efaa7df6383b. Signed-off-by: Robert Nelson --- src/arm/omap5-uevm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index 33bc592..a2c73b0 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -663,7 +663,7 @@ &hdmi { status = "ok"; - vdda_video-supply = <&ldo4_reg>; + vdda-supply = <&ldo4_reg>; pinctrl-names = "default"; pinctrl-0 = <&dss_hdmi_pins>; From c8765ebb81242aa60395f73693cb85f0f2f53f24 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Wed, 23 Dec 2015 14:46:19 -0600 Subject: [PATCH 07/18] 4.1.13-ti-r37 Signed-off-by: Robert Nelson --- src/arm/am335x-olimex-som.dts | 2 +- src/arm/am57xx-beagle-x15.dts | 37 +++++++++++++++++++++++------------ src/arm/dra7.dtsi | 6 ++++++ src/arm/dra74x.dtsi | 6 ------ 4 files changed, 31 insertions(+), 20 deletions(-) diff --git a/src/arm/am335x-olimex-som.dts b/src/arm/am335x-olimex-som.dts index 63879e4..e7ee978 100644 --- a/src/arm/am335x-olimex-som.dts +++ b/src/arm/am335x-olimex-som.dts @@ -12,7 +12,7 @@ / { model = "Olimex AM335x SOM"; - compatible = "ti,am33xx"; + compatible = "ti,am335x-olimex-som", "ti,am33xx"; }; &ldo3_reg { diff --git a/src/arm/am57xx-beagle-x15.dts b/src/arm/am57xx-beagle-x15.dts index 7efe7e0..2c349e1 100644 --- a/src/arm/am57xx-beagle-x15.dts +++ b/src/arm/am57xx-beagle-x15.dts @@ -58,13 +58,19 @@ dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; - reg = <0x0 0x9f000000 0x0 0x1000000>; + reg = <0x0 0x9f000000 0x0 0x800000>; reusable; status = "okay"; }; - cmem_block_mem_0: cmem_block_mem@a0000000 { - reg = <0x0 0xa0000000 0x0 0x0a000000>; + cmem_block_mem_0: cmem_block_mem@a0000000 { + reg = <0x0 0xa0000000 0x0 0x0c000000>; + no-map; + status = "okay"; + }; + + cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 { + reg = <0x0 0x40500000 0x0 0x100000>; no-map; status = "okay"; }; @@ -212,21 +218,26 @@ }; }; - cmem { - compatible = "ti,cmem"; - #address-cells = <1>; - #size-cells = <0>; + cmem { + compatible = "ti,cmem"; + #address-cells = <1>; + #size-cells = <0>; #pool-size-cells = <2>; - status = "okay"; + status = "okay"; - cmem_block_0: cmem_block@0 { - reg = <0>; - memory-region = <&cmem_block_mem_0>; - cmem-buf-pools = <1 0x0 0x0a000000>; + cmem_block_0: cmem_block@0 { + reg = <0>; + memory-region = <&cmem_block_mem_0>; + cmem-buf-pools = <1 0x0 0x0c000000>; + }; + + cmem_block_1: cmem_block@1 { + reg = <1>; + memory-region = <&cmem_block_mem_1_ocmc3>; }; - }; + }; }; &dpll_dsp_ck { diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index d7edf26..bf77d61 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -2129,6 +2129,12 @@ reg = <1>; }; }; + + debugss: debugss { + compatible = "ti,dra7xx-debugss"; + clocks = <&sys_clkin1>; + clock-names = "sysclockin1"; + }; }; thermal_zones: thermal-zones { diff --git a/src/arm/dra74x.dtsi b/src/arm/dra74x.dtsi index 224edfd..a2ea85b 100644 --- a/src/arm/dra74x.dtsi +++ b/src/arm/dra74x.dtsi @@ -58,12 +58,6 @@ }; ocp { - debugss { - compatible = "ti,dra7xx-debugss"; - clocks = <0xe>; - clock-names = "sysclockin1"; - }; - dsp2_system: dsp_system@41500000 { compatible = "syscon"; reg = <0x41500000 0x100>; From 13f12c04b49983c3c9773b92f3fdb32e2c7f09f1 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Tue, 5 Jan 2016 16:15:53 -0600 Subject: [PATCH 08/18] 4.1.13-ti-rt-r38 Signed-off-by: Robert Nelson --- src/arm/k2e-evm.dts | 4 ++++ src/arm/k2hk-evm.dts | 4 ++++ src/arm/k2l-evm.dts | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/src/arm/k2e-evm.dts b/src/arm/k2e-evm.dts index 50e00c1..885fdf6 100644 --- a/src/arm/k2e-evm.dts +++ b/src/arm/k2e-evm.dts @@ -189,3 +189,7 @@ &dsp0 { memory-region = <&dsp_common_cma_pool>; }; + +&gbe_serdes0 { + status = "okay"; +}; diff --git a/src/arm/k2hk-evm.dts b/src/arm/k2hk-evm.dts index 109f0ec..31fe966 100644 --- a/src/arm/k2hk-evm.dts +++ b/src/arm/k2hk-evm.dts @@ -237,3 +237,7 @@ &dsp7 { memory-region = <&dsp_common_cma_pool>; }; + +&gbe_serdes { + status = "okay"; +}; diff --git a/src/arm/k2l-evm.dts b/src/arm/k2l-evm.dts index b6154d7..a2c8ae9 100644 --- a/src/arm/k2l-evm.dts +++ b/src/arm/k2l-evm.dts @@ -170,3 +170,7 @@ &dsp3 { memory-region = <&dsp_common_cma_pool>; }; + +&gbe_serdes0 { + status = "okay"; +}; From a34971ba07077615821bb2082dcec8b0009bcf33 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Wed, 6 Jan 2016 09:35:40 -0600 Subject: [PATCH 09/18] am57xx-beagle-x15.dts: fix opencl examples Signed-off-by: Robert Nelson --- src/arm/am57xx-beagle-x15.dts | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/arm/am57xx-beagle-x15.dts b/src/arm/am57xx-beagle-x15.dts index 2c349e1..0a28705 100644 --- a/src/arm/am57xx-beagle-x15.dts +++ b/src/arm/am57xx-beagle-x15.dts @@ -58,22 +58,22 @@ dsp2_cma_pool: dsp2_cma@9f000000 { compatible = "shared-dma-pool"; - reg = <0x0 0x9f000000 0x0 0x800000>; + reg = <0x0 0x9f000000 0x0 0x1000000>; reusable; status = "okay"; }; cmem_block_mem_0: cmem_block_mem@a0000000 { - reg = <0x0 0xa0000000 0x0 0x0c000000>; + reg = <0x0 0xa0000000 0x0 0x0a000000>; no-map; status = "okay"; }; - cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 { - reg = <0x0 0x40500000 0x0 0x100000>; - no-map; - status = "okay"; - }; +// cmem_block_mem_1_ocmc3: cmem_block_mem@40500000 { +// reg = <0x0 0x40500000 0x0 0x100000>; +// no-map; +// status = "okay"; +// }; }; vdd_3v3: fixedregulator-vdd_3v3 { @@ -230,13 +230,13 @@ cmem_block_0: cmem_block@0 { reg = <0>; memory-region = <&cmem_block_mem_0>; - cmem-buf-pools = <1 0x0 0x0c000000>; + cmem-buf-pools = <1 0x0 0x0a000000>; }; - cmem_block_1: cmem_block@1 { - reg = <1>; - memory-region = <&cmem_block_mem_1_ocmc3>; - }; +// cmem_block_1: cmem_block@1 { +// reg = <1>; +// memory-region = <&cmem_block_mem_1_ocmc3>; +// }; }; }; From f231e9c6c5ba4bc4e6efda221d96b11965470283 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 8 Jan 2016 15:38:34 -0600 Subject: [PATCH 10/18] 4.1.15-ti-rt-r40 Signed-off-by: Robert Nelson --- src/arm/dra7.dtsi | 6 ++-- src/arm/dra74x.dtsi | 6 ++-- src/arm/omap4.dtsi | 4 ++- src/arm/omap5-uevm.dts | 66 +++++++++++++++++++++++++++++++++++------- src/arm/omap5.dtsi | 4 ++- 5 files changed, 69 insertions(+), 17 deletions(-) diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index bf77d61..38c6e54 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -891,8 +891,10 @@ dsp1: dsp@40800000 { compatible = "ti,dra7-rproc-dsp"; - reg = <0x40800000 0x48000>; - reg-names = "l2ram"; + reg = <0x40800000 0x48000>, + <0x40e00000 0x8000>, + <0x40f00000 0x8000>; + reg-names = "l2ram", "l1pram", "l1dram"; ti,hwmods = "dsp1"; syscon-bootreg = <&scm_conf 0x55c>; iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; diff --git a/src/arm/dra74x.dtsi b/src/arm/dra74x.dtsi index a2ea85b..2671c39 100644 --- a/src/arm/dra74x.dtsi +++ b/src/arm/dra74x.dtsi @@ -110,8 +110,10 @@ dsp2: dsp@41000000 { compatible = "ti,dra7-rproc-dsp"; - reg = <0x41000000 0x48000>; - reg-names = "l2ram"; + reg = <0x41000000 0x48000>, + <0x41600000 0x8000>, + <0x41700000 0x8000>; + reg-names = "l2ram", "l1pram", "l1dram"; ti,hwmods = "dsp2"; syscon-bootreg = <&scm_conf 0x560>; iommus = <&mmu0_dsp2>, <&mmu1_dsp2>; diff --git a/src/arm/omap4.dtsi b/src/arm/omap4.dtsi index 40c505b..38df22a 100644 --- a/src/arm/omap4.dtsi +++ b/src/arm/omap4.dtsi @@ -827,8 +827,10 @@ status = "disabled"; }; - ipu: ipu { + ipu: ipu@55020000 { compatible = "ti,omap4-rproc-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; ti,hwmods = "ipu"; iommus = <&mmu_ipu>; mboxes = <&mailbox &mbox_ipu>; diff --git a/src/arm/omap5-uevm.dts b/src/arm/omap5-uevm.dts index a2c73b0..808776a 100644 --- a/src/arm/omap5-uevm.dts +++ b/src/arm/omap5-uevm.dts @@ -51,6 +51,24 @@ regulator-max-microvolt = <3000000>; }; + mmc3_pwrseq: sdhci0_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&clk32kgaudio>; + clock-names = "ext_clock"; + }; + + vmmcsdio_fixed: fixedregulator-mmcsdio { + compatible = "regulator-fixed"; + regulator-name = "vmmcsdio_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 12 GPIO_ACTIVE_HIGH>; /* gpio140 WLAN_EN */ + enable-active-high; + startup-delay-us = <70000>; + pinctrl-names = "default"; + pinctrl-0 = <&wlan_pins>; + }; + /* HS USB Host PHY on PORT 2 */ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; @@ -217,12 +235,20 @@ >; }; - mcspi4_pins: pinmux_mcspi4_pins { + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + OMAP5_IOPAD(0x01a4, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_clk */ + OMAP5_IOPAD(0x01a6, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_cmd */ + OMAP5_IOPAD(0x01a8, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data0 */ + OMAP5_IOPAD(0x01aa, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data1 */ + OMAP5_IOPAD(0x01ac, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data2 */ + OMAP5_IOPAD(0x01ae, PIN_INPUT_PULLUP | MUX_MODE0) /* wlsdio_data3 */ + >; + }; + + wlan_pins: pinmux_wlan_pins { pinctrl-single,pins = < - 0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */ - 0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */ - 0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */ - 0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */ + OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */ >; }; @@ -296,6 +322,12 @@ 0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */ >; }; + + wlcore_irq_pin: pinmux_wlcore_irq_pin { + pinctrl-single,pins = < + OMAP5_IOPAD(0x040, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */ + >; + }; }; &mmc1 { @@ -310,8 +342,25 @@ }; &mmc3 { + vmmc-supply = <&vmmcsdio_fixed>; + mmc-pwrseq = <&mmc3_pwrseq>; bus-width = <4>; - ti,non-removable; + non-removable; + cap-power-off-card; + pinctrl-names = "default"; + pinctrl-0 = <&mmc3_pins &wlcore_irq_pin>; + interrupts-extended = <&gic GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH + &omap5_pmx_core 0x168>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@2 { + compatible = "ti,wl1271"; + reg = <2>; + interrupt-parent = <&gpio1>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; /* gpio 14 */ + ref-clock-frequency = <26000000>; + }; }; &mmc4 { @@ -618,11 +667,6 @@ pinctrl-0 = <&mcspi3_pins>; }; -&mcspi4 { - pinctrl-names = "default"; - pinctrl-0 = <&mcspi4_pins>; -}; - &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; diff --git a/src/arm/omap5.dtsi b/src/arm/omap5.dtsi index c3f6e33..10a134c 100644 --- a/src/arm/omap5.dtsi +++ b/src/arm/omap5.dtsi @@ -831,8 +831,10 @@ status = "disabled"; }; - ipu: ipu { + ipu: ipu@55020000 { compatible = "ti,omap5-rproc-ipu"; + reg = <0x55020000 0x10000>; + reg-names = "l2ram"; ti,hwmods = "ipu"; iommus = <&mmu_ipu>; mboxes = <&mailbox &mbox_ipu>; From d2879cff737d2d4671989de43067336745868ab8 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Mon, 11 Jan 2016 15:04:08 -0600 Subject: [PATCH 11/18] edma: workaround dma channels being auto-disabled before they could be loaded as an overlay https://groups.google.com/d/msg/beagleboard/TMGEWjBLsok/V4_ngJ7lCwAJ Signed-off-by: Robert Nelson --- src/arm/am335x-abbbi.dts | 1 + src/arm/am335x-bone.dts | 1 + src/arm/am335x-boneblack-bbbmini.dts | 2 ++ src/arm/am335x-boneblack-emmc-overlay.dts | 1 + src/arm/am335x-boneblack-hdmi-overlay.dts | 1 + src/arm/am335x-boneblack-nhdmi-overlay.dts | 1 + src/arm/am335x-boneblack-overlay.dts | 1 + src/arm/am335x-boneblack-replicape.dts | 1 + src/arm/am335x-boneblack-spi0.dts | 1 + src/arm/am335x-boneblack-ttyS2.dts | 2 ++ src/arm/am335x-boneblack-wl1835mod.dts | 1 + src/arm/am335x-boneblack.dts | 1 + src/arm/am335x-bonegreen-overlay.dts | 1 + src/arm/am335x-bonegreen.dts | 1 + src/arm/am33xx-overlay-edma-fix.dtsi | 37 ++++++++++++++++++++++ 15 files changed, 53 insertions(+) create mode 100644 src/arm/am33xx-overlay-edma-fix.dtsi diff --git a/src/arm/am335x-abbbi.dts b/src/arm/am335x-abbbi.dts index 6a7a04c..5ca4e4e 100644 --- a/src/arm/am335x-abbbi.dts +++ b/src/arm/am335x-abbbi.dts @@ -10,6 +10,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "Arrow BeagleBone Black Industrial"; diff --git a/src/arm/am335x-bone.dts b/src/arm/am335x-bone.dts index ce1b68a..b5d3815 100644 --- a/src/arm/am335x-bone.dts +++ b/src/arm/am335x-bone.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone"; diff --git a/src/arm/am335x-boneblack-bbbmini.dts b/src/arm/am335x-boneblack-bbbmini.dts index 5d486fb..378278b 100644 --- a/src/arm/am335x-boneblack-bbbmini.dts +++ b/src/arm/am335x-boneblack-bbbmini.dts @@ -10,6 +10,8 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" + #include #include diff --git a/src/arm/am335x-boneblack-emmc-overlay.dts b/src/arm/am335x-boneblack-emmc-overlay.dts index a515059..d3adcaa 100644 --- a/src/arm/am335x-boneblack-emmc-overlay.dts +++ b/src/arm/am335x-boneblack-emmc-overlay.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-hdmi-overlay.dts b/src/arm/am335x-boneblack-hdmi-overlay.dts index 64c73c6..f0e3ed2 100644 --- a/src/arm/am335x-boneblack-hdmi-overlay.dts +++ b/src/arm/am335x-boneblack-hdmi-overlay.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-nhdmi-overlay.dts b/src/arm/am335x-boneblack-nhdmi-overlay.dts index 9e06d9d..61dbccd 100644 --- a/src/arm/am335x-boneblack-nhdmi-overlay.dts +++ b/src/arm/am335x-boneblack-nhdmi-overlay.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-overlay.dts b/src/arm/am335x-boneblack-overlay.dts index 50fc43c..ba86fad 100644 --- a/src/arm/am335x-boneblack-overlay.dts +++ b/src/arm/am335x-boneblack-overlay.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-replicape.dts b/src/arm/am335x-boneblack-replicape.dts index c7708db..914ca87 100644 --- a/src/arm/am335x-boneblack-replicape.dts +++ b/src/arm/am335x-boneblack-replicape.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-spi0.dts b/src/arm/am335x-boneblack-spi0.dts index ba76575..00f1ea0 100644 --- a/src/arm/am335x-boneblack-spi0.dts +++ b/src/arm/am335x-boneblack-spi0.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack-ttyS2.dts b/src/arm/am335x-boneblack-ttyS2.dts index 310d956..3064704 100644 --- a/src/arm/am335x-boneblack-ttyS2.dts +++ b/src/arm/am335x-boneblack-ttyS2.dts @@ -9,6 +9,8 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" + #include #include diff --git a/src/arm/am335x-boneblack-wl1835mod.dts b/src/arm/am335x-boneblack-wl1835mod.dts index f361ba9..c6db552 100644 --- a/src/arm/am335x-boneblack-wl1835mod.dts +++ b/src/arm/am335x-boneblack-wl1835mod.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-boneblack.dts b/src/arm/am335x-boneblack.dts index 6fa4157..fd1c872 100644 --- a/src/arm/am335x-boneblack.dts +++ b/src/arm/am335x-boneblack.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Black"; diff --git a/src/arm/am335x-bonegreen-overlay.dts b/src/arm/am335x-bonegreen-overlay.dts index d48a5a0..efca97d 100644 --- a/src/arm/am335x-bonegreen-overlay.dts +++ b/src/arm/am335x-bonegreen-overlay.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Green"; diff --git a/src/arm/am335x-bonegreen.dts b/src/arm/am335x-bonegreen.dts index 2ddb443..71164f8 100644 --- a/src/arm/am335x-bonegreen.dts +++ b/src/arm/am335x-bonegreen.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am33xx-overlay-edma-fix.dtsi" / { model = "TI AM335x BeagleBone Green"; diff --git a/src/arm/am33xx-overlay-edma-fix.dtsi b/src/arm/am33xx-overlay-edma-fix.dtsi new file mode 100644 index 0000000..79037f9 --- /dev/null +++ b/src/arm/am33xx-overlay-edma-fix.dtsi @@ -0,0 +1,37 @@ +/* + * Device Tree Source for AM33xx Overlay EDMA fixes + * + * Copyright (C) 2015 Robert Nelson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&spi0 { + status = "okay"; +}; + +&spi1 { + status = "okay"; +}; + +&mcasp0 { + status = "okay"; +}; + +&mcasp1 { + status = "okay"; +}; From 355daf4f5e76c5234c50af45a7cd0dff1f5bcba8 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Thu, 14 Jan 2016 12:51:22 -0600 Subject: [PATCH 12/18] 4.1.15-ti-rt-r41 Signed-off-by: Robert Nelson --- src/arm/am57xx-beagle-x15.dts | 4 ++-- src/arm/dra7-evm.dts | 1 + src/arm/dra72-evm.dts | 2 ++ src/arm/dra74x.dtsi | 4 ++-- 4 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/arm/am57xx-beagle-x15.dts b/src/arm/am57xx-beagle-x15.dts index 0a28705..363db80 100644 --- a/src/arm/am57xx-beagle-x15.dts +++ b/src/arm/am57xx-beagle-x15.dts @@ -417,6 +417,7 @@ interrupt-controller; ti,system-power-controller; + ti,mux-pad1 = <8>; tps659038_pmic { compatible = "ti,tps659038-pmic"; @@ -566,8 +567,7 @@ extcon_usb2: tps659038_usb { compatible = "ti,palmas-usb-vid"; ti,enable-vbus-detection; - ti,enable-id-detection; - id-gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>; + interrupts-extended = <&gpio4 21 IRQ_TYPE_EDGE_RISING>; }; }; diff --git a/src/arm/dra7-evm.dts b/src/arm/dra7-evm.dts index 3d62f3a..d8c19ce 100644 --- a/src/arm/dra7-evm.dts +++ b/src/arm/dra7-evm.dts @@ -716,6 +716,7 @@ regulator-max-microvolt = <1050000>; regulator-always-on; regulator-boot-on; + regulator-allow-bypass; }; ldoln_reg: ldoln { diff --git a/src/arm/dra72-evm.dts b/src/arm/dra72-evm.dts index 2388fd8..e5f49da 100644 --- a/src/arm/dra72-evm.dts +++ b/src/arm/dra72-evm.dts @@ -520,6 +520,7 @@ regulator-max-microvolt = <3300000>; regulator-always-on; regulator-boot-on; + regulator-allow-bypass; }; ldo2_reg: ldo2 { @@ -527,6 +528,7 @@ regulator-name = "ldo2"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; + regulator-allow-bypass; }; ldo3_reg: ldo3 { diff --git a/src/arm/dra74x.dtsi b/src/arm/dra74x.dtsi index 2671c39..110518a 100644 --- a/src/arm/dra74x.dtsi +++ b/src/arm/dra74x.dtsi @@ -178,8 +178,8 @@ reg = <0x58000000 0x80>, <0x58004054 0x4>, <0x58004300 0x20>, - <0x58005054 0x4>, - <0x58005300 0x20>; + <0x58009054 0x4>, + <0x58009300 0x20>; reg-names = "dss", "pll1_clkctrl", "pll1", "pll2_clkctrl", "pll2"; From d99f8d43299cef7a74eb0b3215fa701f026d7387 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Thu, 21 Jan 2016 12:29:27 -0600 Subject: [PATCH 13/18] 4.1.15-ti-rt-r42 Signed-off-by: Robert Nelson --- src/arm/am335x-bonegreen-wireless.dts | 52 ++++++++++ src/arm/am335x-bonegreen-wl1835.dtsi | 138 ++++++++++++++++++++++++++ src/arm/am335x-pepper.dts | 11 +- src/arm/am33xx.dtsi | 96 ++++++++++++------ src/arm/am4372.dtsi | 80 +++++++++++---- src/arm/dra7.dtsi | 72 ++++++++++---- src/arm/k2g-evm.dts | 43 ++++++++ src/arm/k2g.dtsi | 88 ++++++++++++++-- 8 files changed, 494 insertions(+), 86 deletions(-) create mode 100644 src/arm/am335x-bonegreen-wireless.dts create mode 100644 src/arm/am335x-bonegreen-wl1835.dtsi diff --git a/src/arm/am335x-bonegreen-wireless.dts b/src/arm/am335x-bonegreen-wireless.dts new file mode 100644 index 0000000..2b82ce8 --- /dev/null +++ b/src/arm/am335x-bonegreen-wireless.dts @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +/dts-v1/; + +#include "am33xx.dtsi" +#include "am335x-bone-common.dtsi" +#include "am335x-bonegreen-wl1835.dtsi" + + +/ { + model = "TI AM335x BeagleBone Green"; + compatible = "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx"; +}; + + +&ldo3_reg { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; +}; + +&mmc1 { + vmmc-supply = <&vmmcsd_fixed>; +}; + +&mmc2 { + vmmc-supply = <&vmmcsd_fixed>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_pins>; + bus-width = <8>; + status = "okay"; +}; +&uart3 { + status = "okay"; +}; + +&mmc3 { + status = "okay"; +}; + +&mac { + status = "disabled"; +}; + +&sgx { + status = "okay"; +}; diff --git a/src/arm/am335x-bonegreen-wl1835.dtsi b/src/arm/am335x-bonegreen-wl1835.dtsi new file mode 100644 index 0000000..97a8e5e --- /dev/null +++ b/src/arm/am335x-bonegreen-wl1835.dtsi @@ -0,0 +1,138 @@ + +#include + +/ { + wlan_en_reg: fixedregulator@2 { + compatible = "regulator-fixed"; + regulator-name = "wlan-en-regulator"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + /* WL_EN */ + //gpio = <&gpio0 26 1>; + //enable-active-high; + }; + + tibt { + compatible = "tibt"; + nshutdown_gpio = <60>; + dev_name = "/dev/ttyO3"; + flow_cntrl = <1>; + baud_rate = <3000000>; + }; + btwilink { + compatible = "btwilink"; + }; +}; + +&am33xx_pinmux { + bt_pins: pinmux_bt_pins { + pinctrl-single,pins = < + 0x78 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad12.gpio1_28 BT_EN*/ + >; + }; + + mmc3_pins: pinmux_mmc3_pins { + pinctrl-single,pins = < + 0x8c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* gpio2_1 gpmc_clk.mmc2_clk */ + 0x88 ( PIN_INPUT_PULLUP | MUX_MODE3) /* gpio2_0 gpmc_csn3.mmc2_cmd */ + 0x30 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* gpio1_12 gpmc_ad12.mmc2_dat0 */ + 0x34 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* gpio1_13 gpmc_ad13.mmc2_dat1 */ + 0x38 ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* gpio1_14 gpmc_ad14.mmc2_dat2 */ + 0x3c ( PIN_INPUT_PULLUP | MUX_MODE3 ) /* gpio1_15 gpmc_ad15.mmc2_dat3 */ + >; + }; + + mmc3_pins_sleep: pinmux_mmc3_pins_sleep { + pinctrl-single,pins = < + 0x8c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio2_1 gpmc_clk.mmc2_clk */ + 0x88 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio2_0 gpmc_csn3.mmc2_cmd */ + 0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio1_12 gpmc_ad12.mmc2_dat0 */ + 0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio1_13 gpmc_ad13.mmc2_dat1 */ + 0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio1_14 gpmc_ad14.mmc2_dat2 */ + 0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpio1_15 gpmc_ad15.mmc2_dat3 */ + >; + }; + + /* wl18xx card enable/irq GPIOs. */ + wlan_pins: pinmux_wlan_pins { + pinctrl-single,pins = < + 0x28 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN*/ + 0x2C (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ*/ + 0x7C (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpio1_29 Cape_Buffer_EN*/ + >; + }; + + /* wl18xx card enable/irq GPIOs. */ + wlan_pins_sleep: pinmux_wlan_pins_sleep { + pinctrl-single,pins = < + 0x28 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ad10.gpio0_26 WL_EN*/ + 0x2C (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ad11.gpio0_27 WL_IRQ*/ + 0x7C (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0.gpio1_29 Cape_Buffer_EN*/ + >; + }; + + uart3_pins_default: pinmux_uart3_pins_default { + pinctrl-single,pins = < + 0x134 ( PIN_INPUT_PULLUP | MUX_MODE1 ) /* (L17) gmii1_rxd3.uart3_rxd */ + 0x138 ( PIN_OUTPUT_PULLDOWN | MUX_MODE1 ) /* (L16) gmii1_rxd2.uart3_txd */ + 0x148 ( PIN_INPUT | MUX_MODE3 ) /* (M17) mdio_data.uart3_ctsn */ + 0x14c ( PIN_OUTPUT_PULLDOWN | MUX_MODE3 ) /* (M18) mdio_clk.uart3_rtsn */ + >; + }; + + uart3_pins_sleep: pinmux_uart3_pins_sleep { + pinctrl-single,pins = < + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (L17) gmii1_rxd3.uart3_rxd */ + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (L16) gmii1_rxd2.uart3_txd */ + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M17) mdio_data.uart3_ctsn */ + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* (M18) mdio_clk.uart3_rtsn */ + + >; + }; +}; + +/* edma changed: in v4.1.x-ti branch: http://git.ti.com/gitweb/?p=ti-linux-kernel/ti-linux-kernel.git;a=commitdiff;h=bbbe675015664dc1e6fdac1421645a17f70afca6;hp=5b262677a892ca6da5486ece6cbb390af094df40 */ + +&mmc3 { + + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; + dma-names = "tx", "rx"; + status = "okay"; + //vmmc-supply = <&wlan_en_reg>; + vmmc-supply = <&vmmcsd_fixed>; + bus-width = <4>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mmc3_pins &wlan_pins>; + pinctrl-1 = <&mmc3_pins_sleep &wlan_pins_sleep>; + ti,non-removable; + ti,needs-special-hs-handling; + cap-power-off-card; + keep-power-in-suspend; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@0 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&gpio0 { + wl_en { + gpio-hog; + gpios = <26 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "WL_EN"; + }; +}; + +&uart3 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&uart3_pins_default>; + pinctrl-1 = <&uart3_pins_sleep>; + status = "okay"; +}; diff --git a/src/arm/am335x-pepper.dts b/src/arm/am335x-pepper.dts index 67e032d..c0f48e3 100644 --- a/src/arm/am335x-pepper.dts +++ b/src/arm/am335x-pepper.dts @@ -338,13 +338,6 @@ ti,non-removable; }; -&edma { - /* Map eDMA MMC2 Events from Crossbar */ - ti,edma-xbar-event-map = /bits/ 16 <1 12 - 2 13>; -}; - - &mmc3 { /* Wifi & Bluetooth on MMC #3 */ status = "okay"; @@ -353,8 +346,8 @@ vmmmc-supply = <&v3v3c_reg>; bus-width = <4>; ti,non-removable; - dmas = <&edma 12 - &edma 13>; + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; dma-names = "tx", "rx"; }; diff --git a/src/arm/am33xx.dtsi b/src/arm/am33xx.dtsi index 77eb8da..a2cb7a1 100644 --- a/src/arm/am33xx.dtsi +++ b/src/arm/am33xx.dtsi @@ -150,6 +150,14 @@ mboxes = <&mailbox &mbox_wkupm3>; }; + edma_xbar: dma-router@f90 { + compatible = "ti,am335x-edma-crossbar"; + reg = <0xf90 0x40>; + #dma-cells = <3>; + dma-requests = <32>; + dma-masters = <&edma>; + }; + scm_clockdomains: clockdomains { }; }; @@ -163,12 +171,44 @@ }; edma: edma@49000000 { - compatible = "ti,edma3"; - ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; - reg = <0x49000000 0x10000>, - <0x44e10f90 0x40>; + compatible = "ti,edma3-tpcc"; + ti,hwmods = "tpcc"; + reg = <0x49000000 0x10000>; + reg-names = "edma3_cc"; interrupts = <12 13 14>; - #dma-cells = <1>; + interrupt-names = "edma3_ccint", "emda3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, + <&edma_tptc2 0>; + + ti,edma-memcpy-channels = <20 21>; + }; + + edma_tptc0: tptc@49800000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc0"; + reg = <0x49800000 0x100000>; + interrupts = <112>; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc1: tptc@49900000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc1"; + reg = <0x49900000 0x100000>; + interrupts = <113>; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc2: tptc@49a00000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc2"; + reg = <0x49a00000 0x100000>; + interrupts = <114>; + interrupt-names = "edma3_tcerrint"; }; emif: emif@4c000000 { @@ -228,7 +268,7 @@ reg = <0x44e09000 0x2000>; interrupts = <72>; status = "disabled"; - dmas = <&edma 26>, <&edma 27>; + dmas = <&edma 26 0>, <&edma 27 0>; dma-names = "tx", "rx"; }; @@ -239,7 +279,7 @@ reg = <0x48022000 0x2000>; interrupts = <73>; status = "disabled"; - dmas = <&edma 28>, <&edma 29>; + dmas = <&edma 28 0>, <&edma 29 0>; dma-names = "tx", "rx"; }; @@ -250,7 +290,7 @@ reg = <0x48024000 0x2000>; interrupts = <74>; status = "disabled"; - dmas = <&edma 30>, <&edma 31>; + dmas = <&edma 30 0>, <&edma 31 0>; dma-names = "tx", "rx"; }; @@ -317,8 +357,8 @@ ti,dual-volt; ti,needs-special-reset; ti,needs-special-hs-handling; - dmas = <&edma 24 - &edma 25>; + dmas = <&edma_xbar 24 0 0 + &edma_xbar 25 0 0>; dma-names = "tx", "rx"; interrupts = <64>; interrupt-parent = <&intc>; @@ -330,8 +370,8 @@ compatible = "ti,omap4-hsmmc"; ti,hwmods = "mmc2"; ti,needs-special-reset; - dmas = <&edma 2 - &edma 3>; + dmas = <&edma 2 0 + &edma 3 0>; dma-names = "tx", "rx"; interrupts = <28>; interrupt-parent = <&intc>; @@ -478,10 +518,10 @@ interrupts = <65>; ti,spi-num-cs = <2>; ti,hwmods = "spi0"; - dmas = <&edma 16 - &edma 17 - &edma 18 - &edma 19>; + dmas = <&edma 16 0 + &edma 17 0 + &edma 18 0 + &edma 19 0>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -494,10 +534,10 @@ interrupts = <125>; ti,spi-num-cs = <2>; ti,hwmods = "spi1"; - dmas = <&edma 42 - &edma 43 - &edma 44 - &edma 45>; + dmas = <&edma 42 0 + &edma 43 0 + &edma 44 0 + &edma 45 0>; dma-names = "tx0", "rx0", "tx1", "rx1"; status = "disabled"; }; @@ -884,7 +924,7 @@ ti,no-idle-on-init; reg = <0x50000000 0x2000>; interrupts = <100>; - dmas = <&edma 52>; + dmas = <&edma 52 0>; dma-names = "rxtx"; gpmc,num-cs = <7>; gpmc,num-waitpins = <2>; @@ -902,7 +942,7 @@ ti,hwmods = "sham"; reg = <0x53100000 0x200>; interrupts = <109>; - dmas = <&edma 36>; + dmas = <&edma 36 0>; dma-names = "rx"; }; @@ -911,8 +951,8 @@ ti,hwmods = "aes"; reg = <0x53500000 0xa0>; interrupts = <103>; - dmas = <&edma 6>, - <&edma 5>; + dmas = <&edma 6 0>, + <&edma 5 0>; dma-names = "tx", "rx"; }; @@ -925,8 +965,8 @@ interrupts = <80>, <81>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 8>, - <&edma 9>; + dmas = <&edma 8 2>, + <&edma 9 2>; dma-names = "tx", "rx"; }; @@ -939,8 +979,8 @@ interrupts = <82>, <83>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 10>, - <&edma 11>; + dmas = <&edma 10 2>, + <&edma 11 2>; dma-names = "tx", "rx"; }; diff --git a/src/arm/am4372.dtsi b/src/arm/am4372.dtsi index feaffa4..99aec00 100644 --- a/src/arm/am4372.dtsi +++ b/src/arm/am4372.dtsi @@ -167,6 +167,14 @@ mboxes = <&mailbox &mbox_wkupm3>; }; + edma_xbar: dma-router@f90 { + compatible = "ti,am335x-edma-crossbar"; + reg = <0xf90 0x40>; + #dma-cells = <3>; + dma-requests = <64>; + dma-masters = <&edma>; + }; + scm_clockdomains: clockdomains { }; }; @@ -181,14 +189,46 @@ }; edma: edma@49000000 { - compatible = "ti,edma3"; - ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; - reg = <0x49000000 0x10000>, - <0x44e10f90 0x10>; + compatible = "ti,edma3-tpcc"; + ti,hwmods = "tpcc"; + reg = <0x49000000 0x10000>; + reg-names = "edma3_cc"; interrupts = , - , - ; - #dma-cells = <1>; + , + ; + interrupt-names = "edma3_ccint", "emda3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>, + <&edma_tptc2 0>; + + ti,edma-memcpy-channels = <32 33>; + }; + + edma_tptc0: tptc@49800000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc0"; + reg = <0x49800000 0x100000>; + interrupts = ; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc1: tptc@49900000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc1"; + reg = <0x49900000 0x100000>; + interrupts = ; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc2: tptc@49a00000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc2"; + reg = <0x49a00000 0x100000>; + interrupts = ; + interrupt-names = "edma3_tcerrint"; }; uart0: serial@44e09000 { @@ -500,8 +540,8 @@ ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; - dmas = <&edma 24 - &edma 25>; + dmas = <&edma 24 0>, + <&edma 25 0>; dma-names = "tx", "rx"; interrupts = ; status = "disabled"; @@ -512,8 +552,8 @@ reg = <0x481d8000 0x1000>; ti,hwmods = "mmc2"; ti,needs-special-reset; - dmas = <&edma 2 - &edma 3>; + dmas = <&edma 2 0>, + <&edma 3 0>; dma-names = "tx", "rx"; interrupts = ; status = "disabled"; @@ -777,7 +817,7 @@ compatible = "ti,omap5-sham"; ti,hwmods = "sham"; reg = <0x53100000 0x300>; - dmas = <&edma 36>; + dmas = <&edma 36 0>; dma-names = "rx"; interrupts = ; }; @@ -787,8 +827,8 @@ ti,hwmods = "aes"; reg = <0x53501000 0xa0>; interrupts = ; - dmas = <&edma 6 - &edma 5>; + dmas = <&edma 6 0>, + <&edma 5 0>; dma-names = "tx", "rx"; }; @@ -797,8 +837,8 @@ ti,hwmods = "des"; reg = <0x53701000 0xa0>; interrupts = ; - dmas = <&edma 34 - &edma 33>; + dmas = <&edma 34 0>, + <&edma 33 0>; dma-names = "tx", "rx"; }; @@ -871,8 +911,8 @@ interrupts = <80>, <81>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 8>, - <&edma 9>; + dmas = <&edma 8 2>, + <&edma 9 2>; dma-names = "tx", "rx"; }; @@ -885,8 +925,8 @@ interrupts = <82>, <83>; interrupt-names = "tx", "rx"; status = "disabled"; - dmas = <&edma 10>, - <&edma 11>; + dmas = <&edma 10 2>, + <&edma 11 2>; dma-names = "tx", "rx"; }; diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index 38c6e54..4929025 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -159,6 +159,24 @@ compatible = "syscon"; reg = <0x1c24 0x0024>; }; + + sdma_xbar: dma-router@b78 { + compatible = "ti,dra7-dma-crossbar"; + reg = <0xb78 0xfc>; + #dma-cells = <1>; + dma-requests = <205>; + ti,dma-safe-map = <0>; + dma-masters = <&sdma>; + }; + + edma_xbar: dma-router@c78 { + compatible = "ti,dra7-dma-crossbar"; + reg = <0xc78 0x7c>; + #dma-cells = <2>; + dma-requests = <204>; + ti,dma-safe-map = <0>; + dma-masters = <&edma>; + }; }; cm_core_aon: cm_core_aon@5000 { @@ -330,33 +348,43 @@ dma-requests = <127>; }; - sdma_xbar: dma-router@4a002b78 { - compatible = "ti,dra7-dma-crossbar"; - reg = <0x4a002b78 0xfc>; - #dma-cells = <1>; - dma-requests = <205>; - ti,dma-safe-map = <0>; - dma-masters = <&sdma>; - }; - - edma: edma-controller@43300000 { - compatible = "ti,edma3"; - reg = <0x43300000 0x801c>; + edma: edma@43300000 { + compatible = "ti,edma3-tpcc"; + ti,hwmods = "tpcc"; + reg = <0x43300000 0x100000>; + reg-names = "edma3_cc"; interrupts = , , ; - #dma-cells = <1>; - ti,hwmods = "tpcc", "tptc0", "tptc1"; + interrupt-names = "edma3_ccint", "emda3_mperr", + "edma3_ccerrint"; dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 0>; + + /* + * memcpy is disabled, can be enabled with: + * ti,edma-memcpy-channels = <20 21>; + * for example. Note that these channels need to be + * masked in the xbar as well. + */ }; - edma_xbar: dma-router@4a002c78 { - compatible = "ti,dra7-dma-crossbar"; - reg = <0x4a002c78 0x7c>; - #dma-cells = <1>; - dma-requests = <204>; - ti,dma-safe-map = <0>; - dma-masters = <&edma>; + edma_tptc0: tptc@43400000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc0"; + reg = <0x43400000 0x100000>; + interrupts = ; + interrupt-names = "edma3_tcerrint"; + }; + + edma_tptc1: tptc@43500000 { + compatible = "ti,edma3-tptc"; + ti,hwmods = "tptc1"; + reg = <0x43500000 0x100000>; + interrupts = ; + interrupt-names = "edma3_tcerrint"; }; gpio1: gpio@4ae10000 { @@ -1650,7 +1678,7 @@ ti,hwmods = "gpmc"; reg = <0x50000000 0x37c>; /* device IO registers */ interrupts = ; - dmas = <&edma_xbar 4>; + dmas = <&edma_xbar 4 0>; dma-names = "rxtx"; gpmc,num-cs = <8>; gpmc,num-waitpins = <2>; diff --git a/src/arm/k2g-evm.dts b/src/arm/k2g-evm.dts index b6b74a6..1366aee 100644 --- a/src/arm/k2g-evm.dts +++ b/src/arm/k2g-evm.dts @@ -327,3 +327,46 @@ memory-region = <&dsp_common_cma_pool>; }; +&qspi { + status = "okay"; + + flash0: m25p80@0 { + compatible = "s25fl512s", "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <4>; + spi-max-frequency = <96000000>; + #address-cells = <1>; + #size-cells = <1>; + cdns,read-delay = <5>; + cdns,tshsl-ns = <500>; + cdns,tsd2d-ns = <500>; + cdns,tchsh-ns = <119>; + cdns,tslch-ns = <119>; + + partition@0 { + label = "QSPI.u-boot-spl-os"; + reg = <0x00000000 0x00100000>; + }; + partition@1 { + label = "QSPI.u-boot-env"; + reg = <0x00100000 0x00040000>; + }; + partition@2 { + label = "QSPI.skern"; + reg = <0x00140000 0x0040000>; + }; + partition@3 { + label = "QSPI.pmmc-firmware"; + reg = <0x00180000 0x0040000>; + }; + partition@4 { + label = "QSPI.kernel"; + reg = <0x001C0000 0x0800000>; + }; + partition@5 { + label = "QSPI.file-system"; + reg = <0x009C0000 0x3640000>; + }; + }; +}; diff --git a/src/arm/k2g.dtsi b/src/arm/k2g.dtsi index 3a1ae20..b9b32e5 100644 --- a/src/arm/k2g.dtsi +++ b/src/arm/k2g.dtsi @@ -181,14 +181,68 @@ clock-names = "fck"; }; - edma: edma@02728000 { - compatible = "ti,edma3"; - reg = <0x02728000 0x10000>; + edma0: edma@02700000 { + compatible = "ti,edma3-tpcc"; + reg = <0x02700000 0x8000>; + reg-names = "edma3_cc"; + interrupts = , + , + ; + interrupt-names = "edma3_ccint", "emda3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma0_tptc0 7>, <&edma1_tptc0 0>; + + ti,edma-memcpy-channels = <32 33 34 35>; + + power-domains = <&k2g_pds K2G_DEV_EDMA0>; + }; + + edma1: edma@02728000 { + compatible = "ti,edma3-tpcc"; + reg = <0x02728000 0x8000>; + reg-names = "edma3_cc"; interrupts = , , ; - #dma-cells = <1>; - status = "okay"; + interrupt-names = "edma3_ccint", "emda3_mperr", + "edma3_ccerrint"; + dma-requests = <64>; + #dma-cells = <2>; + + ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>; + + /* + * memcpy is disabled, can be enabled with: + * ti,edma-memcpy-channels = <12 13 14 15>; + * for example. + */ + power-domains = <&k2g_pds K2G_DEV_EDMA0>; + }; + + edma0_tptc0: tptc@02760000 { + compatible = "ti,edma3-tptc"; + reg = <0x02760000 0x400>; + power-domains = <&k2g_pds K2G_DEV_EDMA0>; + }; + + edma0_tptc1: tptc@02768000 { + compatible = "ti,edma3-tptc"; + reg = <0x02768000 0x400>; + power-domains = <&k2g_pds K2G_DEV_EDMA0>; + }; + + edma1_tptc0: tptc@027b0000 { + compatible = "ti,edma3-tptc"; + reg = <0x027b0000 0x400>; + power-domains = <&k2g_pds K2G_DEV_EDMA0>; + }; + + edma1_tptc1: tptc@027b8000 { + compatible = "ti,edma3-tptc"; + reg = <0x027b8000 0x400>; power-domains = <&k2g_pds K2G_DEV_EDMA0>; }; @@ -196,7 +250,7 @@ compatible = "ti,omap4-hsmmc"; reg = <0x23000000 0x400>; interrupts = ; - dmas = <&edma 24>, <&edma 25>; + dmas = <&edma1 24 0>, <&edma1 25 0>; dma-names = "tx", "rx"; bus-width = <4>; status = "disabled"; @@ -209,7 +263,7 @@ compatible = "ti,omap4-hsmmc"; reg = <0x23100000 0x400>; interrupts = ; - dmas = <&edma 26>, <&edma 27>; + dmas = <&edma1 26 0>, <&edma1 27 0>; dma-names = "tx", "rx"; bus-width = <8>; status = "disabled"; @@ -274,6 +328,26 @@ clock-names = "fck"; }; + qspi: qspi@2940000 { + compatible = "cdns,qspi-nor"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x02940000 0x1000>, + <0x24000000 0x4000000>; + interrupts = ; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x24000000>; + power-domains = <&k2g_pds K2G_DEV_QSPI0>; + clocks = <&k2g_clks K2G_DEV_QSPI0 0>, + <&k2g_clks K2G_DEV_QSPI0 1>, + <&k2g_clks K2G_DEV_QSPI0 2>, + <&k2g_clks K2G_DEV_QSPI0 3>, + <&k2g_clks K2G_DEV_QSPI0 4>; + clock-names = "fck", "datack", "cfgck", "ick", "ock"; + status = "disabled"; + }; + usb0_phy: usb-phy@0 { compatible = "usb-nop-xceiv"; status = "disabled"; From 629ffb5eeae50a34528b0c5d6d1114e9d6af0150 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Thu, 28 Jan 2016 12:00:04 -0600 Subject: [PATCH 14/18] 4.1.15-ti-rt-r44 Signed-off-by: Robert Nelson --- include/dt-bindings/sound/ti-mcasp.h | 13 ++++ src/arm/am4372.dtsi | 21 ++++++ src/arm/am43xx-clocks.dtsi | 8 ++ src/arm/am571x-idk.dts | 82 ++++++++++++++++++++ src/arm/am572x-idk.dts | 107 +++++++++++++++++++++++++++ src/arm/dra7.dtsi | 11 ++- src/arm/dra74x.dtsi | 1 + src/arm/k2g-evm.dts | 100 ++++++++++++++++++++++++- src/arm/k2g.dtsi | 87 ++++++++++++++++++++++ src/arm/omap3-evm-37xx.dts | 2 +- src/arm/omap4.dtsi | 2 + src/arm/omap5.dtsi | 2 + 12 files changed, 428 insertions(+), 8 deletions(-) create mode 100644 include/dt-bindings/sound/ti-mcasp.h diff --git a/include/dt-bindings/sound/ti-mcasp.h b/include/dt-bindings/sound/ti-mcasp.h new file mode 100644 index 0000000..86ee4d0 --- /dev/null +++ b/include/dt-bindings/sound/ti-mcasp.h @@ -0,0 +1,13 @@ +#ifndef _DT_BINDINGS_TI_MCASP_H +#define _DT_BINDINGS_TI_MCASP_H + +/* Source of High-frequency transmit/receive clock */ +#define MCASP_CLK_HCLK_AHCLK 0 /* AHCLKX/R */ +#define MCASP_CLK_HCLK_AUXCLK 1 /* Internal functional clock */ + +/* clock divider IDs */ +#define MCASP_CLKDIV_AUXCLK 0 /* HCLK divider from AUXCLK */ +#define MCASP_CLKDIV_BCLK 1 /* BCLK divider from HCLK */ +#define MCASP_CLKDIV_BCLK_FS_RATIO 2 /* to set BCLK FS ration */ + +#endif /* _DT_BINDINGS_TI_MCASP_H */ diff --git a/src/arm/am4372.dtsi b/src/arm/am4372.dtsi index 99aec00..89b1444 100644 --- a/src/arm/am4372.dtsi +++ b/src/arm/am4372.dtsi @@ -72,6 +72,27 @@ interrupt-parent = <&gic>; }; + scu: scu@48240000 { + compatible = "arm,cortex-a9-scu"; + reg = <0x48240000 0x100>; + }; + + global_timer: timer@48240200 { + compatible = "arm,cortex-a9-global-timer"; + reg = <0x48240200 0x100>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&mpu_periphclk>; + }; + + local_timer: timer@48240600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0x48240600 0x100>; + interrupts = ; + interrupt-parent = <&gic>; + clocks = <&mpu_periphclk>; + }; + wakeupgen: interrupt-controller@48281000 { compatible = "ti,omap4-wugen-mpu"; interrupt-controller; diff --git a/src/arm/am43xx-clocks.dtsi b/src/arm/am43xx-clocks.dtsi index b8d1f8a..e9388ba 100644 --- a/src/arm/am43xx-clocks.dtsi +++ b/src/arm/am43xx-clocks.dtsi @@ -267,6 +267,14 @@ ti,invert-autoidle-bit; }; + mpu_periphclk: mpu_periphclk { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&dpll_mpu_m2_ck>; + clock-mult = <1>; + clock-div = <2>; + }; + dpll_ddr_ck: dpll_ddr_ck { #clock-cells = <0>; compatible = "ti,am3-dpll-clock"; diff --git a/src/arm/am571x-idk.dts b/src/arm/am571x-idk.dts index 523c2c6..46cfdbf 100644 --- a/src/arm/am571x-idk.dts +++ b/src/arm/am571x-idk.dts @@ -21,6 +21,33 @@ device_type = "memory"; reg = <0x0 0x80000000 0x0 0x40000000>; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipu2_cma_pool: ipu2_cma@95800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x95800000 0x0 0x3800000>; + reusable; + status = "okay"; + }; + + dsp1_cma_pool: dsp1_cma@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + status = "okay"; + }; + + ipu1_cma_pool: ipu1_cma@9d000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x9d000000 0x0 0x2000000>; + reusable; + status = "okay"; + }; + }; }; &dpll_dsp_ck { @@ -43,6 +70,61 @@ assigned-clock-rates = <532000000>; }; +&mailbox5 { + status = "okay"; + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + status = "okay"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + status = "okay"; + }; +}; + +&mailbox6 { + status = "okay"; + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + status = "okay"; + }; +}; + +&mmu0_dsp1 { + status = "okay"; +}; + +&mmu1_dsp1 { + status = "okay"; +}; + +&mmu_ipu1 { + status = "okay"; +}; + +&mmu_ipu2 { + status = "okay"; +}; + +&ipu2 { + status = "okay"; + memory-region = <&ipu2_cma_pool>; + mboxes = <&mailbox6 &mbox_ipu2_ipc3x>; + timers = <&timer3>; + watchdog-timers = <&timer4>, <&timer9>; +}; + +&ipu1 { + status = "okay"; + memory-region = <&ipu1_cma_pool>; + mboxes = <&mailbox5 &mbox_ipu1_ipc3x>; + timers = <&timer11>; +}; + +&dsp1 { + status = "okay"; + memory-region = <&dsp1_cma_pool>; + mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; + timers = <&timer5>; +}; + &dra7_pmx_core { mmc1_pins_default: mmc1_pins_default { pinctrl-single,pins = < diff --git a/src/arm/am572x-idk.dts b/src/arm/am572x-idk.dts index 37b3e80..fdc0e08 100644 --- a/src/arm/am572x-idk.dts +++ b/src/arm/am572x-idk.dts @@ -23,6 +23,40 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipu2_cma_pool: ipu2_cma@95800000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x95800000 0x0 0x3800000>; + reusable; + status = "okay"; + }; + + dsp1_cma_pool: dsp1_cma@99000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x99000000 0x0 0x4000000>; + reusable; + status = "okay"; + }; + + ipu1_cma_pool: ipu1_cma@9d000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x9d000000 0x0 0x2000000>; + reusable; + status = "okay"; + }; + + dsp2_cma_pool: dsp2_cma@9f000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0x9f000000 0x0 0x800000>; + reusable; + status = "okay"; + }; + }; + extcon_usb2: extcon_usb2 { compatible = "linux,extcon-usb-gpio"; id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; @@ -116,6 +150,79 @@ assigned-clock-rates = <532000000>; }; +&mailbox5 { + status = "okay"; + mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { + status = "okay"; + }; + mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { + status = "okay"; + }; +}; + +&mailbox6 { + status = "okay"; + mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { + status = "okay"; + }; + mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { + status = "okay"; + }; +}; + +&mmu0_dsp1 { + status = "okay"; +}; + +&mmu1_dsp1 { + status = "okay"; +}; + +&mmu0_dsp2 { + status = "okay"; +}; + +&mmu1_dsp2 { + status = "okay"; +}; + +&mmu_ipu1 { + status = "okay"; +}; + +&mmu_ipu2 { + status = "okay"; +}; + +&ipu2 { + status = "okay"; + memory-region = <&ipu2_cma_pool>; + mboxes = <&mailbox6 &mbox_ipu2_ipc3x>; + timers = <&timer3>; + watchdog-timers = <&timer4>, <&timer9>; +}; + +&ipu1 { + status = "okay"; + memory-region = <&ipu1_cma_pool>; + mboxes = <&mailbox5 &mbox_ipu1_ipc3x>; + timers = <&timer11>; +}; + +&dsp1 { + status = "okay"; + memory-region = <&dsp1_cma_pool>; + mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; + timers = <&timer5>; +}; + +&dsp2 { + status = "okay"; + memory-region = <&dsp2_cma_pool>; + mboxes = <&mailbox6 &mbox_dsp2_ipc3x>; + timers = <&timer6>; +}; + &ov2659_1 { remote-endpoint = <&vin4b>; }; diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index 4929025..b157f38 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -905,6 +905,7 @@ reg-names = "l2ram"; ti,hwmods = "ipu1"; iommus = <&mmu_ipu1>; + ti,rproc-standby-info = <0x4a005520>; status = "disabled"; }; @@ -914,6 +915,7 @@ reg-names = "l2ram"; ti,hwmods = "ipu2"; iommus = <&mmu_ipu2>; + ti,rproc-standby-info = <0x4a008920>; status = "disabled"; }; @@ -926,6 +928,7 @@ ti,hwmods = "dsp1"; syscon-bootreg = <&scm_conf 0x55c>; iommus = <&mmu0_dsp1>, <&mmu1_dsp1>; + ti,rproc-standby-info = <0x4a005420>; status = "disabled"; }; @@ -1711,7 +1714,7 @@ interrupts = , ; interrupt-names = "tx", "rx"; - dmas = <&edma_xbar 133>, <&edma_xbar 132>; + dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>; dma-names = "tx", "rx"; clocks = <&mcasp3_ahclkx_mux>; clock-names = "fck"; @@ -1957,7 +1960,7 @@ ti,hwmods = "aes1"; reg = <0x4b500000 0xa0>; interrupts = ; - dmas = <&sdma_xbar 111>, <&sdma_xbar 110>; + dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>; dma-names = "tx", "rx"; clocks = <&l3_iclk_div>; clock-names = "fck"; @@ -1968,7 +1971,7 @@ ti,hwmods = "aes2"; reg = <0x4b700000 0xa0>; interrupts = ; - dmas = <&sdma_xbar 114>, <&sdma_xbar 113>; + dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>; dma-names = "tx", "rx"; clocks = <&l3_iclk_div>; clock-names = "fck"; @@ -1990,7 +1993,7 @@ ti,hwmods = "sham"; reg = <0x4b101000 0x300>; interrupts = ; - dmas = <&sdma_xbar 119>; + dmas = <&edma_xbar 119 0>; dma-names = "rx"; clocks = <&l3_iclk_div>; clock-names = "fck"; diff --git a/src/arm/dra74x.dtsi b/src/arm/dra74x.dtsi index 110518a..1b92946 100644 --- a/src/arm/dra74x.dtsi +++ b/src/arm/dra74x.dtsi @@ -117,6 +117,7 @@ ti,hwmods = "dsp2"; syscon-bootreg = <&scm_conf 0x560>; iommus = <&mmu0_dsp2>, <&mmu1_dsp2>; + ti,rproc-standby-info = <0x4a005620>; status = "disabled"; }; }; diff --git a/src/arm/k2g-evm.dts b/src/arm/k2g-evm.dts index 1366aee..980f859 100644 --- a/src/arm/k2g-evm.dts +++ b/src/arm/k2g-evm.dts @@ -14,6 +14,7 @@ */ /dts-v1/; +#include #include "k2g.dtsi" / { @@ -44,14 +45,23 @@ }; }; - mmc0_reg: fixedregulator-mmc0 { + vcc3v3_dcin_reg: fixedregulator-vcc3v3-dcin { compatible = "regulator-fixed"; - regulator-name = "mmc0_fixed"; + regulator-name = "vcc3v3_dcin_fixed"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; + /* This is actually coming from TPS659118:LDO2_1V8 */ + vcc1v8_aud_reg: fixedregulator-vcc1v8-aud { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_aud_fixed"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + mmc1_reg: fixedregulator-mmc1 { compatible = "regulator-fixed"; regulator-name = "mmc1_fixed"; @@ -67,6 +77,33 @@ <0xa0000000 0x20000000>; }; }; + + sound0: sound@0 { + compatible = "simple-audio-card"; + simple-audio-card,name = "K2G-EVM"; + simple-audio-card,widgets = + "Headphone", "Headphone Jack", + "Line", "Line In"; + simple-audio-card,routing = + "Headphone Jack", "HPLOUT", + "Headphone Jack", "HPROUT", + "LINE1L", "Line In", + "LINE1R", "Line In"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound0_master>; + simple-audio-card,frame-master = <&sound0_master>; + + sound0_master: simple-audio-card,cpu { + sound-dai = <&mcasp2>; + system-clock-frequency = <22579200>; + system-clock-id = ; + }; + + simple-audio-card,codec { + sound-dai = <&tlv320aic3106>; + system-clock-frequency = <12288000>; + }; + }; }; &k2g_pinctrl { @@ -84,6 +121,13 @@ >; }; + i2c1_pins: pinmux_i2c1_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1384) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_scl.i2c1_scl */ + K2G_CORE_IOPAD(0x1388) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE0) /* i2c1_sda.i2c1_sda */ + >; + }; + mmc0_pins: pinmux_mmc0_pins { pinctrl-single,pins = < K2G_CORE_IOPAD(0x1300) (BUFFER_CLASS_B | PIN_PULLUP | MUX_MODE2) /* mmc0_dat3.mmc0_dat3 */ @@ -161,6 +205,15 @@ K2G_CORE_IOPAD(0x1068) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ >; }; + + mcasp2_pins: pinmux_mcasp2_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1234) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo2.mcasp2_axr2 */ + K2G_CORE_IOPAD(0x1238) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo3.mcasp2_axr3 */ + K2G_CORE_IOPAD(0x1254) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo10.mcasp2_afsx */ + K2G_CORE_IOPAD(0x125c) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo12.mcasp2_aclkx */ + >; + }; }; &elm { @@ -258,10 +311,30 @@ }; }; +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + clock-frequency = <400000>; + + tlv320aic3106: tlv320aic3106@1b { + #sound-dai-cells = <0>; + compatible = "ti,tlv320aic3106"; + reg = <0x1b>; + status = "okay"; + + /* Regulators */ + AVDD-supply = <&vcc3v3_dcin_reg>; + IOVDD-supply = <&vcc3v3_dcin_reg>; + DRVDD-supply = <&vcc3v3_dcin_reg>; + DVDD-supply = <&vcc1v8_aud_reg>; + }; +}; + &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; - vmmc-supply = <&mmc0_reg>; + vmmc-supply = <&vcc3v3_dcin_reg>; status = "okay"; }; @@ -370,3 +443,24 @@ }; }; }; + +&mcasp2 { + #sound-dai-cells = <0>; + + pinctrl-names = "default"; + pinctrl-0 = <&mcasp2_pins>; + + assigned-clocks = <&k2g_clks K2G_DEV_MCASP2 K2G_DEV_MCASP_AUX_CLK>; + assigned-clock-parents = <&k2g_clks K2G_DEV_MCASP2 K2G_DEV_MCASP_AUX_CLK_PARENT_AUDIO_OSC>; + + status = "okay"; + + op-mode = <0>; /* MCASP_IIS_MODE */ + tdm-slots = <2>; + /* 6 serializer */ + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ + 0 0 1 2 0 0 // AXR2: TX, AXR3: rx + >; + tx-num-evt = <32>; + rx-num-evt = <32>; +}; diff --git a/src/arm/k2g.dtsi b/src/arm/k2g.dtsi index b9b32e5..6eb6612 100644 --- a/src/arm/k2g.dtsi +++ b/src/arm/k2g.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include #include #include "skeleton.dtsi" @@ -246,6 +247,44 @@ power-domains = <&k2g_pds K2G_DEV_EDMA0>; }; + gpio0: gpio@2603000 { + compatible = "ti,k2g-gpio"; + reg = <0x02603000 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupts = , + , + , + , + , + , + , + , + ; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <144>; + ti,davinci-gpio-unbanked = <0>; + power-domains = <&k2g_pds K2G_DEV_GPIO0>; + }; + + gpio1: gpio@260a000 { + compatible = "ti,k2g-gpio"; + reg = <0x0260a000 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupts = , + , + , + , + ; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <68>; + ti,davinci-gpio-unbanked = <0>; + power-domains = <&k2g_pds K2G_DEV_GPIO1>; + }; + mmc0: mmc@23000000 { compatible = "ti,omap4-hsmmc"; reg = <0x23000000 0x400>; @@ -605,6 +644,54 @@ bus_freq = <2500000>; }; + mcasp0: mcasp@02340000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x02340000 0x2000>, + <0x21804000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma0 24 1>, <&edma0 25 1>; + dma-names = "tx", "rx"; + status = "disabled"; + power-domains = <&k2g_pds K2G_DEV_MCASP0>; + clocks = <&k2g_clks K2G_DEV_MCASP0 K2G_DEV_MCASP_VBUS_CLK>; + clock-names = "fck"; + }; + + mcasp1: mcasp@02342000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x02342000 0x2000>, + <0x21804400 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma1 48 1>, <&edma1 49 1>; + dma-names = "tx", "rx"; + status = "disabled"; + power-domains = <&k2g_pds K2G_DEV_MCASP1>; + clocks = <&k2g_clks K2G_DEV_MCASP1 K2G_DEV_MCASP_VBUS_CLK>; + clock-names = "fck"; + }; + + mcasp2: mcasp@02344000 { + compatible = "ti,am33xx-mcasp-audio"; + reg = <0x02344000 0x2000>, + <0x21804800 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma1 50 1>, <&edma1 51 1>; + dma-names = "tx", "rx"; + status = "disabled"; + power-domains = <&k2g_pds K2G_DEV_MCASP2>; + clocks = <&k2g_clks K2G_DEV_MCASP2 K2G_DEV_MCASP_VBUS_CLK>; + clock-names = "fck"; + }; + #include "k2g-netcp.dtsi" }; }; diff --git a/src/arm/omap3-evm-37xx.dts b/src/arm/omap3-evm-37xx.dts index 7081e07..aafafd3 100644 --- a/src/arm/omap3-evm-37xx.dts +++ b/src/arm/omap3-evm-37xx.dts @@ -13,7 +13,7 @@ / { model = "TI OMAP37XX EVM (TMDSEVM3730)"; - compatible = "ti,omap3-evm-37xx", "ti,omap36xx"; + compatible = "ti,omap3-evm-37xx", "ti,omap3630", "ti,omap3"; memory { device_type = "memory"; diff --git a/src/arm/omap4.dtsi b/src/arm/omap4.dtsi index 38df22a..bba4e34 100644 --- a/src/arm/omap4.dtsi +++ b/src/arm/omap4.dtsi @@ -824,6 +824,7 @@ syscon-bootreg = <&scm_conf 0x304>; iommus = <&mmu_dsp>; mboxes = <&mailbox &mbox_dsp>; + ti,rproc-standby-info = <0x4a004420>; status = "disabled"; }; @@ -834,6 +835,7 @@ ti,hwmods = "ipu"; iommus = <&mmu_ipu>; mboxes = <&mailbox &mbox_ipu>; + ti,rproc-standby-info = <0x4a008920>; status = "disabled"; }; diff --git a/src/arm/omap5.dtsi b/src/arm/omap5.dtsi index 10a134c..dad3395 100644 --- a/src/arm/omap5.dtsi +++ b/src/arm/omap5.dtsi @@ -828,6 +828,7 @@ syscon-bootreg = <&scm_conf 0x304>; iommus = <&mmu_dsp>; mboxes = <&mailbox &mbox_dsp>; + ti,rproc-standby-info = <0x4a004420>; status = "disabled"; }; @@ -838,6 +839,7 @@ ti,hwmods = "ipu"; iommus = <&mmu_ipu>; mboxes = <&mailbox &mbox_ipu>; + ti,rproc-standby-info = <0x4a008920>; status = "disabled"; }; From 0ede92a34363477286840efc3072b4df1f7a85c1 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Thu, 4 Feb 2016 19:20:28 -0600 Subject: [PATCH 15/18] 4.1.17-ti-rt-r45 Signed-off-by: Robert Nelson --- include/dt-bindings/genpd/k2g.h | 1 + src/arm/am57xx-beagle-x15.dts | 1 - src/arm/dra7.dtsi | 143 ++++++++++++++++++++++++++++++++ src/arm/k2e-netcp.dtsi | 112 ++++++++++++++++++++++++- src/arm/k2g-evm.dts | 124 +++++++++++++++++++++++++++ src/arm/k2g.dtsi | 27 ++++++ src/arm/k2hk-netcp.dtsi | 98 +++++++++++++++++++++- src/arm/k2l-netcp.dtsi | 116 +++++++++++++++++++++++++- 8 files changed, 609 insertions(+), 13 deletions(-) diff --git a/include/dt-bindings/genpd/k2g.h b/include/dt-bindings/genpd/k2g.h index 4ec0a2e..2a66b52 100644 --- a/include/dt-bindings/genpd/k2g.h +++ b/include/dt-bindings/genpd/k2g.h @@ -72,4 +72,5 @@ #define K2G_DEV_CGEM0 0x0046 #define K2G_DEV_MSMC0 0x0047 #define K2G_DEV_CBASS0 0x0049 +#define K2G_DEV_BOARD0 0x004c #endif diff --git a/src/arm/am57xx-beagle-x15.dts b/src/arm/am57xx-beagle-x15.dts index 363db80..739c488 100644 --- a/src/arm/am57xx-beagle-x15.dts +++ b/src/arm/am57xx-beagle-x15.dts @@ -815,7 +815,6 @@ &rtc { status = "okay"; - ext-clk-src; }; &mailbox3 { diff --git a/src/arm/dra7.dtsi b/src/arm/dra7.dtsi index b157f38..aa04a48 100644 --- a/src/arm/dra7.dtsi +++ b/src/arm/dra7.dtsi @@ -302,6 +302,53 @@ }; }; + ocmcram1: ocmcram@40300000 { + compatible = "mmio-sram"; + reg = <0x40300000 0x80000>; + ranges = <0x0 0x40300000 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + /* + * This is a placeholder for an optional reserved + * region for use by secure software. The size + * of this region is not known until runtime so it + * is set as zero to either be updated to reserve + * space or left unchanged to leave all SRAM for use. + * On HS parts that that require the reserved region + * either the bootloader can update the size to + * the required amount or the node can be overriden + * from the board dts file for the secure platform. + */ + sram-hs@0 { + compatible = "ti,secure-ram"; + reg = <0x0 0x0>; + }; + }; + + /* + * NOTE: ocmcram2 and ocmcram3 are not available on all + * DRA7xx and AM57xx variants. Confirm availability in + * the data manual for the exact part number in use + * before enabling these nodes in the board dts file. + */ + ocmcram2: ocmcram@40400000 { + status = "disabled"; + compatible = "mmio-sram"; + reg = <0x40400000 0x100000>; + ranges = <0x0 0x40400000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + + ocmcram3: ocmcram@40500000 { + status = "disabled"; + compatible = "mmio-sram"; + reg = <0x40500000 0x100000>; + ranges = <0x0 0x40500000 0x100000>; + #address-cells = <1>; + #size-cells = <1>; + }; + bandgap: bandgap@4a0021e0 { reg = <0x4a0021e0 0xc 0x4a00232c 0xc @@ -1705,6 +1752,38 @@ status = "disabled"; }; + mcasp1: mcasp@48460000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp1"; + reg = <0x48460000 0x2000>, + <0x45800000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp1_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + + mcasp2: mcasp@48464000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp2"; + reg = <0x48464000 0x2000>, + <0x45c00000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp2_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + mcasp3: mcasp@48468000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp3"; @@ -1721,6 +1800,70 @@ status = "enabled"; }; + mcasp4: mcasp@4846c000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp4"; + reg = <0x4846c000 0x2000>, + <0x48436000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp4_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + + mcasp5: mcasp@48470000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp5"; + reg = <0x48470000 0x2000>, + <0x4843a000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp5_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + + mcasp6: mcasp@48474000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp6"; + reg = <0x48474000 0x2000>, + <0x4844c000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp6_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + + mcasp7: mcasp@48478000 { + compatible = "ti,dra7-mcasp-audio"; + ti,hwmods = "mcasp7"; + reg = <0x48478000 0x2000>, + <0x48450000 0x1000>; + reg-names = "mpu","dat"; + interrupts = , + ; + interrupt-names = "tx", "rx"; + dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>; + dma-names = "tx", "rx"; + clocks = <&mcasp7_ahclkx_mux>; + clock-names = "fck"; + status = "disabled"; + }; + mcasp8: mcasp@4847c000 { compatible = "ti,dra7-mcasp-audio"; ti,hwmods = "mcasp8"; diff --git a/src/arm/k2e-netcp.dtsi b/src/arm/k2e-netcp.dtsi index 85c7612..320cf4d 100644 --- a/src/arm/k2e-netcp.dtsi +++ b/src/arm/k2e-netcp.dtsi @@ -225,10 +225,45 @@ netcp: netcp@24000000 { clock-names = "pa_clk", "ethss_clk", "cpts_rft_clk"; dma-coherent; - ti,navigator-dmas = <&dma_gbe 0>, - <&dma_gbe 8>, - <&dma_gbe 0>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; + ti,navigator-dmas = <&dma_gbe 0>, + <&dma_gbe 8>, + <&dma_gbe 0>, + <&dma_gbe 22>, + <&dma_gbe 23>, + <&dma_gbe 24>, + <&dma_gbe 25>, + <&dma_gbe 27>, + <&dma_gbe 28>, + <&dma_gbe 29>, + <&dma_gbe 30>, + <&dma_gbe 8>, + <&dma_gbe 9>, + <&dma_gbe 10>, + <&dma_gbe 11>, + <&dma_gbe 12>, + <&dma_gbe 13>, + <&dma_gbe 14>, /* for egress cluster */ + <&dma_gbe 31>; + + ti,navigator-dma-names = "netrx0", + "netrx1", + "nettx", + "netrx0-pa", + "netrx1-pa", + "netrx2-pa", + "netrx3-pa", + "netrx4-pa", + "netrx5-pa", + "netrx6-pa", + "netrx7-pa", + "pa-cl0", + "pa-cl1", + "pa-cl2", + "pa-cl3", + "pa-cl4", + "pa-cl5", + "pa-cl6", + "pa-cmd-rsp"; netcp-devices { #address-cells = <1>; @@ -284,6 +319,73 @@ netcp: netcp@24000000 { }; }; }; + + pa@0 { + #address-cells = <1>; + #size-cells = <1>; + label = "netcp-pa2"; + compatible = "ti,netcp-pa2"; + + reg = <0 0x100>, /* Mailbox */ + <0x400 0x40>, /* RA bridge */ + <0x500 0x80>, /* thread mapper */ + <0x800 0x1000>, /* RA */ + <0x6000 0x100>, /* Statistics regs */ + <0x8000 0x100>, /* Statistics block */ + <0x400000 0x900000>; /* cluster memory */ + + mac-lut-ranges = <0 43 56 63>; + /* Static reservation in LUT-1 (outer IP) + * used by driver to add IP rules for Rx checksum + * offload. + */ + rx-route = <528 22>; + tx-cmd-pool = <256 12>; + /* rx command pool */ + rx-cmd-rsp-pool = <256 12>; + /* rx channel name for command response */ + rx-cmd-rsp-chan = "pa-cmd-rsp"; + rx-cmd-rsp-queue-depth = <128 32 0 0>; + rx-cmd-rsp-buffer-size = <128 512 0 0>; + + /* rx channels get overridden for the interface + * when PA is enabled + */ + interfaces { + pa0: interface-0 { + slave-port = <0>; + rx-channel = "netrx0-pa"; + }; + + pa1: interface-1 { + slave-port = <1>; + rx-channel = "netrx1-pa"; + }; + }; + + /* PA clusters that does packet processing */ + clusters { + #address-cells = <1>; + #size-cells = <0>; + cluster@0 { + reg = <0>; + tx-queue = <904>; + tx-channel = "pa-cl0"; + }; + + cluster@1 { + reg = <1>; + tx-queue = <905>; + tx-channel = "pa-cl1"; + }; + + cluster@6 { + reg = <6>; + tx-queue = <910>; + tx-channel = "pa-cl6"; + }; + }; + }; }; netcp-interfaces { @@ -297,6 +399,7 @@ netcp: netcp@24000000 { tx-completion-queue = <530>; efuse-mac = <1>; netcp-gbe = <&gbe0>; + netcp-pa2 = <&pa0>; }; interface-1 { @@ -310,6 +413,7 @@ netcp: netcp@24000000 { efuse-mac = <0>; local-mac-address = [02 18 31 7e 3e 00]; netcp-gbe = <&gbe1>; + netcp-pa2 = <&pa1>; }; }; }; diff --git a/src/arm/k2g-evm.dts b/src/arm/k2g-evm.dts index 980f859..2cbf021 100644 --- a/src/arm/k2g-evm.dts +++ b/src/arm/k2g-evm.dts @@ -15,6 +15,7 @@ /dts-v1/; #include +#include #include "k2g.dtsi" / { @@ -26,6 +27,10 @@ reg = <0x00000008 0x00000000 0x00000000 0x80000000>; }; + aliases { + display0 = &hdmi; + }; + reserved-memory { #address-cells = <2>; #size-cells = <2>; @@ -104,6 +109,44 @@ system-clock-frequency = <12288000>; }; }; + + sound1: sound@1 { + compatible = "simple-audio-card"; + simple-audio-card,name = "HDMI"; + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&sound1_master>; + simple-audio-card,frame-master = <&sound1_master>; + + sound1_master: simple-audio-card,cpu { + sound-dai = <&mcasp2>; + system-clock-frequency = <22579200>; + system-clock-id = ; + }; + + simple-audio-card,codec { + sound-dai = <&sii9022>; + system-clock-frequency = <12288000>; + }; + }; + + hdmi: connector { + compatible = "hdmi-connector"; + label = "hdmi"; + + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&sii9022_out>; + }; + }; + }; +}; + +&k2g_clks { + /* on the board 22.5792MHz is connected to AUDOSC_IN */ + assigned-clocks = <&k2g_clks K2G_DEV_BOARD0 K2G_DEV_BOARD_AUDIO_OSCIN>; + assigned-clock-rates = <22579200>; }; &k2g_pinctrl { @@ -214,6 +257,40 @@ K2G_CORE_IOPAD(0x125c) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE4) /* pr0_pru_gpo12.mcasp2_aclkx */ >; }; + + vout_pins: pinmux_vout_pins { + pinctrl-single,pins = < + K2G_CORE_IOPAD(0x1078) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata23.dssdata23 */ + K2G_CORE_IOPAD(0x107c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata22.dssdata22 */ + K2G_CORE_IOPAD(0x1080) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata21.dssdata21 */ + K2G_CORE_IOPAD(0x1084) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata20.dssdata20 */ + K2G_CORE_IOPAD(0x1088) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata19.dssdata19 */ + K2G_CORE_IOPAD(0x108c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata18.dssdata18 */ + K2G_CORE_IOPAD(0x1090) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata17.dssdata17 */ + K2G_CORE_IOPAD(0x1094) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata16.dssdata16 */ + K2G_CORE_IOPAD(0x1098) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata15.dssdata15 */ + K2G_CORE_IOPAD(0x109c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata14.dssdata14 */ + K2G_CORE_IOPAD(0x10a0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata13.dssdata13 */ + K2G_CORE_IOPAD(0x10a4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata12.dssdata12 */ + K2G_CORE_IOPAD(0x10a8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata11.dssdata11 */ + K2G_CORE_IOPAD(0x10ac) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata10.dssdata10 */ + K2G_CORE_IOPAD(0x10b0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata9.dssdata9 */ + K2G_CORE_IOPAD(0x10b4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata8.dssdata8 */ + K2G_CORE_IOPAD(0x10b8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata7.dssdata7 */ + K2G_CORE_IOPAD(0x10bc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata6.dssdata6 */ + K2G_CORE_IOPAD(0x10c0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata5.dssdata5 */ + K2G_CORE_IOPAD(0x10c4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata4.dssdata4 */ + K2G_CORE_IOPAD(0x10c8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata3.dssdata3 */ + K2G_CORE_IOPAD(0x10cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata2.dssdata2 */ + K2G_CORE_IOPAD(0x10d0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata1.dssdata1 */ + K2G_CORE_IOPAD(0x10d4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssdata0.dssdata0 */ + K2G_CORE_IOPAD(0x10d8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssvsync.dssvsync */ + K2G_CORE_IOPAD(0x10dc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsshsync.dsshsync */ + K2G_CORE_IOPAD(0x10e0) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dsspclk.dsspclk */ + K2G_CORE_IOPAD(0x10e4) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssde.dssde */ + K2G_CORE_IOPAD(0x10e8) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* dssfid.dssfid */ + >; + }; }; &elm { @@ -329,6 +406,40 @@ DRVDD-supply = <&vcc3v3_dcin_reg>; DVDD-supply = <&vcc1v8_aud_reg>; }; + + sii9022: sii9022@3b { + #sound-dai-cells = <0>; + compatible = "sil,sii9022"; + reg = <0x3b>; + + i2s-fifo-routing = < + (ENABLE_BIT|CONNECT_SD0) + 0 + 0 + 0 + >; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sii9022_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + + port@1 { + reg = <1>; + + sii9022_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; }; &mmc0 { @@ -464,3 +575,16 @@ tx-num-evt = <32>; rx-num-evt = <32>; }; + +&dss { + pinctrl-names = "default"; + pinctrl-0 = <&vout_pins>; + status = "ok"; + + port { + dpi_out: endpoint { + remote-endpoint = <&sii9022_in>; + data-lines = <24>; + }; + }; +}; diff --git a/src/arm/k2g.dtsi b/src/arm/k2g.dtsi index 6eb6612..f7ee37c 100644 --- a/src/arm/k2g.dtsi +++ b/src/arm/k2g.dtsi @@ -693,5 +693,32 @@ }; #include "k2g-netcp.dtsi" + + dss: dss@02540000 { + compatible = "ti,k2g-dss","simple-bus"; + reg = <0x02540000 0x400>; + clocks = <&k2g_clks K2G_DEV_DSS0 K2G_DEV_DSS_PI_DSS_OCP_CLK>; + clock-names = "fck"; + power-domains = <&k2g_pds K2G_DEV_DSS0>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + dispc@02550000 { + compatible = "ti,k2g-dispc"; + reg = <0x02550000 0x1000>, + <0x02557000 0x1000>, + <0x0255a800 0x100>, + <0x0255ac00 0x100>; + reg-names = "common", "vid1", "ovr1", "vp1"; + + interrupts = ; + + clocks = <&k2g_clks K2G_DEV_DSS0 K2G_DEV_DSS_PI_DSS_OCP_CLK>, + <&k2g_clks K2G_DEV_DSS0 K2G_DEV_DSS_PI_DSS_VP_CLK>; + clock-names = "fck", "vp"; + }; + }; }; }; diff --git a/src/arm/k2hk-netcp.dtsi b/src/arm/k2hk-netcp.dtsi index 38b702c..9701838 100644 --- a/src/arm/k2hk-netcp.dtsi +++ b/src/arm/k2hk-netcp.dtsi @@ -206,10 +206,30 @@ netcp: netcp@2000000 { clock-names = "pa_clk", "ethss_clk", "cpts_rft_clk" ; dma-coherent; - ti,navigator-dmas = <&dma_gbe 22>, - <&dma_gbe 23>, - <&dma_gbe 8>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; + ti,navigator-dmas = <&dma_gbe 22>, /* rx flow for CPSW port 0 */ + <&dma_gbe 23>, /* rx flow for CPSW port 1 */ + <&dma_gbe 8>, /* CPSW tx channel */ + <&dma_gbe 24>, /* rx flow for CPSW port 2 */ + <&dma_gbe 25>, /* rx flow for CPSW port 3 */ + <&dma_gbe 0>, /* PA cluster 0 channel */ + <&dma_gbe 1>, /* PA cluster 1 channel */ + <&dma_gbe 2>, /* PA cluster 2 channel */ + <&dma_gbe 3>, /* PA cluster 3 channel */ + <&dma_gbe 4>, /* PA cluster 4 channel */ + <&dma_gbe 5>, /* PA cluster 5 channel */ + <&dma_gbe 31>; /* PA rx flow for cmd rsp */ + ti,navigator-dma-names = "netrx0", + "netrx1", + "nettx", + "netrx2", + "netrx3", + "pa-cl0", + "pa-cl1", + "pa-cl2", + "pa-cl3", + "pa-cl4", + "pa-cl5", + "pa-cmd-rsp"; netcp-devices { #address-cells = <1>; @@ -249,6 +269,74 @@ netcp: netcp@2000000 { }; }; }; + + pa@0 { + #address-cells = <1>; + #size-cells = <1>; + label = "netcp-pa"; + compatible = "ti,netcp-pa"; + + reg = <0 0x60>, /* Mailbox */ + <0x400 0x10>, /* Packet ID */ + <0x500 0x40>, /* LUT2 */ + <0x604 0x4>, /* streaming switch */ + <0x1000 0x600>, /* Control */ + <0x3000 0x600>, /* Timers */ + <0x6000 0x100>, /* Statistics */ + <0x10000 0x30000>, /* Iram */ + <0x40000 0x8000>; /* Sram */ + + mac-lut-ranges = <0 43 56 63>; + /* Static reservation in LUT-1 (outer IP) + * used by driver to add IP rules for Rx checksum + * offload. + */ + ip-lut-ranges = <61 63>; + /* base queue, base flow. Should match with that + * for netrx0 + */ + rx-route = <8704 22>; + tx-cmd-pool = <256 12>; + /* rx command pool */ + rx-cmd-rsp-pool = <256 12>; + /* rx channel name for command response */ + rx-cmd-rsp-chan = "pa-cmd-rsp"; + rx-cmd-rsp-queue-depth = <128 32 0 0>; + rx-cmd-rsp-buffer-size = <128 512 0 0>; + + interfaces { + pa0: interface-0 { + slave-port = <0>; + }; + + pa1: interface-1 { + slave-port = <1>; + }; + }; + + /* PA clusters that does packet processing */ + clusters { + #address-cells = <1>; + #size-cells = <0>; + cluster@0 { + reg = <0>; + tx-queue = <640>; + tx-channel = "pa-cl0"; + }; + + cluster@1 { + reg = <1>; + tx-queue = <641>; + tx-channel = "pa-cl1"; + }; + + cluster@5 { + reg = <5>; + tx-queue = <645>; + tx-channel = "pa-cl5"; + }; + }; + }; }; netcp-interfaces { @@ -262,6 +350,7 @@ netcp: netcp@2000000 { tx-completion-queue = <8706>; efuse-mac = <1>; netcp-gbe = <&gbe0>; + netcp-pa = <&pa0>; }; interface-1 { @@ -275,6 +364,7 @@ netcp: netcp@2000000 { efuse-mac = <0>; local-mac-address = [02 18 31 7e 3e 6f]; netcp-gbe = <&gbe1>; + netcp-pa = <&pa1>; }; }; }; diff --git a/src/arm/k2l-netcp.dtsi b/src/arm/k2l-netcp.dtsi index debcbc4..bb57002 100644 --- a/src/arm/k2l-netcp.dtsi +++ b/src/arm/k2l-netcp.dtsi @@ -210,10 +210,45 @@ netcp: netcp@26000000 { clock-names = "pa_clk", "ethss_clk", "cpts_rft_clk", "osr_clk"; dma-coherent; - ti,navigator-dmas = <&dma_gbe 0>, - <&dma_gbe 8>, - <&dma_gbe 0>; - ti,navigator-dma-names = "netrx0", "netrx1", "nettx"; + ti,navigator-dmas = <&dma_gbe 0>, + <&dma_gbe 8>, + <&dma_gbe 0>, + <&dma_gbe 22>, + <&dma_gbe 23>, + <&dma_gbe 24>, + <&dma_gbe 25>, + <&dma_gbe 27>, + <&dma_gbe 28>, + <&dma_gbe 29>, + <&dma_gbe 30>, + <&dma_gbe 8>, + <&dma_gbe 9>, + <&dma_gbe 10>, + <&dma_gbe 11>, + <&dma_gbe 12>, + <&dma_gbe 13>, + <&dma_gbe 14>, /* for egress cluster */ + <&dma_gbe 31>; + + ti,navigator-dma-names = "netrx0", + "netrx1", + "nettx", + "netrx0-pa", + "netrx1-pa", + "netrx2-pa", + "netrx3-pa", + "netrx4-pa", + "netrx5-pa", + "netrx6-pa", + "netrx7-pa", + "pa-cl0", + "pa-cl1", + "pa-cl2", + "pa-cl3", + "pa-cl4", + "pa-cl5", + "pa-cl6", + "pa-cmd-rsp"; netcp-devices { #address-cells = <1>; @@ -253,6 +288,77 @@ netcp: netcp@26000000 { }; }; }; + + pa@0 { + #address-cells = <1>; + #size-cells = <1>; + label = "netcp-pa2"; + compatible = "ti,netcp-pa2"; + + reg = <0 0x100>, /* Mailbox */ + <0x400 0x40>, /* RA bridge */ + <0x500 0x80>, /* thread mapper */ + <0x800 0x1000>, /* RA */ + <0x6000 0x100>, /* Statistics regs */ + <0x8000 0x100>, /* Statistics block */ + <0x400000 0x900000>; /* cluster memory */ + + mac-lut-ranges = <0 43 56 63>; + /* Static reservation in LUT-1 (outer IP) + * used by driver to add IP rules for Rx checksum + * offload. + */ + ip-lut-ranges = <61 63>; + /* base queue, base flow. Should match with that + * for netrx0 + */ + rx-route = <528 22>; + tx-cmd-pool = <256 12>; + /* rx command pool */ + rx-cmd-rsp-pool = <256 12>; + /* rx channel name for command response */ + rx-cmd-rsp-chan = "pa-cmd-rsp"; + rx-cmd-rsp-queue-depth = <128 32 0 0>; + rx-cmd-rsp-buffer-size = <128 512 0 0>; + + /* rx channels get overridden for the interface + * when PA is enabled + */ + interfaces { + pa0: interface-0 { + slave-port = <0>; + rx-channel = "netrx0-pa"; + }; + + pa1: interface-1 { + slave-port = <1>; + rx-channel = "netrx1-pa"; + }; + }; + + /* PA clusters that does packet processing */ + clusters { + #address-cells = <1>; + #size-cells = <0>; + cluster@0 { + reg = <0>; + tx-queue = <904>; + tx-channel = "pa-cl0"; + }; + + cluster@1 { + reg = <1>; + tx-queue = <905>; + tx-channel = "pa-cl1"; + }; + + cluster@6 { + reg = <6>; + tx-queue = <910>; + tx-channel = "pa-cl6"; + }; + }; + }; }; netcp-interfaces { @@ -266,6 +372,7 @@ netcp: netcp@26000000 { tx-completion-queue = <530>; efuse-mac = <1>; netcp-gbe = <&gbe0>; + netcp-pa2 = <&pa0>; }; interface-1 { @@ -279,6 +386,7 @@ netcp: netcp@26000000 { efuse-mac = <0>; local-mac-address = [02 18 31 7e 3e 7f]; netcp-gbe = <&gbe1>; + netcp-pa2 = <&pa1>; }; }; }; From 5915fcbe3e83a2a9dd87e32c11de7f0f6fb05c7a Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 5 Feb 2016 08:59:10 -0600 Subject: [PATCH 16/18] edma-fix, breaks uart0/uart1/uart2 overlays Signed-off-by: Robert Nelson --- src/arm/am33xx-overlay-edma-fix.dtsi | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/src/arm/am33xx-overlay-edma-fix.dtsi b/src/arm/am33xx-overlay-edma-fix.dtsi index 79037f9..88c8d04 100644 --- a/src/arm/am33xx-overlay-edma-fix.dtsi +++ b/src/arm/am33xx-overlay-edma-fix.dtsi @@ -8,18 +8,6 @@ * published by the Free Software Foundation. */ -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - &spi0 { status = "okay"; }; From 749ee4f3395595a25cb3cc91a59e097c86a4d0d0 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Fri, 5 Feb 2016 09:26:20 -0600 Subject: [PATCH 17/18] 4.1.17-ti-rt-r46 Signed-off-by: Robert Nelson --- src/arm/am335x-evm.dts | 9 +- src/arm/am437x-gp-evm.dts | 9 +- src/arm/am57xx-beagle-x15-es2plus.dts | 20 ++ src/arm/am57xx-evm-common.dtsi | 314 ++++++++++++++++++++++++++ src/arm/am57xx-evm-es2plus.dts | 13 ++ src/arm/am57xx-evm.dts | 309 +------------------------ src/arm/dra7-evm.dts | 172 ++++++++++++-- 7 files changed, 503 insertions(+), 343 deletions(-) create mode 100644 src/arm/am57xx-beagle-x15-es2plus.dts create mode 100644 src/arm/am57xx-evm-common.dtsi create mode 100644 src/arm/am57xx-evm-es2plus.dts diff --git a/src/arm/am335x-evm.dts b/src/arm/am335x-evm.dts index 7ded3ad..36e91d8 100644 --- a/src/arm/am335x-evm.dts +++ b/src/arm/am335x-evm.dts @@ -855,8 +855,8 @@ &mmc3 { /* these are on the crossbar and are outlined in the xbar-event-map element */ - dmas = <&edma 12 - &edma 13>; + dmas = <&edma_xbar 12 0 1 + &edma_xbar 13 0 2>; dma-names = "tx", "rx"; status = "okay"; vmmc-supply = <&wlan_en_reg>; @@ -879,11 +879,6 @@ }; }; -&edma { - ti,edma-xbar-event-map = /bits/ 16 <1 12 - 2 13>; -}; - &sham { status = "okay"; }; diff --git a/src/arm/am437x-gp-evm.dts b/src/arm/am437x-gp-evm.dts index 7dcc9cc..a4fe6d1 100644 --- a/src/arm/am437x-gp-evm.dts +++ b/src/arm/am437x-gp-evm.dts @@ -948,8 +948,8 @@ status = "okay"; /* these are on the crossbar and are outlined in the xbar-event-map element */ - dmas = <&edma 30 - &edma 31>; + dmas = <&edma_xbar 30 0 1>, + <&edma_xbar 31 0 2>; dma-names = "tx", "rx"; vmmc-supply = <&vmmcwl_fixed>; bus-width = <4>; @@ -970,11 +970,6 @@ }; }; -&edma { - ti,edma-xbar-event-map = /bits/ 16 <1 30 - 2 31>; -}; - &uart3 { status = "okay"; pinctrl-names = "default"; diff --git a/src/arm/am57xx-beagle-x15-es2plus.dts b/src/arm/am57xx-beagle-x15-es2plus.dts new file mode 100644 index 0000000..05094b0 --- /dev/null +++ b/src/arm/am57xx-beagle-x15-es2plus.dts @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "am57xx-beagle-x15.dts" +/ { + model = "TI AM5728 BeagleBoard-X15 ES2+"; +}; + +&tpd12s015 { + gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */ + <&gpio2 30 GPIO_ACTIVE_HIGH>, /* gpio2_30, LS OE (for new boards) */ + <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */ +}; + +/* TBD: MMC configuration for HS200 and dual voltage support */ diff --git a/src/arm/am57xx-evm-common.dtsi b/src/arm/am57xx-evm-common.dtsi new file mode 100644 index 0000000..245765a --- /dev/null +++ b/src/arm/am57xx-evm-common.dtsi @@ -0,0 +1,314 @@ +/* + * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include + +/ { + model = "TI AM572x EVM"; + compatible = "ti,am572x-evm", "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; + + aliases { + display0 = &lcd0; + display1 = &hdmi0; + }; + + gpio_keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + USER1 { + label = "Up"; + linux,code = ; + gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; + }; + + USER2 { + label = "Down"; + linux,code = ; + gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; + }; + + USER3 { + label = "Left"; + linux,code = ; + gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + }; + + USER4 { + label = "Right"; + linux,code = ; + gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; + }; + + USER5 { + label = "Home"; + linux,code = ; + gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; + }; + }; + + lcd0: display { + compatible = "osddisplays,osd070t1718-19ts", "panel-dpi"; + + label = "lcd"; + + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + + panel-timing { + clock-frequency = <33000000>; + hactive = <800>; + vactive = <480>; + hfront-porch = <210>; + hback-porch = <16>; + hsync-len = <30>; + vback-porch = <10>; + vfront-porch = <22>; + vsync-len = <13>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <1>; + pixelclk-active = <1>; + }; + + port { + lcd_in: endpoint { + remote-endpoint = <&dpi_out>; + }; + }; + }; + + backlight { + compatible = "pwm-backlight"; + pwms = <&ehrpwm1 0 50000 0>; + + /* Anything lower than 241 is no longer visible */ + brightness-levels = <0 243 245 247 249 251 252 253 255>; + + default-brightness-level = <8>; + }; + + vmmcwl_fixed: fixedregulator-mmcwl { + compatible = "regulator-fixed"; + regulator-name = "vmmcwl_fixed"; + /* + the gpio used for wlan_enable goes through a level shifter + on the platform. the settings for 1.8v below is needed by + the regulator driver, but is more of a comment since it + doesn't really control the voltage of the gpio + */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + kim { + compatible = "kim"; + nshutdown_gpio = <132>; + dev_name = "/dev/ttyS7"; + flow_cntrl = <1>; + baud_rate = <3686400>; + }; + + btwilink { + compatible = "btwilink"; + }; +}; + +&dra7_pmx_core { + mmc3_pins_default: mmc3_pins_default { + pinctrl-single,pins = < + 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ + 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ + 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ + 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ + 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ + 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ + >; + }; + + mmc3_pins_hs: mmc3_pins_hs { + pinctrl-single,pins = < + 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ + 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ + 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ + 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ + 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ + 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ + >; + }; + + mmc3_pins_sdr12: mmc3_pins_sdr12 { + pinctrl-single,pins = < + 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ + 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ + 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ + 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ + 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ + 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ + >; + }; + + mmc3_pins_sdr25: mmc3_pins_sdr25 { + pinctrl-single,pins = < + 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ + 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ + 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ + 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ + 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ + 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ + >; + }; + + mmc3_pins_sdr50: mmc3_pins_sdr50 { + pinctrl-single,pins = < + 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ + 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ + 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ + 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ + 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ + 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ + >; + }; +}; + +&dra7_iodelay_core { + mmc3_iodelay_manual1_conf: mmc3_iodelay_manual1_conf { + pinctrl-single,pins = < + 0x678 (A_DELAY(406) | G_DELAY(0)) /* CFG_MMC3_CLK_IN */ + 0x680 (A_DELAY(659) | G_DELAY(0)) /* CFG_MMC3_CLK_OUT */ + 0x684 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_IN */ + 0x688 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OEN */ + 0x68c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OUT */ + 0x690 (A_DELAY(130) | G_DELAY(0)) /* CFG_MMC3_DAT0_IN */ + 0x694 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OEN */ + 0x698 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OUT */ + 0x69c (A_DELAY(169) | G_DELAY(0)) /* CFG_MMC3_DAT1_IN */ + 0x6a0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OEN */ + 0x6a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OUT */ + 0x6a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_IN */ + 0x6ac (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OEN */ + 0x6b0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OUT */ + 0x6b4 (A_DELAY(457) | G_DELAY(0)) /* CFG_MMC3_DAT3_IN */ + 0x6b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OEN */ + 0x6bc (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OUT */ + >; + }; +}; + +&i2c5 { + status = "okay"; + clock-frequency = <400000>; + + mt9t11x@3C { + compatible = "aptina,mt9t111"; + reg = <0x3C>; + + reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; + oscen-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>; + powerdown-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; + bufen-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; + camen-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; + + port { + cam: endpoint { + remote-endpoint = <&vin3a>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <0>; + input-clock-freq = <32000000>; + pixel-clock-freq = <96000000>; + }; + }; + }; + + pixcir_ts@5c { + compatible = "pixcir,pixcir_tangoc"; + reg = <0x5c>; + interrupt-parent = <&gpio2>; + interrupts = <4 0>; + + attb-gpio = <&gpio2 4 GPIO_ACTIVE_HIGH>; + reset-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>; + + touchscreen-size-x = <1024>; + touchscreen-size-y = <600>; + }; +}; + +&dss { + ports { + #address-cells = <1>; + #size-cells = <0>; + + port { + reg = <0>; + + dpi_out: endpoint { + remote-endpoint = <&lcd_in>; + data-lines = <24>; + }; + }; + }; +}; + +&vip2 { + status = "okay"; +}; + +&vin3a { + status = "okay"; + endpoint { + slave-mode; + remote-endpoint = <&cam>; + }; +}; + +&epwmss1 { + status = "okay"; + + ehrpwm1: ehrpwm@48440200 { + status = "okay"; + }; +}; + +&uart8 { + status = "okay"; +}; + +&mmc3 { + status = "okay"; + vmmc-supply = <&vmmcwl_fixed>; + bus-width = <4>; + pinctrl-names = "default"; + cap-power-off-card; + keep-power-in-suspend; + ti,non-removable; + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50"; + pinctrl-0 = <&mmc3_pins_default &mmc3_iodelay_manual1_conf>; + pinctrl-1 = <&mmc3_pins_hs &mmc3_iodelay_manual1_conf>; + pinctrl-2 = <&mmc3_pins_sdr12 &mmc3_iodelay_manual1_conf>; + pinctrl-3 = <&mmc3_pins_sdr25 &mmc3_iodelay_manual1_conf>; + pinctrl-4 = <&mmc3_pins_sdr50 &mmc3_iodelay_manual1_conf>; + + #address-cells = <1>; + #size-cells = <0>; + wlcore: wlcore@0 { + compatible = "ti,wl1835"; + reg = <2>; + interrupt-parent = <&gpio5>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&pcie1 { + pcie-reset-gpio = <&gpio2 8 GPIO_ACTIVE_LOW>; +}; diff --git a/src/arm/am57xx-evm-es2plus.dts b/src/arm/am57xx-evm-es2plus.dts new file mode 100644 index 0000000..92286f4 --- /dev/null +++ b/src/arm/am57xx-evm-es2plus.dts @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include "am57xx-beagle-x15-es2plus.dts" +#include "am57xx-evm-common.dtsi" +/ { + model = "TI AM572x EVM ES2+"; +}; diff --git a/src/arm/am57xx-evm.dts b/src/arm/am57xx-evm.dts index 014ba85..40e0ea1 100644 --- a/src/arm/am57xx-evm.dts +++ b/src/arm/am57xx-evm.dts @@ -1,5 +1,5 @@ /* - * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -7,309 +7,4 @@ */ #include "am57xx-beagle-x15.dts" -#include -#include - -/ { - model = "TI AM572x EVM"; - compatible = "ti,am572x-evm", "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7"; - - aliases { - display0 = &lcd0; - display1 = &hdmi0; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - autorepeat; - - USER1 { - label = "Up"; - linux,code = ; - gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; - }; - - USER2 { - label = "Down"; - linux,code = ; - gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; - }; - - USER3 { - label = "Left"; - linux,code = ; - gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; - }; - - USER4 { - label = "Right"; - linux,code = ; - gpios = <&gpio2 24 GPIO_ACTIVE_LOW>; - }; - - USER5 { - label = "Home"; - linux,code = ; - gpios = <&gpio2 20 GPIO_ACTIVE_LOW>; - }; - }; - - lcd0: display { - compatible = "osddisplays,osd070t1718-19ts", "panel-dpi"; - - label = "lcd"; - - enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; - - panel-timing { - clock-frequency = <33000000>; - hactive = <800>; - vactive = <480>; - hfront-porch = <210>; - hback-porch = <16>; - hsync-len = <30>; - vback-porch = <10>; - vfront-porch = <22>; - vsync-len = <13>; - hsync-active = <0>; - vsync-active = <0>; - de-active = <1>; - pixelclk-active = <1>; - }; - - port { - lcd_in: endpoint { - remote-endpoint = <&dpi_out>; - }; - }; - }; - - backlight { - compatible = "pwm-backlight"; - pwms = <&ehrpwm1 0 50000 0>; - - /* Anything lower than 241 is no longer visible */ - brightness-levels = <0 243 245 247 249 251 252 253 255>; - - default-brightness-level = <8>; - }; - - vmmcwl_fixed: fixedregulator-mmcwl { - compatible = "regulator-fixed"; - regulator-name = "vmmcwl_fixed"; - /* - the gpio used for wlan_enable goes through a level shifter - on the platform. the settings for 1.8v below is needed by - the regulator driver, but is more of a comment since it - doesn't really control the voltage of the gpio - */ - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - gpio = <&gpio5 8 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - - kim { - compatible = "kim"; - nshutdown_gpio = <132>; - dev_name = "/dev/ttyS7"; - flow_cntrl = <1>; - baud_rate = <3686400>; - }; - - btwilink { - compatible = "btwilink"; - }; -}; - -&dra7_pmx_core { - mmc3_pins_default: mmc3_pins_default { - pinctrl-single,pins = < - 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ - 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ - 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ - 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ - 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ - 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ - >; - }; - - mmc3_pins_hs: mmc3_pins_hs { - pinctrl-single,pins = < - 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ - 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ - 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ - 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ - 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ - 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ - >; - }; - - mmc3_pins_sdr12: mmc3_pins_sdr12 { - pinctrl-single,pins = < - 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ - 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ - 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ - 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ - 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ - 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ - >; - }; - - mmc3_pins_sdr25: mmc3_pins_sdr25 { - pinctrl-single,pins = < - 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ - 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ - 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ - 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ - 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ - 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ - >; - }; - - mmc3_pins_sdr50: mmc3_pins_sdr50 { - pinctrl-single,pins = < - 0x37c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_clk.mmc3_clk */ - 0x380 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_cmd.mmc3_cmd */ - 0x384 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat0.mmc3_dat0 */ - 0x388 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat1.mmc3_dat1 */ - 0x38c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat2.mmc3_dat2 */ - 0x390 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc3_dat3.mmc3_dat3 */ - >; - }; -}; - -&dra7_iodelay_core { - mmc3_iodelay_manual1_conf: mmc3_iodelay_manual1_conf { - pinctrl-single,pins = < - 0x678 (A_DELAY(406) | G_DELAY(0)) /* CFG_MMC3_CLK_IN */ - 0x680 (A_DELAY(659) | G_DELAY(0)) /* CFG_MMC3_CLK_OUT */ - 0x684 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_IN */ - 0x688 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OEN */ - 0x68c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OUT */ - 0x690 (A_DELAY(130) | G_DELAY(0)) /* CFG_MMC3_DAT0_IN */ - 0x694 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OEN */ - 0x698 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OUT */ - 0x69c (A_DELAY(169) | G_DELAY(0)) /* CFG_MMC3_DAT1_IN */ - 0x6a0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OEN */ - 0x6a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OUT */ - 0x6a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_IN */ - 0x6ac (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OEN */ - 0x6b0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OUT */ - 0x6b4 (A_DELAY(457) | G_DELAY(0)) /* CFG_MMC3_DAT3_IN */ - 0x6b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OEN */ - 0x6bc (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OUT */ - >; - }; -}; - -&i2c5 { - status = "okay"; - clock-frequency = <400000>; - - mt9t11x@3C { - compatible = "aptina,mt9t111"; - reg = <0x3C>; - - reset-gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; - oscen-gpios = <&gpio5 10 GPIO_ACTIVE_HIGH>; - powerdown-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; - bufen-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; - camen-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; - - port { - cam: endpoint { - remote-endpoint = <&vin3a>; - hsync-active = <1>; - vsync-active = <1>; - pclk-sample = <0>; - input-clock-freq = <32000000>; - pixel-clock-freq = <96000000>; - }; - }; - }; - - pixcir_ts@5c { - compatible = "pixcir,pixcir_tangoc"; - reg = <0x5c>; - interrupt-parent = <&gpio2>; - interrupts = <4 0>; - - attb-gpio = <&gpio2 4 GPIO_ACTIVE_HIGH>; - reset-gpio = <&gpio2 6 GPIO_ACTIVE_HIGH>; - - touchscreen-size-x = <1024>; - touchscreen-size-y = <600>; - }; -}; - -&dss { - ports { - #address-cells = <1>; - #size-cells = <0>; - - port { - reg = <0>; - - dpi_out: endpoint { - remote-endpoint = <&lcd_in>; - data-lines = <24>; - }; - }; - }; -}; - -&vip2 { - status = "okay"; -}; - -&vin3a { - status = "okay"; - endpoint { - slave-mode; - remote-endpoint = <&cam>; - }; -}; - -&epwmss1 { - status = "okay"; - - ehrpwm1: ehrpwm@48440200 { - status = "okay"; - }; -}; - -&uart8 { - status = "okay"; -}; - -&mmc3 { - status = "okay"; - vmmc-supply = <&vmmcwl_fixed>; - bus-width = <4>; - pinctrl-names = "default"; - cap-power-off-card; - keep-power-in-suspend; - ti,non-removable; - pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50"; - pinctrl-0 = <&mmc3_pins_default &mmc3_iodelay_manual1_conf>; - pinctrl-1 = <&mmc3_pins_hs &mmc3_iodelay_manual1_conf>; - pinctrl-2 = <&mmc3_pins_sdr12 &mmc3_iodelay_manual1_conf>; - pinctrl-3 = <&mmc3_pins_sdr25 &mmc3_iodelay_manual1_conf>; - pinctrl-4 = <&mmc3_pins_sdr50 &mmc3_iodelay_manual1_conf>; - - #address-cells = <1>; - #size-cells = <0>; - wlcore: wlcore@0 { - compatible = "ti,wl1835"; - reg = <2>; - interrupt-parent = <&gpio5>; - interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - -&pcie1 { - pcie-reset-gpio = <&gpio2 8 GPIO_ACTIVE_LOW>; -}; +#include "am57xx-evm-common.dtsi" diff --git a/src/arm/dra7-evm.dts b/src/arm/dra7-evm.dts index d8c19ce..d7294b3 100644 --- a/src/arm/dra7-evm.dts +++ b/src/arm/dra7-evm.dts @@ -385,17 +385,6 @@ >; }; - mmc1_pins_ddr50: pinmux_mmc1_ddr50_pins { - pinctrl-single,pins = < - 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */ - 0x358 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_cmd.cmd */ - 0x35c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat0.dat0 */ - 0x360 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat1.dat1 */ - 0x364 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat2.dat2 */ - 0x368 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_dat3.dat3 */ - >; - }; - mmc1_pins_sdr104: pinmux_mmc1_sdr104_pins { pinctrl-single,pins = < 0x354 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE0) /* mmc1_clk.clk */ @@ -452,6 +441,21 @@ >; }; + mmc2_pins_hs200_1_8v: mmc2_pins_hs200_1_8v { + pinctrl-single,pins = < + 0x9c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a23.mmc2_clk */ + 0xb0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */ + 0xa0 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */ + 0xa4 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */ + 0xa8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */ + 0xac (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */ + 0x8c (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */ + 0x90 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */ + 0x94 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */ + 0x98 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */ + >; + }; + mmc4_pins_default: mmc4_pins_default { pinctrl-single,pins = < 0x3e8 (PIN_INPUT_PULLUP | MANUAL_MODE | MUX_MODE3) /* uart1_ctsn.mmc4_clk */ @@ -498,7 +502,7 @@ }; &dra7_iodelay_core { - mmc1_iodelay_ddr50_conf: mmc1_iodelay_ddr50_conf { + mmc1_iodelay_ddr50_rev11_conf: mmc1_iodelay_ddr50_rev11_conf { pinctrl-single,pins = < 0x618 (A_DELAY(572) | G_DELAY(540)) /* CFG_MMC1_CLK_IN */ 0x624 (A_DELAY(0) | G_DELAY(600)) /* CFG_MMC1_CMD_IN */ @@ -520,7 +524,29 @@ >; }; - mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf { + mmc1_iodelay_ddr50_rev20_conf: mmc1_iodelay_ddr50_rev20_conf { + pinctrl-single,pins = < + 0x618 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */ + 0x620 (A_DELAY(1271) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */ + 0x624 (A_DELAY(229) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */ + 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ + 0x62C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ + 0x630 (A_DELAY(850) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */ + 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ + 0x638 (A_DELAY(20) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ + 0x63C (A_DELAY(468) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */ + 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ + 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ + 0x648 (A_DELAY(466) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */ + 0x64C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ + 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ + 0x654 (A_DELAY(399) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */ + 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ + 0x65C (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ + >; + }; + + mmc1_iodelay_sdr104_rev11_conf: mmc1_iodelay_sdr104_rev11_conf { pinctrl-single,pins = < 0x620 (A_DELAY(1063) | G_DELAY(17)) /* CFG_MMC1_CLK_OUT */ 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ @@ -536,7 +562,71 @@ >; }; - mmc2_iodelay_ddr_1_8v_conf: mmc2_iodelay_ddr_1_8v_conf { + mmc1_iodelay_sdr104_rev20_conf: mmc1_iodelay_sdr104_rev20_conf { + pinctrl-single,pins = < + 0x620 (A_DELAY(600) | G_DELAY(400)) /* CFG_MMC1_CLK_OUT */ + 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */ + 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */ + 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */ + 0x638 (A_DELAY(30) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */ + 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */ + 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */ + 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */ + 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */ + 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */ + 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */ + >; + }; + + mmc2_iodelay_hs200_1_8v_rev11_conf: mmc2_iodelay_hs200_1_8v_rev11_conf { + pinctrl-single,pins = < + 0x190 (A_DELAY(621) | G_DELAY(600)) /* CFG_GPMC_A19_OEN */ + 0x194 (A_DELAY(300) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ + 0x1a8 (A_DELAY(739) | G_DELAY(600)) /* CFG_GPMC_A20_OEN */ + 0x1ac (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ + 0x1b4 (A_DELAY(812) | G_DELAY(600)) /* CFG_GPMC_A21_OEN */ + 0x1b8 (A_DELAY(240) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ + 0x1c0 (A_DELAY(954) | G_DELAY(600)) /* CFG_GPMC_A22_OEN */ + 0x1c4 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ + 0x1d0 (A_DELAY(1340)| G_DELAY(420)) /* CFG_GPMC_A23_OUT */ + 0x1d8 (A_DELAY(935) | G_DELAY(600)) /* CFG_GPMC_A24_OEN */ + 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ + 0x1e4 (A_DELAY(525) | G_DELAY(600)) /* CFG_GPMC_A25_OEN */ + 0x1e8 (A_DELAY(120) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ + 0x1f0 (A_DELAY(767) | G_DELAY(600)) /* CFG_GPMC_A26_OEN */ + 0x1f4 (A_DELAY(225) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ + 0x1fc (A_DELAY(565) | G_DELAY(600)) /* CFG_GPMC_A27_OEN */ + 0x200 (A_DELAY(60) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ + 0x364 (A_DELAY(969) | G_DELAY(600)) /* CFG_GPMC_CS1_OEN */ + 0x368 (A_DELAY(180) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ + >; + }; + + mmc2_iodelay_hs200_1_8v_rev20_conf: mmc2_iodelay_hs200_1_8v_rev20_conf { + pinctrl-single,pins = < + 0x190 (A_DELAY(274) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ + 0x194 (A_DELAY(162) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ + 0x1a8 (A_DELAY(401) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ + 0x1ac (A_DELAY(73) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ + 0x1b4 (A_DELAY(465) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ + 0x1b8 (A_DELAY(115) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ + 0x1c0 (A_DELAY(633) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ + 0x1c4 (A_DELAY(47) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ + 0x1d0 (A_DELAY(935) | G_DELAY(280)) /* CFG_GPMC_A23_OUT */ + 0x1d8 (A_DELAY(621) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ + 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ + 0x1e4 (A_DELAY(183) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ + 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ + 0x1f0 (A_DELAY(467) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ + 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ + 0x1fc (A_DELAY(262) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ + 0x200 (A_DELAY(46) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ + 0x364 (A_DELAY(684) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ + 0x368 (A_DELAY(76) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ + >; + }; + + mmc2_iodelay_ddr_1_8v_rev11_conf: mmc2_iodelay_ddr_1_8v_rev11_conf { pinctrl-single,pins = < 0x18c (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_IN */ 0x1a4 (A_DELAY(274) | G_DELAY(240)) /* CFG_GPMC_A20_IN */ @@ -570,6 +660,40 @@ >; }; + mmc2_iodelay_ddr_1_8v_rev20_conf: mmc2_iodelay_ddr_1_8v_rev20_conf { + pinctrl-single,pins = < + 0x18c (A_DELAY(270) | G_DELAY(0)) /* CFG_GPMC_A19_IN */ + 0x1a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_IN */ + 0x1b0 (A_DELAY(170) | G_DELAY(0)) /* CFG_GPMC_A21_IN */ + 0x1bc (A_DELAY(758) | G_DELAY(0)) /* CFG_GPMC_A22_IN */ + 0x1c8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_IN */ + 0x1d4 (A_DELAY(81) | G_DELAY(0)) /* CFG_GPMC_A24_IN */ + 0x1e0 (A_DELAY(286) | G_DELAY(0)) /* CFG_GPMC_A25_IN */ + 0x1ec (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_IN */ + 0x1f8 (A_DELAY(123) | G_DELAY(0)) /* CFG_GPMC_A27_IN */ + 0x360 (A_DELAY(346) | G_DELAY(0)) /* CFG_GPMC_CS1_IN */ + 0x190 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */ + 0x194 (A_DELAY(55) | G_DELAY(0)) /* CFG_GPMC_A19_OUT */ + 0x1a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */ + 0x1ac (A_DELAY(422) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */ + 0x1b4 (A_DELAY(642) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */ + 0x1b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */ + 0x1c0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */ + 0x1c4 (A_DELAY(128) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */ + 0x1d0 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A23_OUT */ + 0x1d8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */ + 0x1dc (A_DELAY(395) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */ + 0x1e4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */ + 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */ + 0x1f0 (A_DELAY(623) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */ + 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */ + 0x1fc (A_DELAY(54) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */ + 0x200 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */ + 0x364 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */ + 0x368 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */ + >; + }; + mmc4_iodelay_ds_manual1_conf: mmc4_iodelay_ds_manual1_conf { pinctrl-single,pins = < 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */ @@ -876,27 +1000,31 @@ * is always hardwired. */ cd-gpios = <&gpio6 27 0>; - max-frequency = <96000000>; - pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; + max-frequency = <192000000>; + pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104"; pinctrl-0 = <&mmc1_pins_default>; pinctrl-1 = <&mmc1_pins_hs>; pinctrl-2 = <&mmc1_pins_sdr12>; pinctrl-3 = <&mmc1_pins_sdr25>; pinctrl-4 = <&mmc1_pins_sdr50>; - pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_conf>; - pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_conf>; + pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev11_conf>; + pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>; + pinctrl-7 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr50_rev20_conf>; + pinctrl-8 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; }; &mmc2 { status = "okay"; vmmc-supply = <&evm_3v3_sw>; bus-width = <8>; - max-frequency = <96000000>; - /delete-property/ mmc-hs200-1_8v; - pinctrl-names = "default", "hs", "ddr_1_8v"; + max-frequency = <192000000>; + pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; pinctrl-0 = <&mmc2_pins_default>; pinctrl-1 = <&mmc2_pins_hs>; - pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_conf>; + pinctrl-2 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev11_conf>; + pinctrl-3 = <&mmc2_pins_ddr_1_8v &mmc2_iodelay_ddr_1_8v_rev20_conf>; + pinctrl-4 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev11_conf>; + pinctrl-5 = <&mmc2_pins_hs200_1_8v &mmc2_iodelay_hs200_1_8v_rev20_conf>; }; &mmc4 { From 27b496e93853a210fb79bc95681c54e69f20d494 Mon Sep 17 00:00:00 2001 From: Robert Nelson Date: Mon, 8 Feb 2016 18:56:14 -0600 Subject: [PATCH 18/18] am33xx.dtsi: pwm alias Signed-off-by: Robert Nelson --- src/arm/am33xx.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/arm/am33xx.dtsi b/src/arm/am33xx.dtsi index a2cb7a1..0ab72cb 100644 --- a/src/arm/am33xx.dtsi +++ b/src/arm/am33xx.dtsi @@ -35,6 +35,12 @@ phy1 = &usb1_phy; ethernet0 = &cpsw_emac0; ethernet1 = &cpsw_emac1; + pwm0 = &ecap0; + pwm1 = &ehrpwm0; + pwm2 = &ecap1; + pwm3 = &ehrpwm1; + pwm4 = &ecap2; + pwm5 = &ehrpwm2; }; cpus {