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Ramps2Due.net
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# EESchema Netlist Version 1.1 created Fri 01 Mar 2013 07:09:20 PM EST
(
( /51313A3D $noname J1 HEADER_2X2 {Lib=HEADER_2X2}
( 1 +5V )
( 2 +5V )
( 3 /D22 )
( 4 /D23 )
)
( /51313A27 $noname J10 HEADER_2X2 {Lib=HEADER_2X2}
( 1 +3.3V )
( 2 +3.3V )
( 3 /D22 )
( 4 /D23 )
)
( /513139D1 $noname J6 HEADER_16X2 {Lib=HEADER_16X2}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
( 9 ? )
( 10 ? )
( 11 ? )
( 12 ? )
( 13 ? )
( 14 ? )
( 15 ? )
( 16 ? )
( 17 ? )
( 18 ? )
( 19 ? )
( 20 ? )
( 21 ? )
( 22 ? )
( 23 ? )
( 24 ? )
( 25 ? )
( 26 ? )
( 27 ? )
( 28 ? )
( 29 CS )
( 30 CD )
( 31 GND )
( 32 GND )
)
( /51312A9D $noname J16 HEADER_2 {Lib=HEADER_2}
( 1 +5V )
( 2 +5V )
)
( /512FD565 OSHW_logo_2 M1 LOGO_OSHW {Lib=LOGO_OSHW}
)
( /512F9A4B $noname J15 HEADER_7 {Lib=HEADER_7}
( 1 CD )
( 2 MISO )
( 3 GND )
( 4 SCK )
( 5 +3.3V )
( 6 MOSI )
( 7 CS )
)
( /512E9DAF $noname R3 1k {Lib=R}
( 1 N-000014 )
( 2 FET3 )
)
( /512E9DA7 $noname R1 1k {Lib=R}
( 1 N-000032 )
( 2 FET1 )
)
( /512E9D85 $noname R2 1k {Lib=R}
( 1 N-000016 )
( 2 FET2 )
)
( /512E9D71 SOT26 U4 ZXGD3005E6 {Lib=ZXGD3005E6}
( 1 V_IN )
( 2 N-000014 )
( 3 GND )
( 4 RAMPS_FET3 )
( 5 ? )
( 6 RAMPS_FET3 )
)
( /512E9D6C SOT26 U3 ZXGD3005E6 {Lib=ZXGD3005E6}
( 1 V_IN )
( 2 N-000016 )
( 3 GND )
( 4 RAMPS_FET2 )
( 5 ? )
( 6 RAMPS_FET2 )
)
( /512E9D60 SOT26 U2 ZXGD3005E6 {Lib=ZXGD3005E6}
( 1 V_IN )
( 2 N-000032 )
( 3 GND )
( 4 RAMPS_FET1 )
( 5 ? )
( 6 RAMPS_FET1 )
)
( /512E9C8C $noname C2 100n {Lib=C}
( 1 +5V )
( 2 GND )
)
( /512E9C84 $noname C1 100n {Lib=C}
( 1 +3.3V )
( 2 GND )
)
( /512E9B0F $noname U1 TXS0108 {Lib=TXS0108}
( 1 X-MIN )
( 2 +3.3V )
( 3 X-MAX )
( 4 UART_TX )
( 5 UART_RX )
( 6 Y-MIN )
( 7 Y-MAX )
( 8 Z-MIN )
( 9 Z-MAX )
( 10 +3.3V )
( 11 GND )
( 12 RAMPS_Z-MAX )
( 13 RAMPS_Z-MIN )
( 14 RAMPS_Y-MAX )
( 15 RAMPS_Y-MIN )
( 16 RAMPS_UART_RX )
( 17 RAMPS_UART_TX )
( 18 RAMPS_X-MAX )
( 19 +5V )
( 20 RAMPS_X-MIN )
)
( /512E96E7 $noname J14 HEADER_8 {Lib=HEADER_8}
( 1 RAMPS_Y-MIN )
( 2 RAMPS_Y-MAX )
( 3 D16 )
( 4 D17 )
( 5 RAMPS_Z-MIN )
( 6 RAMPS_Z-MAX )
( 7 SDA )
( 8 SCL )
)
( /512E96DA $noname J13 HEADER_8 {Lib=HEADER_8}
( 1 /D7 )
( 2 SER2 )
( 3 SER3 )
( 4 SER4 )
( 5 RAMPS_X-MIN )
( 6 RAMPS_X-MAX )
( 7 RAMPS_UART_TX )
( 8 RAMPS_UART_RX )
)
( /512E96D6 $noname J12 HEADER_10 {Lib=HEADER_10}
( 1 /SCL1 )
( 2 /SDA1 )
( 3 /AREF )
( 4 GND )
( 5 /LED )
( 6 /PS-ON )
( 7 SER1 )
( 8 RAMPS_FET1 )
( 9 RAMPS_FET2 )
( 10 RAMPS_FET3 )
)
( /512E96CD $noname J11 HEADER_8 {Lib=HEADER_8}
( 1 /RFU1 )
( 2 /IOREF )
( 3 /RESET )
( 4 +3.3V )
( 5 +3.3V )
( 6 GND )
( 7 GND )
( 8 V_IN )
)
( /512E94FF $noname J2 HEADER_3X2 {Lib=HEADER_3X2}
( 1 MISO )
( 2 +5V )
( 3 SCK )
( 4 MOSI )
( 5 ? )
( 6 GND )
)
( /512E91A6 $noname J7 HEADER_10 {Lib=HEADER_10}
( 1 /SCL1 )
( 2 /SDA1 )
( 3 /AREF )
( 4 GND )
( 5 /LED )
( 6 /PS-ON )
( 7 SER1 )
( 8 FET1 )
( 9 FET2 )
( 10 FET3 )
)
( /512E9195 $noname J9 HEADER_8 {Lib=HEADER_8}
( 1 Y-MIN )
( 2 Y-MAX )
( 3 D16 )
( 4 D17 )
( 5 Z-MIN )
( 6 Z-MAX )
( 7 SDA )
( 8 SCL )
)
( /512E9184 $noname J8 HEADER_8 {Lib=HEADER_8}
( 1 /D7 )
( 2 SER2 )
( 3 SER3 )
( 4 SER4 )
( 5 X-MIN )
( 6 X-MAX )
( 7 UART_TX )
( 8 UART_RX )
)
( /512E917A $noname J3 HEADER_8 {Lib=HEADER_8}
( 1 /RFU1 )
( 2 /IOREF )
( 3 /RESET )
( 4 +3.3V )
( 5 +5V )
( 6 GND )
( 7 GND )
( 8 V_IN )
)
( /512E8F1A $noname J5 HEADER_8 {Lib=HEADER_8}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
)
( /512E8F11 $noname J4 HEADER_8 {Lib=HEADER_8}
( 1 ? )
( 2 ? )
( 3 ? )
( 4 ? )
( 5 ? )
( 6 ? )
( 7 ? )
( 8 ? )
)
)
*
{ Allowed footprints by component:
$component M1
OSHW_logo_2
$endlist
$component R3
R?
SM0603
SM0805
R?-*
$endlist
$component R1
R?
SM0603
SM0805
R?-*
$endlist
$component R2
R?
SM0603
SM0805
R?-*
$endlist
$component C2
SM*
C?
C1-1
$endlist
$component C1
SM*
C?
C1-1
$endlist
$endfootprintlist
}
{ Pin List by Nets
Net 1 "GND" "GND"
J12 4
J2 6
C2 2
C1 2
U2 3
U3 3
J7 4
J3 6
J3 7
U4 3
J11 6
J11 7
J15 3
J6 31
J6 32
U1 11
Net 2 "+5V" "+5V"
J1 1
J3 5
J1 2
C2 1
J2 2
J16 1
J16 2
U1 19
Net 3 "X-MIN" "X-MIN"
J8 5
U1 1
Net 4 "RAMPS_Y-MIN" "RAMPS_Y-MIN"
U1 15
J14 1
Net 5 "RAMPS_Y-MAX" "RAMPS_Y-MAX"
U1 14
J14 2
Net 6 "D16" "D16"
J9 3
J14 3
Net 7 "D17" "D17"
J9 4
J14 4
Net 8 "RAMPS_Z-MIN" "RAMPS_Z-MIN"
J14 5
U1 13
Net 9 "RAMPS_Z-MAX" "RAMPS_Z-MAX"
U1 12
J14 6
Net 10 "SDA" "SDA"
J14 7
J9 7
Net 11 "SCL" "SCL"
J9 8
J14 8
Net 12 "/D7" "D7"
J13 1
J8 1
Net 13 "X-MAX" "X-MAX"
U1 3
J8 6
Net 14 "" ""
U4 2
R3 1
Net 16 "" ""
U3 2
R2 1
Net 22 "FET3" "FET3"
R3 2
J7 10
Net 23 "FET2" "FET2"
R2 2
J7 9
Net 24 "FET1" "FET1"
R1 2
J7 8
Net 25 "UART_RX" "UART_RX"
U1 5
J8 8
Net 26 "UART_TX" "UART_TX"
U1 4
J8 7
Net 27 "Z-MAX" "Z-MAX"
J9 6
U1 9
Net 28 "Z-MIN" "Z-MIN"
J9 5
U1 8
Net 29 "Y-MAX" "Y-MAX"
U1 7
J9 2
Net 30 "Y-MIN" "Y-MIN"
U1 6
J9 1
Net 32 "" ""
U2 2
R1 1
Net 34 "SER2" "SER2"
J8 2
J13 2
Net 51 "/RESET" "RESET"
J3 3
J11 3
Net 52 "/IOREF" "IOREF"
J11 2
J3 2
Net 53 "MISO" "MISO"
J2 1
J15 2
Net 54 "/AREF" "AREF"
J7 3
J12 3
Net 55 "SER3" "SER3"
J8 3
J13 3
Net 56 "SER4" "SER4"
J8 4
J13 4
Net 57 "RAMPS_X-MIN" "RAMPS_X-MIN"
J13 5
U1 20
Net 58 "RAMPS_X-MAX" "RAMPS_X-MAX"
U1 18
J13 6
Net 59 "RAMPS_UART_TX" "RAMPS_UART_TX"
U1 17
J13 7
Net 60 "RAMPS_UART_RX" "RAMPS_UART_RX"
U1 16
J13 8
Net 61 "/SCL1" "SCL1"
J7 1
J12 1
Net 62 "/SDA1" "SDA1"
J12 2
J7 2
Net 63 "/LED" "LED"
J7 5
J12 5
Net 64 "/PS-ON" "PS-ON"
J7 6
J12 6
Net 65 "SER1" "SER1"
J12 7
J7 7
Net 66 "RAMPS_FET1" "RAMPS_FET1"
U2 4
J12 8
U2 6
Net 67 "RAMPS_FET2" "RAMPS_FET2"
J12 9
U3 4
U3 6
Net 68 "RAMPS_FET3" "RAMPS_FET3"
U4 4
U4 6
J12 10
Net 69 "/RFU1" "RFU1"
J11 1
J3 1
Net 70 "SCK" "SCK"
J15 4
J2 3
Net 71 "MOSI" "MOSI"
J15 6
J2 4
Net 74 "/D22" "D22"
J10 3
J1 3
Net 75 "CD" "CD"
J6 30
J15 1
Net 84 "V_IN" "V_IN"
U2 1
U3 1
J3 8
U4 1
J11 8
Net 99 "CS" "CS"
J6 29
J15 7
Net 100 "+3.3V" "+3.3V"
J10 1
J10 2
C1 1
U1 10
J11 4
J11 5
J15 5
U1 2
J3 4
Net 101 "/D23" "D23"
J1 4
J10 4
}
#End