Did any internal register document of CH347 release?

[coflery]

I have test pass the JTAG function with the mainline newest openocd, and it's OK.
But will be halt when switch to SWD mode.
I have read the code, but not understand the detial useage of some hard code in source file, such as:

#define CH347_CMD_SWD_INIT  0xE5 /* SWD Interface Initialization Command */
#define CH347_CMD_SWD       0xE8
#define CH347_CMD_SWD_REG_W 0xA0 /* SWD Interface write reg */
#define CH347_CMD_SWD_SEQ_W 0xA1 /* SWD Interface write spec seq */
#define CH347_CMD_SWD_REG_R 0xA2 /* SWD Interface read  reg */
#define CH347_MAX_SEND_CMD  0X20 /* max send cmd number */
#define CH347_MAX_SEND_BUF  0X200
#define CH347_MAX_RECV_BUF  0X200

So, it's a great job if the regesiter doucment released.

I have a MinGW x64 windows version CI build, which is sync with openocd-org mainline in github, if anyone need.
coflery/openocd

[EasyDevKits]

Thanks @coflery I've seen your repo and found the read of the ch347 firmware version useful. I've added also code to let the ACT LED flashing if openocd is running. So there are more commands that are not documented. There is also a research project for ch347 interface documentation at github. But this tries to documents the SPI part: https://github.com/nic3-14159/CH347-Research

With which target chip did you get the JTAG part working? I'm trying to get it working with an ESP32 here: https://github.com/EasyDevKits/openocd-easydevkits

[coflery]

I only test capture with oscilloscope in jtag mode, and download to flash in SWD mode RT1052 and STM32F407

[coflery]

@EasyDevKits I have read the part https://github.com/nic3-14159/CH347-Research
I do the same work in fact, but most important thing I want to say is: the chip is reprogramble, so the protocal may be change in the future if WCH want. I can help you upgrade that firmware if you cannot make it woke in SWD mode, but I cannot share you the tool on github because the NDA.

[EasyDevKits]

@coflery Currently I've tested only the JTAG mode with an ESP32. Finally I get the JTAG mode work. Also for devices with more than one TAP like the ESP32 which has a dual core CPU.
I've made this pull request: #21 Without this change JTAG is not working for multiple TAP in one device.

Beside that I've made a little documentation public available. There I've written done what I've learned from public available source code: https://www.easydevkits.com/wch-ch347-jtag-interface/ There a no secrets revealed.

Currently I'm trying to get the CH347 driver included into the official OpenOCD package. I've made some pull request in the OpenOCD gerrit review system. Maybe the maintainers of OpenOCD will merge this.
https://review.openocd.org/7936 https://review.openocd.org/7938 and https://review.openocd.org/7937

I've seen also two different chip versions. One with USB BCDVersion 2.41 and one with 4.41. With the version 4.41 it's also possible to use the LARGER_PACK mode where you can bundle multiple commands into one lager packet. That's the part that I try to get working now. And after that I'll look into the SWD mode.

Good to know that it's possible to upgrade the firmware. If I need to upgrade the firmware, I'll come back to you. Thanks for the offer. But do you know if version 4.41 is the latest firmware? If you can't say that here in public, you can also write me in private: [email protected]