You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Hello, it's not an issue but a general question for an approach that I work on.
I would like to offload C++ stuff of a big C++ project into my (AIE) NPU with architecture XDNA from AMD Ryzen. I looked at 2 projects: Riallto and MLIR-AIE. But it seems the first one don't fit because:
=> Riallto uses a python package npu to generate the xclbin file and then to run on the NPU. I need to run the actual code using C++.
With MLIR-AIE, I saw on the programming examples that I can create C++ kernels, write some python code that defines how the data is moved and processed inside the CT, and then use C++ to actually launch the programm on the NPU. This is great for me. Even if I use python for the actual behaviour in the computile tiles, I can still generate the xclbin files of my C++ kernels and then, inside my C++ project, use the xclbin files like in all test.cpp files in the example folders.
My question is: do you think it's a (or the) good way? Do you think of other ways to achieve that? What could go wrong, etc..? Can we maybe remove the python part and use only XRT purely? The actual problem I see is that v++ (that generates the xclbin file) needs a target hardware platform: and i don't find it, even with xrt-smi examine. Seems it requires an actual FPGA and not an NPU.
Additionnally, my kernels can be not only 1 simple function. Can I define for example 2 functions inside 1 C++ kernel (maybe it's a stupid question)? If not, then is their a solution to that?
For example:
void test(int32_t *a_in, int32_t *c_out,
int32_t *factor, int32_t N) {
for (int i = 0; i < N; i++) {
c[i] = *factor * a[i];
// other stuff with other functions
}
}
// other functions declared... in the same
and finally, can we use AIE-API (C++ vector library) when creating the kernels? In the sense, is it an enhancement in the perfomances?
thanks!
The text was updated successfully, but these errors were encountered:
Hello, it's not an issue but a general question for an approach that I work on.
I would like to offload C++ stuff of a big C++ project into my (AIE) NPU with architecture XDNA from AMD Ryzen. I looked at 2 projects: Riallto and MLIR-AIE. But it seems the first one don't fit because:
=> Riallto uses a python package npu to generate the xclbin file and then to run on the NPU. I need to run the actual code using C++.
With MLIR-AIE, I saw on the programming examples that I can create C++ kernels, write some python code that defines how the data is moved and processed inside the CT, and then use C++ to actually launch the programm on the NPU. This is great for me. Even if I use python for the actual behaviour in the computile tiles, I can still generate the xclbin files of my C++ kernels and then, inside my C++ project, use the xclbin files like in all
test.cpp
files in the example folders.My question is: do you think it's a (or the) good way? Do you think of other ways to achieve that? What could go wrong, etc..? Can we maybe remove the python part and use only XRT purely? The actual problem I see is that v++ (that generates the xclbin file) needs a target hardware platform: and i don't find it, even with
xrt-smi examine
. Seems it requires an actual FPGA and not an NPU.Additionnally, my kernels can be not only 1 simple function. Can I define for example 2 functions inside 1 C++ kernel (maybe it's a stupid question)? If not, then is their a solution to that?
For example:
thanks!
The text was updated successfully, but these errors were encountered: