SAMD21: cache.c enhancement

[dhalbert]

samd21/cache.c doesn't do anything, but it could actually fix the NVM cache settings to achieve consistent timing. Code from https://github.com/adafruit/circuitpython/blob/master/ports/atmel-samd/common-hal/neopixel_write/__init__.c:

Disable cache:

    // Make sure the NVM cache is consistently timed.
    NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val;

Enable:

    // Speed up! (But inconsistent timing.)
    NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val;