ddr3_test

A simple DDR3 SDRAM tester. Performs maximum bandwidth write-then-read tests using Joris van Rantwijk’s Pseudo Random Number Generator "xoshiro128++ 1.0". Also demonstrates how to hack additional clocks into the DDR3 IP core’s MMCM, including the 200MHz IODELAYCTRL reference clock.

Supported boards: Digilent Nexys Video and QMTECH Wukong.

Build Procedure

The following instructions apply to Windows 10, and require Xilinx Vivado and Vitis version 2020.1 or later to be installed.

To create the Vivado project, and build the FPGA bitstream:

Open a Windows command prompt, and change directory to the location of the repository files.
Run the settings64 batch file from the Xilinx Vivado installation - if required - to set up your path for the Xilinx command line tools. For example:
```
C:\> C:\Xilinx\Vivado\2020.1\settings64.bat
```
Run the xbuild batch file, specifying the design name (hdmi_tpg) and board name (nexys_video or qmtech_wukong) as arguments, to create the Vivado project in the xproj directory, and to build an FPGA bitstream. The number of parallel jobs to be used during compilation by Vivado may also be specified on the command line; this defaults to 1 if not specified. For example:
```
C:\> cd \work\tyto_project
C:\work\tyto_project> xbuild.bat ddr3_test nexys_video 8
```

After the build process has completed, the Vivado project may be opened in the Vivado IDE.

First, ensure that the FPGA board is correctly connected to the host PC as follows:

Digilent Nexys Video: Connect the PROG port to the host PC.
QMTECH Wukong: Connect J1 to a suitable JTAG programmer (e.g. Digilent JTAG-HS2).

To program the bitstream into the board, run the xprog batch file, specifying the design name and board name as arguments. For example:

C:\work\tyto_project> xprog.bat ddr3_test nexys_video

When the programming process has completed, the LEDs will start displaying the test status.

Test control and status indication depends on the board being used:

Digilent Nexys Video

SW4-0 sets the test size in bytes as a power of 2:
- 00100 = 4: 2^4 = 16 Bytes (minimum)
- 01000 = 8: 2^8 = 256 Bytes
- 11101 = 29: 2^29 = 512MBytes (maximum)
- OFF = 0, ON = 1
SW5 enables slow testing (once per second) when ON
SW6 is a run/stop control (ON = run)
SW7 switches between pass and error count display - see below
LED7 = heartbeat (toggles every time round the test)
LED6 = at least one error has occurred
LED5-0 = LS 6 bits of test pass count (SW7 = OFF) or total error count (SW7 = ON)

Note that changing the test size during a test can cause an error. Press the CPU_RESET button to restart the test.

QMTECH Wukong

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