From 6a17d68bafbe05c9edb91ab9fb81031fa716f6ba Mon Sep 17 00:00:00 2001 From: Lucas Steuernagel Date: Tue, 2 Jan 2024 16:45:41 -0300 Subject: [PATCH 1/3] Change encoding of callx instruction --- .../SBF/Disassembler/SBFDisassembler.cpp | 6 ++ llvm/lib/Target/SBF/SBF.td | 45 -------------- llvm/lib/Target/SBF/SBFInstrInfo.td | 25 +++++++- llvm/lib/Target/SBF/SBFSubtarget.cpp | 1 + llvm/lib/Target/SBF/SBFSubtarget.h | 4 ++ llvm/lib/Target/SBF/SBFTargetFeatures.td | 58 +++++++++++++++++++ llvm/test/CodeGen/SBF/callx.ll | 6 +- llvm/test/MC/SBF/sbf-jmp.s | 11 +++- 8 files changed, 104 insertions(+), 52 deletions(-) create mode 100644 llvm/lib/Target/SBF/SBFTargetFeatures.td diff --git a/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp b/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp index 0feacc69869567..55932f6a307974 100644 --- a/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp +++ b/llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp @@ -205,6 +205,12 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size, Op.setImm(Make_64(Hi, Op.getImm())); break; } + case SBF::JALX: { + if (STI.getFeatureBits()[SBF::FeatureCallxRegSrc]) { + Result = decodeInstruction(DecoderTableSBFv264, Instr, Insn, Address, + this, STI); + } + } } return Result; diff --git a/llvm/lib/Target/SBF/SBF.td b/llvm/lib/Target/SBF/SBF.td index 3dddd614e82cd1..23908cc9b171c9 100644 --- a/llvm/lib/Target/SBF/SBF.td +++ b/llvm/lib/Target/SBF/SBF.td @@ -13,51 +13,6 @@ include "SBFCallingConv.td" include "SBFInstrInfo.td" def SBFInstrInfo : InstrInfo; - -def DummyFeature : SubtargetFeature<"dummy", "isDummyMode", - "true", "unused feature">; - -def ALU32 : SubtargetFeature<"alu32", "HasAlu32", "true", - "Enable ALU32 instructions">; - -def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true", - "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections">; - -def FeatureSolana : SubtargetFeature<"solana", "IsSolana", "true", - "Enable Solana extensions">; - -def FeatureDynamicFrames : SubtargetFeature<"dynamic-frames", "HasDynamicFrames", "true", - "Enable dynamic frames">; - -def FeatureSdiv : SubtargetFeature<"sdiv", "HasSdiv", "true", - "Enable native SBF_SDIV support">; - -def FeatureRelocAbs64 : SubtargetFeature<"reloc-abs64", "UseRelocAbs64", "true", - "Fix 64bit data relocations">; - -def FeatureStaticSyscalls : SubtargetFeature<"static-syscalls", "HasStaticSyscalls", "true", - "Marker feature used for conditional compilation">; - -def FeatureDisableNeg : SubtargetFeature<"no-neg", "DisableNeg", "true", - "Disable the neg instruction">; - -def FeatureReverseSubImm : SubtargetFeature<"reverse-sub", "ReverseSubImm", "true", - "Reverse the operands in the 'sub reg, imm' instruction">; - -def FeatureDisableLddw : SubtargetFeature<"no-lddw", "NoLddw", "true", - "Disable the lddw instruction">; - -class Proc Features> - : Processor; - -def : Proc<"generic", []>; -def : Proc<"v1", []>; -def : Proc<"v2", []>; -def : Proc<"v3", []>; -def : Proc<"probe", []>; -def : Proc<"sbfv2", [FeatureSolana, FeatureDynamicFrames, FeatureSdiv, FeatureRelocAbs64, FeatureStaticSyscalls, - FeatureDisableNeg, FeatureReverseSubImm, FeatureDisableLddw]>; - //===----------------------------------------------------------------------===// // Assembly printer //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td index 3c363416a1884a..d7e4d155433ee7 100644 --- a/llvm/lib/Target/SBF/SBFInstrInfo.td +++ b/llvm/lib/Target/SBF/SBFInstrInfo.td @@ -11,6 +11,7 @@ //===----------------------------------------------------------------------===// include "SBFInstrFormats.td" +include "SBFTargetFeatures.td" // Instruction Operands and Patterns @@ -63,6 +64,8 @@ def SBFHasNeg : Predicate<"!Subtarget->getDisableNeg()">; def SBFNoNeg: Predicate<"Subtarget->getDisableNeg()">; def SBFRevSub : Predicate<"Subtarget->getReverseSubImm()">; def SBFNoRevSub : Predicate<"!Subtarget->getReverseSubImm()">; +def SBFCallxSrc : Predicate<"Subtarget->getCallXRegSrc()">, AssemblerPredicate<(all_of FeatureCallxRegSrc)>; +def NoSBFCallxSrc : Predicate<"!Subtarget->getCallXRegSrc()">; def brtarget : Operand { let PrintMethod = "printBrTargetOperand"; @@ -574,6 +577,18 @@ class CALLX let SBFClass = SBF_JMP; } +class CALLX_SRC_REG + : TYPE_ALU_JMP { + bits<4> BrDst; + + let Inst{51-48} = BrDst; + let SBFClass = SBF_JMP; +} + // Jump always let isBranch = 1, isTerminator = 1, hasDelaySlot=0, isBarrier = 1 in { def JMP : BRANCH; @@ -583,8 +598,11 @@ let isBranch = 1, isTerminator = 1, hasDelaySlot=0, isBarrier = 1 in { let isCall=1, hasDelaySlot=0, Uses = [R11], // Potentially clobbered registers Defs = [R0, R1, R2, R3, R4, R5] in { - def JAL : CALL<"call">; - def JALX : CALLX<"callx">; + def JAL : CALL<"call">; + def JALX : CALLX<"callx">, Requires<[NoSBFCallxSrc]>; + let DecoderNamespace = "SBFv2" in { + def JALX_v2 : CALLX_SRC_REG<"callx">, Requires<[SBFCallxSrc]>; + } } class NOP_I @@ -678,7 +696,8 @@ def : Pat<(i64 (and (i64 GPR:$src), 0xffffFFFF)), def : Pat<(SBFcall tglobaladdr:$dst), (JAL tglobaladdr:$dst)>; def : Pat<(SBFcall texternalsym:$dst), (JAL texternalsym:$dst)>; def : Pat<(SBFcall imm:$dst), (JAL imm:$dst)>; -def : Pat<(SBFcall GPR:$dst), (JALX GPR:$dst)>; +def : Pat<(SBFcall GPR:$dst), (JALX GPR:$dst)>, Requires<[NoSBFCallxSrc]>; +def : Pat<(SBFcall GPR:$dst), (JALX_v2 GPR:$dst)>, Requires<[SBFCallxSrc]>; // Loads let Predicates = [SBFNoALU32] in { diff --git a/llvm/lib/Target/SBF/SBFSubtarget.cpp b/llvm/lib/Target/SBF/SBFSubtarget.cpp index deb57c2d539ae7..6a8e62530e677a 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.cpp +++ b/llvm/lib/Target/SBF/SBFSubtarget.cpp @@ -42,6 +42,7 @@ void SBFSubtarget::initializeEnvironment(const Triple &TT) { HasDynamicFrames = false; HasSdiv = false; UseDwarfRIS = false; + CallxRegSrc = false; IsSBFv2 = false; } diff --git a/llvm/lib/Target/SBF/SBFSubtarget.h b/llvm/lib/Target/SBF/SBFSubtarget.h index f979e4a9ca064f..bdc2e49b94d87b 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.h +++ b/llvm/lib/Target/SBF/SBFSubtarget.h @@ -85,6 +85,9 @@ class SBFSubtarget : public SBFGenSubtargetInfo { // wether we should use the LDDW instruction bool NoLddw; + // Whether to encode destination register in Callx's src field + bool CallxRegSrc; + public: // This constructor initializes the data members to match that // of the specified triple. @@ -108,6 +111,7 @@ class SBFSubtarget : public SBFGenSubtargetInfo { bool getDisableNeg() const { return DisableNeg; } bool getReverseSubImm() const { return ReverseSubImm; } bool getNoLddw() const { return NoLddw; } + bool getCallXRegSrc() const { return CallxRegSrc; } const SBFInstrInfo *getInstrInfo() const override { return &InstrInfo; } const SBFFrameLowering *getFrameLowering() const override { diff --git a/llvm/lib/Target/SBF/SBFTargetFeatures.td b/llvm/lib/Target/SBF/SBFTargetFeatures.td new file mode 100644 index 00000000000000..47056be9f14d2d --- /dev/null +++ b/llvm/lib/Target/SBF/SBFTargetFeatures.td @@ -0,0 +1,58 @@ +//===-- SBFTargetFeatures.td - Target Features for SBF Target ---------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file describes the SBF target features in TableGen format. +// +//===----------------------------------------------------------------------===// + +def DummyFeature : SubtargetFeature<"dummy", "isDummyMode", + "true", "unused feature">; + +def ALU32 : SubtargetFeature<"alu32", "HasAlu32", "true", + "Enable ALU32 instructions">; + +def DwarfRIS: SubtargetFeature<"dwarfris", "UseDwarfRIS", "true", + "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections">; + +def FeatureSolana : SubtargetFeature<"solana", "IsSolana", "true", + "Enable Solana extensions">; + +def FeatureDynamicFrames : SubtargetFeature<"dynamic-frames", "HasDynamicFrames", "true", + "Enable dynamic frames">; + +def FeatureSdiv : SubtargetFeature<"sdiv", "HasSdiv", "true", + "Enable native SBF_SDIV support">; + +def FeatureRelocAbs64 : SubtargetFeature<"reloc-abs64", "UseRelocAbs64", "true", + "Fix 64bit data relocations">; + +def FeatureStaticSyscalls : SubtargetFeature<"static-syscalls", "HasStaticSyscalls", "true", + "Marker feature used for conditional compilation">; + +def FeatureDisableNeg : SubtargetFeature<"no-neg", "DisableNeg", "true", + "Disable the neg instruction">; + +def FeatureReverseSubImm : SubtargetFeature<"reverse-sub", "ReverseSubImm", "true", + "Reverse the operands in the 'sub reg, imm' instruction">; + +def FeatureDisableLddw : SubtargetFeature<"no-lddw", "NoLddw", "true", + "Disable the lddw instruction">; + +def FeatureCallxRegSrc : SubtargetFeature<"callx-reg-src", "CallxRegSrc", "true", + "Encode Callx destination register in the src field">; + +class Proc Features> + : Processor; + +def : Proc<"generic", []>; +def : Proc<"v1", []>; +def : Proc<"v2", []>; +def : Proc<"v3", []>; +def : Proc<"probe", []>; +def : Proc<"sbfv2", [FeatureSolana, FeatureDynamicFrames, FeatureSdiv, FeatureRelocAbs64, FeatureStaticSyscalls, + FeatureDisableNeg, FeatureReverseSubImm, FeatureDisableLddw, FeatureCallxRegSrc]>; \ No newline at end of file diff --git a/llvm/test/CodeGen/SBF/callx.ll b/llvm/test/CodeGen/SBF/callx.ll index 04ab27a09821ad..0dc465e3c54beb 100644 --- a/llvm/test/CodeGen/SBF/callx.ll +++ b/llvm/test/CodeGen/SBF/callx.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=sbf | FileCheck %s +; RUN: llc < %s -march=sbf --show-mc-encoding \ +; RUN: | FileCheck %s -check-prefixes=CHECK-v1 ; source: ; int test(int (*f)(void)) { return f(); } @@ -6,7 +7,8 @@ define dso_local i32 @test(i32 ()* nocapture %f) local_unnamed_addr #0 { entry: %call = tail call i32 %f() #1 -; CHECK: callx r{{[0-9]+}} +; CHECK-v1: callx r{{[0-9]+}} # encoding: [0x8d,0x00,0x00,0x00,0x0{{[0-9]|a|b}},0x00,0x00,0x00] +; CHECK-v2: callx r{{[0-9]+}} # encoding: [0x8d,0x0{{[0-9]|a|b}},0x00,0x00,0x00,0x00,0x00,0x00] ret i32 %call } diff --git a/llvm/test/MC/SBF/sbf-jmp.s b/llvm/test/MC/SBF/sbf-jmp.s index 257df3239de87d..d55d7d20c71acc 100644 --- a/llvm/test/MC/SBF/sbf-jmp.s +++ b/llvm/test/MC/SBF/sbf-jmp.s @@ -1,8 +1,13 @@ # RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=sbfv2 --show-encoding \ # RUN: | FileCheck %s --check-prefix=CHECK-ASM-NEW +# RUN: llvm-mc %s -triple=sbf-solana-solana --show-encoding \ +# RUN: | FileCheck %s --check-prefix=CHECK-ASM-OLD # RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=sbfv2 -filetype=obj \ -# RUN: | llvm-objdump -d -r - \ +# RUN: | llvm-objdump --mcpu=sbfv2 -d -r - \ # RUN: | FileCheck --check-prefix=CHECK-OBJ-NEW %s +# RUN: llvm-mc %s -triple=sbf-solana-solana -filetype=obj \ +# RUN: | llvm-objdump -d -r - \ +# RUN: | FileCheck --check-prefix=CHECK-OBJ-OLD %s @@ -215,7 +220,9 @@ jsle w5, -123, +8 call 8 # CHECK-OBJ-NEW: callx r4 -# CHECK-ASM-NEW: encoding: [0x8d,0x00,0x00,0x00,0x04,0x00,0x00,0x00] +# CHECK-OBJ-OLD: callx r4 +# CHECK-ASM-NEW: encoding: [0x8d,0x04,0x00,0x00,0x00,0x00,0x00,0x00] +# CHECK-ASM-OLD: encoding: [0x8d,0x00,0x00,0x00,0x04,0x00,0x00,0x00] callx r4 # CHECK-OBJ-NEW: exit From 2c4117553258ff6bf1f3001a7d8c6a57f5503c65 Mon Sep 17 00:00:00 2001 From: Lucas Steuernagel Date: Wed, 3 Jan 2024 11:33:35 -0300 Subject: [PATCH 2/3] Change encoding --- llvm/lib/Target/SBF/SBFInstrInfo.td | 2 +- llvm/test/CodeGen/SBF/callx.ll | 4 +++- llvm/test/MC/SBF/sbf-jmp.s | 2 +- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td index d7e4d155433ee7..2600ca5ef5deff 100644 --- a/llvm/lib/Target/SBF/SBFInstrInfo.td +++ b/llvm/lib/Target/SBF/SBFInstrInfo.td @@ -585,7 +585,7 @@ class CALLX_SRC_REG []> { bits<4> BrDst; - let Inst{51-48} = BrDst; + let Inst{55-52} = BrDst; let SBFClass = SBF_JMP; } diff --git a/llvm/test/CodeGen/SBF/callx.ll b/llvm/test/CodeGen/SBF/callx.ll index 0dc465e3c54beb..bebcf4a11d4cb3 100644 --- a/llvm/test/CodeGen/SBF/callx.ll +++ b/llvm/test/CodeGen/SBF/callx.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -march=sbf --show-mc-encoding \ ; RUN: | FileCheck %s -check-prefixes=CHECK-v1 +; RUN: llc < %s -march=sbf --mcpu=sbfv2 --show-mc-encoding \ +; RUN: | FileCheck %s -check-prefixes=CHECK-v2 ; source: ; int test(int (*f)(void)) { return f(); } @@ -8,7 +10,7 @@ define dso_local i32 @test(i32 ()* nocapture %f) local_unnamed_addr #0 { entry: %call = tail call i32 %f() #1 ; CHECK-v1: callx r{{[0-9]+}} # encoding: [0x8d,0x00,0x00,0x00,0x0{{[0-9]|a|b}},0x00,0x00,0x00] -; CHECK-v2: callx r{{[0-9]+}} # encoding: [0x8d,0x0{{[0-9]|a|b}},0x00,0x00,0x00,0x00,0x00,0x00] +; CHECK-v2: callx r{{[0-9]+}} # encoding: [0x8d,0x{{[0-9]}}0,0x00,0x00,0x00,0x00,0x00,0x00] ret i32 %call } diff --git a/llvm/test/MC/SBF/sbf-jmp.s b/llvm/test/MC/SBF/sbf-jmp.s index d55d7d20c71acc..dc35c2cba6dba9 100644 --- a/llvm/test/MC/SBF/sbf-jmp.s +++ b/llvm/test/MC/SBF/sbf-jmp.s @@ -221,7 +221,7 @@ call 8 # CHECK-OBJ-NEW: callx r4 # CHECK-OBJ-OLD: callx r4 -# CHECK-ASM-NEW: encoding: [0x8d,0x04,0x00,0x00,0x00,0x00,0x00,0x00] +# CHECK-ASM-NEW: encoding: [0x8d,0x40,0x00,0x00,0x00,0x00,0x00,0x00] # CHECK-ASM-OLD: encoding: [0x8d,0x00,0x00,0x00,0x04,0x00,0x00,0x00] callx r4 From a728f2c3c542356be777bdf874bd411b14cf7f15 Mon Sep 17 00:00:00 2001 From: Lucas Steuernagel Date: Thu, 4 Jan 2024 09:20:39 -0300 Subject: [PATCH 3/3] Rebase cleanup --- llvm/lib/Target/SBF/SBFInstrInfo.td | 3 --- llvm/lib/Target/SBF/SBFSubtarget.cpp | 9 ++++++--- llvm/lib/Target/SBF/SBFSubtarget.h | 6 +----- llvm/test/MC/SBF/sbf-jmp.s | 2 +- 4 files changed, 8 insertions(+), 12 deletions(-) diff --git a/llvm/lib/Target/SBF/SBFInstrInfo.td b/llvm/lib/Target/SBF/SBFInstrInfo.td index 2600ca5ef5deff..1f8ea2cd3b6114 100644 --- a/llvm/lib/Target/SBF/SBFInstrInfo.td +++ b/llvm/lib/Target/SBF/SBFInstrInfo.td @@ -57,9 +57,6 @@ def SBFNoALU32 : Predicate<"!Subtarget->getHasAlu32()">; def SBFSubtargetSolana : Predicate<"Subtarget->isSolana()">; def SBFHasLddw : Predicate<"!Subtarget->getNoLddw()">; def SBFNoLddw : Predicate<"Subtarget->getNoLddw()">; - -def SBFv2 : Predicate<"Subtarget->isSBFv2()">; -def NoSBFv2 : Predicate<"!Subtarget->isSBFv2()">; def SBFHasNeg : Predicate<"!Subtarget->getDisableNeg()">; def SBFNoNeg: Predicate<"Subtarget->getDisableNeg()">; def SBFRevSub : Predicate<"Subtarget->getReverseSubImm()">; diff --git a/llvm/lib/Target/SBF/SBFSubtarget.cpp b/llvm/lib/Target/SBF/SBFSubtarget.cpp index 6a8e62530e677a..e82fa30f0cc159 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.cpp +++ b/llvm/lib/Target/SBF/SBFSubtarget.cpp @@ -39,11 +39,15 @@ void SBFSubtarget::initializeEnvironment(const Triple &TT) { HasJmpExt = false; HasJmp32 = false; HasAlu32 = false; - HasDynamicFrames = false; HasSdiv = false; UseDwarfRIS = false; + + // SBFv2 features + HasDynamicFrames = false; + DisableNeg = false; + ReverseSubImm = false; + NoLddw = false; CallxRegSrc = false; - IsSBFv2 = false; } void SBFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { @@ -67,7 +71,6 @@ void SBFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { } if (CPU == "sbfv2") { - IsSBFv2 = true; if (!HasDynamicFrames) report_fatal_error("sbfv2 requires dynamic-frames\n", false); } diff --git a/llvm/lib/Target/SBF/SBFSubtarget.h b/llvm/lib/Target/SBF/SBFSubtarget.h index bdc2e49b94d87b..5461d8a4765552 100644 --- a/llvm/lib/Target/SBF/SBFSubtarget.h +++ b/llvm/lib/Target/SBF/SBFSubtarget.h @@ -72,9 +72,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo { // whether we should enable MCAsmInfo DwarfUsesRelocationsAcrossSections bool UseDwarfRIS; - // whether we are targeting SBFv2 - bool IsSBFv2; - // Whether to disable the negate (neg) instruction bool DisableNeg; @@ -82,7 +79,7 @@ class SBFSubtarget : public SBFGenSubtargetInfo { // reg - imm'. bool ReverseSubImm; - // wether we should use the LDDW instruction + // Whether we should use the LDDW instruction bool NoLddw; // Whether to encode destination register in Callx's src field @@ -107,7 +104,6 @@ class SBFSubtarget : public SBFGenSubtargetInfo { bool getHasDynamicFrames() const { return HasDynamicFrames; } bool getHasSdiv() const { return HasSdiv; } bool getUseDwarfRIS() const { return UseDwarfRIS; } - bool isSBFv2() const { return IsSBFv2; } bool getDisableNeg() const { return DisableNeg; } bool getReverseSubImm() const { return ReverseSubImm; } bool getNoLddw() const { return NoLddw; } diff --git a/llvm/test/MC/SBF/sbf-jmp.s b/llvm/test/MC/SBF/sbf-jmp.s index dc35c2cba6dba9..ca39066d8d11f6 100644 --- a/llvm/test/MC/SBF/sbf-jmp.s +++ b/llvm/test/MC/SBF/sbf-jmp.s @@ -3,7 +3,7 @@ # RUN: llvm-mc %s -triple=sbf-solana-solana --show-encoding \ # RUN: | FileCheck %s --check-prefix=CHECK-ASM-OLD # RUN: llvm-mc %s -triple=sbf-solana-solana --mcpu=sbfv2 -filetype=obj \ -# RUN: | llvm-objdump --mcpu=sbfv2 -d -r - \ +# RUN: | llvm-objdump -d -r - \ # RUN: | FileCheck --check-prefix=CHECK-OBJ-NEW %s # RUN: llvm-mc %s -triple=sbf-solana-solana -filetype=obj \ # RUN: | llvm-objdump -d -r - \