From c3bcea3dfafb772ca7935b3d88cef61f748fc23e Mon Sep 17 00:00:00 2001 From: Lin Guo Date: Mon, 18 Nov 2024 09:34:17 -0800 Subject: [PATCH] Add amx to SPR's feature list From Intel's [manual](https://www.intel.com/content/www/us/en/content-details/836496/intel-architecture-instruction-set-extensions-programming-reference.html), the 3 supported CPUID bits are AMX-BF16, AMX-TILE, and AMX-INT8. From GCC's manual: ``` Intel Sapphire Rapids/Emerald Rapids CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, MOVDIRI, MOVDIR64B, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512-FP16 and AVX512BF16 instruction set support. ``` As a side-effect, one test json previously recognized as SPR is now identified as ICX. Will need to update archspec's `test_cpu.py` list when update the submodule reference, if this is merged. --- cpu/microarchitectures.json | 5 ++++- .../{linux-amazon2-sapphirerapids => linux-amazon2-icelake} | 0 2 files changed, 4 insertions(+), 1 deletion(-) rename tests/targets/{linux-amazon2-sapphirerapids => linux-amazon2-icelake} (100%) diff --git a/cpu/microarchitectures.json b/cpu/microarchitectures.json index 9275422..802e8f9 100644 --- a/cpu/microarchitectures.json +++ b/cpu/microarchitectures.json @@ -1483,7 +1483,10 @@ "movdir64b", "movdiri", "serialize", - "waitpkg" + "waitpkg", + "amx_bf16", + "amx_tile", + "amx_int8" ], "compilers": { "gcc": [ diff --git a/tests/targets/linux-amazon2-sapphirerapids b/tests/targets/linux-amazon2-icelake similarity index 100% rename from tests/targets/linux-amazon2-sapphirerapids rename to tests/targets/linux-amazon2-icelake