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z80.c
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/*
MIT License
Copyright (c) 2019 Nicolas Allemand
Copyright (c) 2020-2022 Rupert Carmichael
Copyright (c) 2022 rofl0r
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#include "z80.h"
#ifndef Z80_READ_BYTE
#define Z80_READ_BYTE(U, A) z->read_byte(U, A)
#define Z80_WRITE_BYTE(U, A, V) z->write_byte(U, A, V)
#endif
enum z80_flagbit {
cf = 0,
nf = 1,
pf = 2,
xf = 3,
hf = 4,
yf = 5,
zf = 6,
sf = 7
};
static const uint8_t f_szpxy[] = {
0x44, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x0c, 0x08, 0x08, 0x0c,
0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, 0x0c, 0x08, 0x08, 0x0c, 0x08, 0x0c, 0x0c, 0x08,
0x20, 0x24, 0x24, 0x20, 0x24, 0x20, 0x20, 0x24, 0x2c, 0x28, 0x28, 0x2c, 0x28, 0x2c, 0x2c, 0x28,
0x24, 0x20, 0x20, 0x24, 0x20, 0x24, 0x24, 0x20, 0x28, 0x2c, 0x2c, 0x28, 0x2c, 0x28, 0x28, 0x2c,
0x00, 0x04, 0x04, 0x00, 0x04, 0x00, 0x00, 0x04, 0x0c, 0x08, 0x08, 0x0c, 0x08, 0x0c, 0x0c, 0x08,
0x04, 0x00, 0x00, 0x04, 0x00, 0x04, 0x04, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x0c, 0x08, 0x08, 0x0c,
0x24, 0x20, 0x20, 0x24, 0x20, 0x24, 0x24, 0x20, 0x28, 0x2c, 0x2c, 0x28, 0x2c, 0x28, 0x28, 0x2c,
0x20, 0x24, 0x24, 0x20, 0x24, 0x20, 0x20, 0x24, 0x2c, 0x28, 0x28, 0x2c, 0x28, 0x2c, 0x2c, 0x28,
0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, 0x8c, 0x88, 0x88, 0x8c, 0x88, 0x8c, 0x8c, 0x88,
0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, 0x88, 0x8c, 0x8c, 0x88, 0x8c, 0x88, 0x88, 0x8c,
0xa4, 0xa0, 0xa0, 0xa4, 0xa0, 0xa4, 0xa4, 0xa0, 0xa8, 0xac, 0xac, 0xa8, 0xac, 0xa8, 0xa8, 0xac,
0xa0, 0xa4, 0xa4, 0xa0, 0xa4, 0xa0, 0xa0, 0xa4, 0xac, 0xa8, 0xa8, 0xac, 0xa8, 0xac, 0xac, 0xa8,
0x84, 0x80, 0x80, 0x84, 0x80, 0x84, 0x84, 0x80, 0x88, 0x8c, 0x8c, 0x88, 0x8c, 0x88, 0x88, 0x8c,
0x80, 0x84, 0x84, 0x80, 0x84, 0x80, 0x80, 0x84, 0x8c, 0x88, 0x88, 0x8c, 0x88, 0x8c, 0x8c, 0x88,
0xa0, 0xa4, 0xa4, 0xa0, 0xa4, 0xa0, 0xa0, 0xa4, 0xac, 0xa8, 0xa8, 0xac, 0xa8, 0xac, 0xac, 0xa8,
0xa4, 0xa0, 0xa0, 0xa4, 0xa0, 0xa4, 0xa4, 0xa0, 0xa8, 0xac, 0xac, 0xa8, 0xac, 0xa8, 0xa8, 0xac,
};
// MARK: helpers
// get bit "n" of number "val"
#define GET_BIT(n, val) (((val) >> (n)) & 1)
static inline uint8_t flag_val(enum z80_flagbit bit, bool cond) {
return (!!cond) << bit;
}
static inline bool flag_get(z80* const z, enum z80_flagbit bit) {
return !!(z->f & (1 << bit));
}
static inline void flag_set(z80* const z, enum z80_flagbit bit, bool val) {
z->f &= ~(1<<bit);
z->f |= (!!val) << bit;
}
static inline uint8_t rb(z80* const z, uint16_t addr) {
return Z80_READ_BYTE(z->userdata, addr);
}
static inline void wb(z80* const z, uint16_t addr, uint8_t val) {
Z80_WRITE_BYTE(z->userdata, addr, val);
}
static inline uint16_t rw(z80* const z, uint16_t addr) {
return (Z80_READ_BYTE(z->userdata, addr + 1) << 8) |
Z80_READ_BYTE(z->userdata, addr);
}
static inline void ww(z80* const z, uint16_t addr, uint16_t val) {
Z80_WRITE_BYTE(z->userdata, addr, val & 0xFF);
Z80_WRITE_BYTE(z->userdata, addr + 1, val >> 8);
}
static inline void pushw(z80* const z, uint16_t val) {
z->sp -= 2;
ww(z, z->sp, val);
}
static inline uint16_t popw(z80* const z) {
z->sp += 2;
return rw(z, z->sp - 2);
}
static inline uint8_t nextb(z80* const z) {
return rb(z, z->pc++);
}
static inline uint16_t nextw(z80* const z) {
z->pc += 2;
return rw(z, z->pc - 2);
}
// increments R, keeping the highest byte intact
static inline void inc_r(z80* const z) {
z->r = (z->r & 0x80) | ((z->r + 1) & 0x7f);
}
// returns if there was a carry between bit "bit_no" and "bit_no - 1" when
// executing "a + b + cy"
/*static inline bool carry(int bit_no, uint16_t a, uint16_t b, bool cy) {
int32_t result = a + b + cy;
int32_t carry = result ^ a ^ b;
return carry & (1 << bit_no);
}*/
// returns the parity of byte: 0 if number of 1 bits in `val` is odd, else 1
static inline bool parity(uint8_t v) {
v ^= v >> 4;
v &= 0xf;
return !((0x6996 >> v) & 1);
}
static unsigned exec_opcode(z80* const z, uint8_t opcode);
static unsigned exec_opcode_cb(z80* const z, uint8_t opcode);
static unsigned exec_opcode_dcb(
z80* const z, const uint8_t opcode, const uint16_t addr);
static unsigned exec_opcode_ed(z80* const z, uint8_t opcode);
static unsigned exec_opcode_ddfd(z80* const z, uint8_t opcode, uint16_t* const iz);
// MARK: opcodes
// jumps to an address
static inline void jump(z80* const z, uint16_t addr) {
z->pc = addr;
z->mem_ptr = addr;
}
// jumps to next word in memory if condition is true
static inline void cond_jump(z80* const z, bool condition) {
const uint16_t addr = nextw(z);
if (condition) {
jump(z, addr);
}
z->mem_ptr = addr;
}
// calls to next word in memory
static inline void call(z80* const z, uint16_t addr) {
pushw(z, z->pc);
z->pc = addr;
z->mem_ptr = addr;
}
// calls to next word in memory if condition is true
static inline unsigned cond_call(z80* const z, bool condition) {
const uint16_t addr = nextw(z);
unsigned cyc = 0;
if (condition) {
call(z, addr);
cyc = 7;
}
z->mem_ptr = addr;
return cyc;
}
// returns from subroutine
static inline void ret(z80* const z) {
z->pc = popw(z);
z->mem_ptr = z->pc;
}
// returns from subroutine if condition is true
static inline unsigned cond_ret(z80* const z, bool condition) {
if (condition) {
ret(z);
return 6;
}
return 0;
}
static inline void jr(z80* const z, int8_t displacement) {
z->pc += displacement;
z->mem_ptr = z->pc;
}
static inline unsigned cond_jr(z80* const z, bool condition) {
const int8_t b = nextb(z);
if (condition) {
jr(z, b);
return 5;
}
return 0;
}
// ADD Byte: adds two bytes together
static inline uint8_t addb(z80* const z, uint32_t a, uint32_t b, bool cy) {
/* as this is one of the core functions, the simple implementation
was replaced by an "unrolled" one. the basic algorithm is this
old code:
const uint8_t result = a + b + cy;
z->f = (f_szpxy[result] & ~(1 << pf)) |
flag_val(hf, carry(4, a, b, cy)) |
flag_val(pf, carry(7, a, b, cy) != carry(8, a, b, cy)) |
flag_val(cf, carry(8, a, b, cy)) |
flag_val(nf, 0);
return result;
*/
int32_t result = a + b + cy;
int32_t carry = result ^ a ^ b;
result &= 0xff;
z->f = (f_szpxy[result] & ~(1 << pf));
/* the carry flag we need (4th bit) is already in the right position
as hf is bit 4 too, so we don't need to shift it around */
z->f |= carry & (1 << hf);
/* we now need bits 7 and 8 of the carry - pf is set to one if bit7 != bit8.
we use the base algorithm (x+1) & 2 which results in 2 only if both low
bits aren't identical. in order to have the right bits in place, shift
by 6 and modulate the algorithm to work on the top 2 bits of the lower 3.*/
carry >>= 6;
z->f |= (carry+2) & 4;
/* cf is bit 0, so move the 8th bit of carry to that position. */
z->f |= (carry >> 2);
return result;
}
// SUBstract Byte: substracts two bytes (with optional carry)
static inline uint8_t subb(z80* const z, uint32_t a, uint32_t b, bool cy) {
/* like addb, this core functionality was "unrolled".
the simple original implemenation is this:
uint8_t val = addb(z, a, ~b, !cy);
flag_set(z, cf, !flag_get(z, cf));
flag_set(z, hf, !flag_get(z, hf));
flag_set(z, nf, 1);
return val;
read the comments in addb to see explanations for the below new code.
*/
int32_t result = a - b - cy;
int32_t carry = result ^ a ^ b;
result &= 0xff;
z->f = (1 << nf) | (f_szpxy[result] & ~(1 << pf));
z->f |= carry & (1 << hf);
carry >>= 6;
z->f |= ((carry+2) & 4);
z->f |= ((carry >> 2) & 1);
return result;
}
// ADD Word: adds two words together
static inline uint16_t addw(z80* const z, uint16_t a, uint16_t b, bool cy) {
uint8_t lsb = addb(z, a, b, cy);
uint8_t msb = addb(z, a >> 8, b >> 8, flag_get(z, cf));
uint16_t result = (msb << 8) | lsb;
flag_set(z, zf, result == 0);
z->mem_ptr = a + 1;
return result;
}
// SUBstract Word: substracts two words (with optional carry)
static inline uint16_t subw(z80* const z, uint16_t a, uint16_t b, bool cy) {
uint8_t lsb = subb(z, a, b, cy);
uint8_t msb = subb(z, a >> 8, b >> 8, flag_get(z, cf));
uint16_t result = (msb << 8) | lsb;
flag_set(z, zf, result == 0);
z->mem_ptr = a + 1;
return result;
}
// adds a word to HL
static inline void addhl(z80* const z, uint16_t val) {
bool sfc = flag_get(z, sf);
bool zfc = flag_get(z, zf);
bool pfc = flag_get(z, pf);
uint16_t result = addw(z, z->hl, val, 0);
z->hl = result;
flag_set(z, sf, sfc);
flag_set(z, zf, zfc);
flag_set(z, pf, pfc);
}
// adds a word to IX or IY
static inline void addiz(z80* const z, uint16_t* reg, uint16_t val) {
bool sfc = flag_get(z, sf);
bool zfc = flag_get(z, zf);
bool pfc = flag_get(z, pf);
uint16_t result = addw(z, *reg, val, 0);
*reg = result;
flag_set(z, sf, sfc);
flag_set(z, zf, zfc);
flag_set(z, pf, pfc);
}
// adds a word (+ carry) to HL
static inline void adchl(z80* const z, uint16_t val) {
uint16_t result = addw(z, z->hl, val, flag_get(z, cf));
flag_set(z, sf, result >> 15);
flag_set(z, zf, result == 0);
z->hl = result;
}
// substracts a word (+ carry) to HL
static inline void sbchl(z80* const z, uint16_t val) {
const uint16_t result = subw(z, z->hl, val, flag_get(z, cf));
flag_set(z, sf, result >> 15);
flag_set(z, zf, result == 0);
z->hl = result;
}
// increments a byte value
static inline uint8_t inc(z80* const z, uint8_t a) {
bool cfc = flag_get(z, cf);
uint8_t result = addb(z, a, 1, 0);
flag_set(z, cf, cfc);
return result;
}
// decrements a byte value
static inline uint8_t dec(z80* const z, uint8_t a) {
bool cfc = flag_get(z, cf);
uint8_t result = subb(z, a, 1, 0);
flag_set(z, cf, cfc);
return result;
}
// MARK: bitwise
// executes a logic "and" between register A and a byte, then stores the
// result in register A
static inline void land(z80* const z, uint8_t val) {
const uint8_t result = z->a & val;
z->f = f_szpxy[result] |
flag_val(hf, 1) |
flag_val(nf, 0) |
flag_val(cf, 0);
z->a = result;
}
// executes a logic "xor" between register A and a byte, then stores the
// result in register A
static inline void lxor(z80* const z, const uint8_t val) {
const uint8_t result = z->a ^ val;
z->f = f_szpxy[result] |
flag_val(hf, 0) |
flag_val(nf, 0) |
flag_val(cf, 0);
z->a = result;
}
// executes a logic "or" between register A and a byte, then stores the
// result in register A
static inline void lor(z80* const z, const uint8_t val) {
const uint8_t result = z->a | val;
z->f = f_szpxy[result] |
flag_val(hf, 0) |
flag_val(nf, 0) |
flag_val(cf, 0);
z->a = result;
}
// compares a value with register A
static inline void cp(z80* const z, const uint32_t val) {
/* this core function was unrolled like subb and addb.
original implementation was:
subb(z, z->a, val, 0);
// the only difference between cp and sub is that
// the xf/yf are taken from the value to be substracted,
// not the result
flag_set(z, yf, GET_BIT(5, val));
flag_set(z, xf, GET_BIT(3, val));
because only 2 out of 5 flag of f_szpxy table would be
needed here, we instead calculate all of them from
scratch. see addb() comments for an explanation.
*/
int32_t result = z->a - val;
int32_t carry = result ^ z->a ^ val;
z->f = (1 << nf) | /* nf always set */
(val & ((1 << xf) | (1 << yf))) | /* yf and xf is taken from val */
(result & (1 << sf)) | /* sf and zf from result */
((!(result & 0xff)) << zf);
z->f |= carry & (1 << hf); /* adopt bit 4 directly from carry */
carry >>= 6;
z->f |= ((carry +2) & 4);
z->f |= ((carry >> 2) & 1);
}
// 0xCB opcodes
// rotate left with carry
static inline uint8_t cb_rlc(z80* const z, uint8_t val) {
const bool old = val >> 7;
val = (val << 1) | old;
z->f = f_szpxy[val] |
flag_val(nf, 0) |
flag_val(hf, 0) |
flag_val(cf, old);
return val;
}
// rotate right with carry
static inline uint8_t cb_rrc(z80* const z, uint8_t val) {
const bool old = val & 1;
val = (val >> 1) | (old << 7);
z->f = f_szpxy[val] |
flag_val(nf, 0) |
flag_val(hf, 0) |
flag_val(cf, old);
return val;
}
// rotate left (simple)
static inline uint8_t cb_rl(z80* const z, uint8_t val) {
const bool cfc = flag_get(z, cf);
const bool cfn = val >> 7;
val = (val << 1) | cfc;
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// rotate right (simple)
static inline uint8_t cb_rr(z80* const z, uint8_t val) {
const bool c = flag_get(z, cf);
const bool cfn = val & 1;
val = (val >> 1) | (c << 7);
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// shift left preserving sign
static inline uint8_t cb_sla(z80* const z, uint8_t val) {
const bool cfn = val >> 7;
val <<= 1;
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// SLL (exactly like SLA, but sets the first bit to 1)
static inline uint8_t cb_sll(z80* const z, uint8_t val) {
const bool cfn = val >> 7;
val <<= 1;
val |= 1;
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// shift right preserving sign
static inline uint8_t cb_sra(z80* const z, uint8_t val) {
const bool cfn = val & 1;
val = (val >> 1) | (val & 0x80); // 0b10000000
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// shift register right
static inline uint8_t cb_srl(z80* const z, uint8_t val) {
const bool cfn = val & 1;
val >>= 1;
z->f = f_szpxy[val] |
flag_val(cf, cfn) |
flag_val(nf, 0) |
flag_val(hf, 0);
return val;
}
// tests bit "n" from a byte
static inline uint8_t cb_bit(z80* const z, uint8_t val, uint8_t n) {
const uint8_t result = val & (1 << n);
z->f = f_szpxy[result] |
flag_val(cf, flag_get(z, cf)) | /* original code didn't set this one, so use old value */
flag_val(hf, 1) |
flag_val(nf, 0); /* yf/xf are overwritten after return */
return result;
}
static inline void ldi(z80* const z) {
const uint16_t de = z->de;
const uint16_t hl = z->hl;
const uint8_t val = rb(z, hl);
wb(z, de, val);
++z->hl;
++z->de;
--z->bc;
// see https://wikiti.brandonw.net/index.php?title=Z80_Instruction_Set
// for the calculation of xf/yf on LDI
const uint8_t result = val + z->a;
flag_set(z, xf, GET_BIT(3, result));
flag_set(z, yf, GET_BIT(1, result));
flag_set(z, nf, 0);
flag_set(z, hf, 0);
flag_set(z, pf, z->bc > 0);
}
static inline void ldd(z80* const z) {
ldi(z);
// same as ldi but HL and DE are decremented instead of incremented
z->hl -= 2;
z->de -= 2;
}
static inline void cpi(z80* const z) {
bool cfc = flag_get(z, cf);
const uint8_t result = subb(z, z->a, rb(z, z->hl), 0);
++z->hl;
--z->bc;
bool hfc = flag_get(z, hf);
flag_set(z, xf, GET_BIT(3, result - hfc));
flag_set(z, yf, GET_BIT(1, result - hfc));
flag_set(z, pf, z->bc != 0);
flag_set(z, cf, cfc);
z->mem_ptr += 1;
}
static inline void cpd(z80* const z) {
cpi(z);
// same as cpi but HL is decremented instead of incremented
z->hl -= 2;
z->mem_ptr -= 2;
}
static void in_r_c(z80* const z, uint8_t* r) {
*r = z->port_in(z, z->bc);
// FIXME: according to z80 wiki this one should set x/y flags too,
// in which case we should be able to use f_szpxy.
flag_set(z, zf, *r == 0);
flag_set(z, sf, *r >> 7);
flag_set(z, pf, parity(*r));
flag_set(z, nf, 0);
flag_set(z, hf, 0);
}
static void ini(z80* const z) {
unsigned tmp = z->port_in(z, z->bc);
unsigned tmp2 = tmp + ((z->c + 1) & 0xff);
z->mem_ptr = z->bc + 1;
wb(z, z->hl, tmp);
++z->hl;
--z->b;
z->f = (f_szpxy[z->b] & ~(1 << pf)) |
flag_val(nf, GET_BIT(7, tmp)) |
flag_val(pf, parity((tmp2 & 7) ^ z->b)) |
flag_val(hf, tmp2 > 255) |
flag_val(cf, tmp2 > 255);
}
static void ind(z80* const z) {
unsigned tmp = z->port_in(z, z->bc);
unsigned tmp2 = tmp + ((z->c - 1) & 0xff);
z->mem_ptr = z->bc - 1;
wb(z, z->hl, tmp);
--z->hl;
--z->b;
z->f = (f_szpxy[z->b] & ~(1 << pf)) |
flag_val(nf, GET_BIT(7, tmp)) |
flag_val(pf, parity((tmp2 & 7) ^ z->b)) |
flag_val(hf, tmp2 > 255) |
flag_val(cf, tmp2 > 255);
}
static void outi(z80* const z) {
unsigned tmp = rb(z, z->hl), tmp2;
z->port_out(z, z->bc, tmp);
++z->hl;
z->b -= 1;
z->f = f_szpxy[z->b];
flag_set(z, nf, GET_BIT(7, tmp));
tmp2 = tmp + z->l;
flag_set(z, pf, parity((tmp2 & 7) ^ z->b));
flag_set(z, hf, tmp2 > 255);
flag_set(z, cf, tmp2 > 255);
z->mem_ptr = z->bc + 1;
}
static void outd(z80* const z) {
outi(z);
z->hl -= 2;
z->mem_ptr = z->bc - 2;
}
static void outc(z80* const z, uint8_t data) {
z->port_out(z, z->bc, data);
z->mem_ptr = z->bc + 1;
}
static void daa(z80* const z) {
// "When this instruction is executed, the A register is BCD corrected
// using the contents of the flags. The exact process is the following:
// if the least significant four bits of A contain a non-BCD digit
// (i. e. it is greater than 9) or the H flag is set, then $06 is
// added to the register. Then the four most significant bits are
// checked. If this more significant digit also happens to be greater
// than 9 or the C flag is set, then $60 is added."
// > http://z80-heaven.wikidot.com/instructions-set:daa
uint8_t correction = 0;
if ((z->a & 0x0F) > 0x09 || flag_get(z, hf)) {
correction += 0x06;
}
if (z->a > 0x99 || flag_get(z, cf)) {
correction += 0x60;
flag_set(z, cf, 1);
}
const bool substraction = flag_get(z, nf);
if (substraction) {
flag_set(z, hf, flag_get(z, hf) && (z->a & 0x0F) < 0x06);
z->a -= correction;
} else {
flag_set(z, hf, (z->a & 0x0F) > 0x09);
z->a += correction;
}
z->f &= ~((1 << sf) | (1 << zf) | (1 << pf) | (1 << xf) | (1 << yf));
z->f |= f_szpxy[z->a];
}
static inline uint16_t displace(
z80* const z, uint16_t base_addr, int8_t displacement) {
const uint16_t addr = base_addr + displacement;
z->mem_ptr = addr;
return addr;
}
static inline unsigned process_interrupts(z80* const z) {
unsigned cyc = 0;
// "When an EI instruction is executed, any pending interrupt request
// is not accepted until after the instruction following EI is executed."
if (z->iff_delay > 0) {
z->iff_delay -= 1;
if (z->iff_delay == 0) {
z->iff1 = 1;
z->iff2 = 1;
}
return cyc;
}
if (z->nmi_pending) {
z->nmi_pending &= ~Z80_PULSE;
z->halted = 0;
z->iff1 = 0;
inc_r(z);
cyc += 11;
call(z, 0x66);
return cyc;
}
if (z->irq_pending && z->iff1) {
z->irq_pending &= ~Z80_PULSE;
z->halted = 0;
z->iff1 = 0;
z->iff2 = 0;
inc_r(z);
switch (z->interrupt_mode) {
case 0:
cyc += 11;
cyc += exec_opcode(z, z->irq_data);
break;
case 1:
cyc += 13;
call(z, 0x38);
break;
case 2:
cyc += 19;
call(z, rw(z, (z->i << 8) | z->irq_data));
break;
default:
//fprintf(stderr, "unsupported interrupt mode %d\n", z->interrupt_mode);
break;
}
return cyc;
}
return cyc;
}
// MARK: interface
// initialises a z80 struct. Note that read_byte, write_byte, port_in, port_out
// and userdata must be manually set by the user afterwards.
Z80_EXPORT void z80_init(z80* const z) {
z->read_byte = NULL;
z->write_byte = NULL;
z->port_in = NULL;
z->port_out = NULL;
z->userdata = NULL;
z->pc = 0;
z->sp = 0xFFFF;
z->ix = 0;
z->iy = 0;
z->mem_ptr = 0;
// af and sp are set to 0xFFFF after reset,
// and the other values are undefined (z80-documented)
z->af = 0xFFFF;
z->bc = 0;
z->de = 0;
z->hl = 0;
z->a_f_ = 0;
z->b_c_ = 0;
z->d_e_ = 0;
z->h_l_ = 0;
z->i = 0;
z->r = 0;
z->iff_delay = 0;
z->interrupt_mode = 0;
z->iff1 = 0;
z->iff2 = 0;
z->halted = 0;
z->irq_pending = 0;
z->nmi_pending = 0;
z->irq_data = 0;
}
Z80_EXPORT void z80_reset(z80* const z) {
z->pc = 0;
z->mem_ptr = 0;
z->i = 0;
z->r = 0;
z->interrupt_mode = 0;
z->iff_delay = 0;
z->iff1 = 0;
z->iff2 = 0;
z->halted = 0;
z->nmi_pending = 0;
}
static unsigned z80_step_s(z80* const z) {
unsigned cyc = 0;
if (z->halted) {
cyc += exec_opcode(z, 0x00);
} else {
const uint8_t opcode = nextb(z);
cyc += exec_opcode(z, opcode);
}
cyc += process_interrupts(z);
return cyc;
}
// sets the program counter (PC) to a new value
Z80_EXPORT void z80_set_pc(z80* const z, uint16_t pc) {
z->pc = pc;
}
// sets the stack pointer (SP) to a new value
Z80_EXPORT void z80_set_sp(z80* const z, uint16_t sp) {
z->sp = sp;
}
// executes the next instruction in memory + handles interrupts
Z80_EXPORT unsigned z80_step(z80* const z) {
return z80_step_s(z);
}
// executes the next instructions in memory + handles interrupts,
// until the cycle count is >= the requested amount.
Z80_EXPORT unsigned z80_step_n(z80* const z, unsigned cycles) {
unsigned cyc = 0;
while (cyc < cycles) {
cyc += z80_step_s(z);
}
return cyc;
}
#ifdef Z80_DEBUG
static inline uint8_t getpcb(z80* const z, unsigned offset) {
return rb(z, z->pc+offset);
}
static inline uint16_t getpcw(z80* const z, unsigned offset) {
return rw(z, z->pc+offset);
}
static char* z80_disas_ddfd(z80* const z) {
uint8_t opcode = getpcb(z, 1);
switch (opcode) {
case 0xE1: return "pop iz";
case 0xE5: return "push iz";
case 0xE9: return "jp iz";
case 0x09: return "add iz,bc";
case 0x19: return "add iz,de";
case 0x29: return "add iz,iz";
case 0x39: return "add iz,sp";
case 0x84: return "add a,izh";
case 0x85: return "add a,izl";
case 0x8C: return "adc a,izh";
case 0x8D: return "adc a,izl";
case 0x86: return "add a,(iz+*)";
case 0x8E: return "adc a,(iz+*)";
case 0x96: return "sub (iz+*)";
case 0x9E: return "sbc (iz+*)";
case 0x94: return "sub izh";
case 0x95: return "sub izl";
case 0x9C: return "sbc izh";
case 0x9D: return "sbc izl";
case 0xA6: return "and (iz+*)";
case 0xA4: return "and izh";
case 0xA5: return "and izl";
case 0xAE: return "xor (iz+*)";
case 0xAC: return "xor izh";
case 0xAD: return "xor izl";
case 0xB6: return "or (iz+*)";
case 0xB4: return "or izh";
case 0xB5: return "or izl";
case 0xBE: return "cp (iz+*)";
case 0xBC: return "cp izh";
case 0xBD: return "cp izl";
case 0x23: return "inc iz";
case 0x2B: return "dec iz";
case 0x34: return "inc (iz+*)";
case 0x35: return "dec (iz+*)";
case 0x24: return "inc izh";
case 0x25: return "dec izh";
case 0x2C: return "inc izl";
case 0x2D: return "dec izl";
case 0x2A: return "ld iz,(**)";
case 0x22: return "ld (**),iz";
case 0x21: return "ld iz,**";
case 0x36: return "ld (iz+*),*";
case 0x70: return "ld (iz+*),b";
case 0x71: return "ld (iz+*),c";
case 0x72: return "ld (iz+*),d";
case 0x73: return "ld (iz+*),e";
case 0x74: return "ld (iz+*),h";
case 0x75: return "ld (iz+*),l";
case 0x77: return "ld (iz+*),a";
case 0x46: return "ld b,(iz+*)";
case 0x4E: return "ld c,(iz+*)";
case 0x56: return "ld d,(iz+*)";
case 0x5E: return "ld e,(iz+*)";
case 0x66: return "ld h,(iz+*)";
case 0x6E: return "ld l,(iz+*)";
case 0x7E: return "ld a,(iz+*)";
case 0x44: return "ld b,izh";
case 0x4C: return "ld c,izh";
case 0x54: return "ld d,izh";
case 0x5C: return "ld e,izh";
case 0x7C: return "ld a,izh";
case 0x45: return "ld b,izl";
case 0x4D: return "ld c,izl";
case 0x55: return "ld d,izl";
case 0x5D: return "ld e,izl";
case 0x7D: return "ld a,izl";
case 0x60: return "ld izh,b";
case 0x61: return "ld izh,c";
case 0x62: return "ld izh,d";
case 0x63: return "ld izh,e";
case 0x64: return "ld izh,izh";
case 0x65: return "ld izh,izl";
case 0x67: return "ld izh,a";
case 0x26: return "ld izh,*";
case 0x68: return "ld izl,b";
case 0x69: return "ld izl,c";
case 0x6A: return "ld izl,d";
case 0x6B: return "ld izl,e";
case 0x6C: return "ld izl,izh";
case 0x6D: return "ld izl,izl";
case 0x6F: return "ld izl,a";
case 0x2E: return "ld izl,*";
case 0xF9: return "ld sp,iz";
case 0xE3: return "ex (sp),iz";
case 0xCB: return "DCBxx"; // FIXME: return what opcode_dcb does
}
return "redirect to normal opcode"; // FIXME: this should print regular opcode instead
}
static char* z80_disas(z80* const z) {
static char buf[32];
uint8_t opcode = getpcb(z, 0);
switch (opcode) {
case 0x7F: return "ld a,a";
case 0x78: return "ld a,b";
case 0x79: return "ld a,c";
case 0x7A: return "ld a,d";
case 0x7B: return "ld a,e";
case 0x7C: return "ld a,h";
case 0x7D: return "ld a,l";
case 0x47: return "ld b,a";
case 0x40: return "ld b,b";
case 0x41: return "ld b,c";
case 0x42: return "ld b,d";
case 0x43: return "ld b,e";
case 0x44: return "ld b,h";
case 0x45: return "ld b,l";
case 0x4F: return "ld c,a";
case 0x48: return "ld c,b";
case 0x49: return "ld c,c";
case 0x4A: return "ld c,d";
case 0x4B: return "ld c,e";
case 0x4C: return "ld c,h";
case 0x4D: return "ld c,l";
case 0x57: return "ld d,a";
case 0x50: return "ld d,b";
case 0x51: return "ld d,c";
case 0x52: return "ld d,d";
case 0x53: return "ld d,e";
case 0x54: return "ld d,h";
case 0x55: return "ld d,l";
case 0x5F: return "ld e,a";
case 0x58: return "ld e,b";
case 0x59: return "ld e,c";
case 0x5A: return "ld e,d";
case 0x5B: return "ld e,e";
case 0x5C: return "ld e,h";
case 0x5D: return "ld e,l";
case 0x67: return "ld h,a";
case 0x60: return "ld h,b";
case 0x61: return "ld h,c";
case 0x62: return "ld h,d";
case 0x63: return "ld h,e";
case 0x64: return "ld h,h";
case 0x65: return "ld h,l";
case 0x6F: return "ld l,a";
case 0x68: return "ld l,b";
case 0x69: return "ld l,c";
case 0x6A: return "ld l,d";
case 0x6B: return "ld l,e";
case 0x6C: return "ld l,h";
case 0x6D: return "ld l,l";
case 0x7E: return "ld a,(hl)";
case 0x46: return "ld b,(hl)";
case 0x4E: return "ld c,(hl)";
case 0x56: return "ld d,(hl)";
case 0x5E: return "ld e,(hl)";
case 0x66: return "ld h,(hl)";
case 0x6E: return "ld l,(hl)";