From f90b7a2be1cf168b404c3dab5b11db0d019abc5a Mon Sep 17 00:00:00 2001
From: Andrey Gusakov <dron0gus@gmail.com>
Date: Mon, 16 Oct 2023 18:13:21 +0300
Subject: [PATCH] openbtl: f1_dual_rev1: enable OpenBLT on USART2 (Bluetooth)

---
 firmware/boards/f1_dual_rev1/io/io_pins.h     |  5 ++++
 .../boards/f1_dual_rev1/openblt/blt_conf.h    | 11 +++++++--
 firmware/boards/f1_dual_rev1/openblt/main.c   | 23 +++++++++++++++++++
 3 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/firmware/boards/f1_dual_rev1/io/io_pins.h b/firmware/boards/f1_dual_rev1/io/io_pins.h
index 88d98a54..5e6112e1 100644
--- a/firmware/boards/f1_dual_rev1/io/io_pins.h
+++ b/firmware/boards/f1_dual_rev1/io/io_pins.h
@@ -16,6 +16,11 @@
 #define LL_UART_TX_PIN				LL_GPIO_PIN_9
 #define LL_UART_RX_PIN				LL_GPIO_PIN_10
 
+// Communication - secondary (BT) UART
+#define SEC_UART_GPIO_PORT			GPIOC
+#define SEC_LL_UART_TX_PIN			LL_GPIO_PIN_10
+#define SEC_LL_UART_RX_PIN			LL_GPIO_PIN_11
+
 // Communication - CAN1
 #define CAN_GPIO_PORT				GPIOA
 #define LL_CAN_TX_PIN				LL_GPIO_PIN_12
diff --git a/firmware/boards/f1_dual_rev1/openblt/blt_conf.h b/firmware/boards/f1_dual_rev1/openblt/blt_conf.h
index ec478dcc..650cef64 100644
--- a/firmware/boards/f1_dual_rev1/openblt/blt_conf.h
+++ b/firmware/boards/f1_dual_rev1/openblt/blt_conf.h
@@ -74,8 +74,15 @@
 /** \brief Configure number of bytes in the host->target data packet. */
 #define BOOT_COM_RS232_RX_MAX_DATA       (64)
 /** \brief Select the desired UART peripheral as a zero based index. */
-#define BOOT_COM_RS232_CHANNEL_INDEX     (0)
-
+//#define BOOT_COM_RS232_CHANNEL_INDEX     (0)
+
+#define BOOT_COM_RS232_CHANNELS_N        2
+#define BOOT_COM_RS232_CHANNEL_INDEXES   {0, 2}
+#define BOOT_COM_RS232_CHANNEL_DEVS      {(USART1), (USART3)}
+// BOOT_COM_RS232_CHANNEL_INDEXES[0]
+#define BOOT_COM_RS232_CHANNEL_DEFAULT_INDEX 0
+// BOOT_COM_RS232_CHANNEL_DEVS[0]
+#define BOOT_COM_RS232_CHANNEL_DEFAULT_DEV USART1
 
 /****************************************************************************************
 *   B A C K D O O R   E N T R Y   C O N F I G U R A T I O N
diff --git a/firmware/boards/f1_dual_rev1/openblt/main.c b/firmware/boards/f1_dual_rev1/openblt/main.c
index 0c8d0879..5e9c1920 100644
--- a/firmware/boards/f1_dual_rev1/openblt/main.c
+++ b/firmware/boards/f1_dual_rev1/openblt/main.c
@@ -128,6 +128,7 @@ void HAL_MspInit(void)
   /* GPIO ports clock enable. */
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
   LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
+  LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC);
 
 #if (BOOT_COM_RS232_ENABLE > 0)
   /* UART clock enable. */
@@ -142,6 +143,23 @@ void HAL_MspInit(void)
   GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
   GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
   LL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
+#if (BOOT_COM_RS232_CHANNELS_N > 1)
+  /* USART3 at PC10, PC11 */
+  /* UART clock enable. */
+  LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART3);
+  /* UART TX and RX GPIO pin configuration. */
+  GPIO_InitStruct.Pin = SEC_LL_UART_TX_PIN;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+  GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+  LL_GPIO_Init(SEC_UART_GPIO_PORT, &GPIO_InitStruct);
+  GPIO_InitStruct.Pin = SEC_LL_UART_RX_PIN;
+  GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
+  GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
+  LL_GPIO_Init(SEC_UART_GPIO_PORT, &GPIO_InitStruct);
+  /* Enable remap: USART3 to PC10, PC11 */
+  AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_0;
+#endif
 #endif
 
 #if (BOOT_COM_CAN_ENABLE > 0)
@@ -181,6 +199,7 @@ void HAL_MspDeInit(void)
   LL_RCC_DeInit();
   
   /* Deinit used GPIOs. */
+  LL_GPIO_DeInit(GPIOC);
   LL_GPIO_DeInit(GPIOB);
   LL_GPIO_DeInit(GPIOA);
 
@@ -191,10 +210,14 @@ void HAL_MspDeInit(void)
 
 #if (BOOT_COM_RS232_ENABLE > 0)
   /* UART clock disable. */
+#if (BOOT_COM_RS232_CHANNELS_N > 1)
+  LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_USART3);
+#endif
   LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_USART1);
 #endif
 
   /* GPIO ports clock disable. */
+  LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOC);
   LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOB);
   LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOA);