diff --git a/dts/riscv_em.dts b/dts/riscv_em.dts index 0e5a059..1952d27 100644 --- a/dts/riscv_em.dts +++ b/dts/riscv_em.dts @@ -6,8 +6,8 @@ model = "riscv-virtio,qemu"; chosen { - bootargs = "root=/dev/vda ro console=ttyS0"; - stdout-path = "/uart@10000000"; + bootargs = "root=/dev/vda ro console=ttySU0"; + stdout-path = "/uart@3000000"; }; cpus { @@ -21,7 +21,9 @@ compatible = "riscv"; riscv,isa = "rv64ima"; mmu-type = "none"; + clock-frequency = <10000000>; cpu0_intc: interrupt-controller { + #address-cells = <1>; #interrupt-cells = <1>; compatible = "riscv,cpu-intc"; interrupt-controller; @@ -57,8 +59,8 @@ interrupts-extended = <&cpu0_intc 3 &cpu0_intc 7>; }; - /* FIXME: This is probably not correct for now */ plic0: interrupt-controller@c000000 { + #address-cells = <2>; #interrupt-cells = <1>; interrupt-controller; compatible = "riscv,plic0"; diff --git a/dts/riscv_em32_linux.dts b/dts/riscv_em32_linux.dts index 5727a70..2dc2b4f 100644 --- a/dts/riscv_em32_linux.dts +++ b/dts/riscv_em32_linux.dts @@ -23,6 +23,7 @@ mmu-type = "riscv,sv32"; clock-frequency = <10000000>; cpu0_intc: interrupt-controller { + #address-cells = <1>; #interrupt-cells = <1>; compatible = "riscv,cpu-intc"; interrupt-controller; @@ -50,6 +51,7 @@ /* FIXME: This is probably not correct for now */ plic0: interrupt-controller@c000000 { + #address-cells = <2>; #interrupt-cells = <1>; interrupt-controller; compatible = "riscv,plic0"; diff --git a/firmware/sections.lds b/firmware/sections.lds index cbaaa82..268a1e1 100644 --- a/firmware/sections.lds +++ b/firmware/sections.lds @@ -1,7 +1,7 @@ MEMORY { - FLASH (rx) : ORIGIN = 0x80000000, LENGTH = 0x001000 /* entire flash, 4 MiB */ - RAM (xrw) : ORIGIN = 0x80001000, LENGTH = 0x003000 /* 1 KB */ + FLASH (rx) : ORIGIN = 0x80000000, LENGTH = 0x001000 + RAM (xrw) : ORIGIN = 0x80001000, LENGTH = 0x003000 } SECTIONS {