diff --git a/src/components/topdown/topdown.c b/src/components/topdown/topdown.c
index da5b50af3..977d43bcc 100644
--- a/src/components/topdown/topdown.c
+++ b/src/components/topdown/topdown.c
@@ -205,10 +205,35 @@ _topdown_init_component(int cidx)
 		/* The model id can be found in Table 2-1 of the */
 		/* IA-32 Architectures Software Developer’s Manual */
 
-		/* hybrid machines */
-		case 0xb7:	/* RaptorLake-S/HX */
-		case 0xba:	/* RaptorLake */
-		case 0xbf:	/* RaptorLake */
+		/* homogeneous machines that do not support l2 TMA */
+		case 0x6a:	/* IceLake 3rd gen Xeon */
+		case 0x6c:	/* IceLake 3rd gen Xeon */
+		case 0x7d:	/* IceLake 10th gen Core */
+		case 0x7e:	/* IceLake 10th gen Core */
+		case 0x8c:	/* TigerLake 11th gen Core */
+		case 0x8d:	/* TigerLake 11th gen Core */
+		case 0xa7:	/* RocketLake 11th gen Core */
+			required_core_type = INTEL_CORE_TYPE_HOMOGENEOUS;
+			supports_l2 = 0;
+			break;
+
+		/* homogeneous machines that support l2 TMA */
+		case 0x8f:	/* SapphireRapids 4th gen Xeon */
+		case 0xcf:	/* EmeraldRapids 5th gen Xeon */
+			required_core_type = INTEL_CORE_TYPE_HOMOGENEOUS;
+			supports_l2 = 1;
+			break;
+
+		/* hybrid machines that support l2 TMA and are locked to the P-core */
+		case 0xaa:	/* MeteorLake Core Ultra 7 hybrid */
+		case 0xad:	/* GraniteRapids 6th gen Xeon P-core */
+		case 0xae:	/* GraniteRapids 6th gen Xeon P-core */
+		case 0x97:	/* AlderLake 12th gen Core hybrid */
+		case 0x9a:	/* AlderLake 12th gen Core hybrid */
+		case 0xb7:	/* RaptorLake-S/HX 13th gen Core hybrid */
+		case 0xba:	/* RaptorLake 13th gen Core hybrid */
+		case 0xbd:	/* LunarLake Series 2 Core Ultra hybrid */
+		case 0xbf:	/* RaptorLake 13th gen Core hybrid */
 			required_core_type = INTEL_CORE_TYPE_PERFORMANCE;
 			supports_l2 = 1;
 			break;