Bone_JTAG_pg1.sch

v 20110115 2
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DRAWN BY: 
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REVISION:
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author=Tom King
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BeagleBone Expansion
Connector P9
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T 4700 16350 8 10 0 0 0 0 1
net=GND:1
]
N 4500 16600 4800 16600 4
C 6400 16300 1 0 0 EMBEDDEDgnd-1.sym
[
P 6500 16400 6500 16600 1 0 1
{
T 6558 16461 5 4 0 1 0 0 1
pintype=pwr
T 6558 16461 5 4 0 1 0 0 1
pinlabel=1
T 6558 16461 5 4 0 0 0 0 1
pinseq=1
T 6558 16461 5 4 0 1 0 0 1
pinnumber=1
}
L 6400 16400 6600 16400 3 0 0 0 -1 -1
L 6455 16350 6545 16350 3 0 0 0 -1 -1
L 6480 16310 6520 16310 3 0 0 0 -1 -1
T 6700 16350 8 10 0 0 0 0 1
net=GND:1
]
N 6200 16600 6500 16600 4
C 4500 16100 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 16100 4300 16100 3 0 0 0 -1 -1
L 3700 16200 3800 16100 3 0 0 0 -1 -1
L 3800 16300 3700 16200 3 0 0 0 -1 -1
L 4300 16300 3800 16300 3 0 0 0 -1 -1
L 4300 16300 4300 16100 3 0 0 0 -1 -1
P 4500 16200 4300 16200 1 0 0
{
T 4250 16150 5 6 0 1 0 6 1
pinnumber=1
T 4250 16150 5 6 0 0 0 6 1
pinseq=1
}
T 4400 16400 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 16400 5 10 0 0 0 6 1
device=OUTPUT
T 3600 16100 5 10 1 1 0 6 1
value=GPIO1_6
T 4500 16100 5 10 0 1 180 6 1
net=GPMC_AD6:1
}
C 4500 15700 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 15800 4300 15800 1 0 0
{
T 4250 15750 5 6 0 0 0 6 1
pinseq=1
T 4250 15750 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 15900 4300 15700 3 0 0 0 -1 -1
L 4300 15900 3800 15900 3 0 0 0 -1 -1
L 3800 15900 3700 15800 3 0 0 0 -1 -1
L 3700 15800 3800 15700 3 0 0 0 -1 -1
L 3800 15700 4300 15700 3 0 0 0 -1 -1
T 4400 16000 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 16000 5 10 0 0 0 6 1
device=OUTPUT
T 3600 15700 5 10 1 1 0 6 1
value=GPIO1_2
T 4500 15700 5 10 0 1 180 6 1
net=GPMC_AD2:1
}
C 4500 14500 1 0 1 EMBEDDEDoutput-1.sym
[
P 4500 14600 4300 14600 1 0 0
{
T 4250 14550 5 6 0 0 0 6 1
pinseq=1
T 4250 14550 5 6 0 1 0 6 1
pinnumber=1
}
L 4300 14700 4300 14500 3 0 0 0 -1 -1
L 4300 14700 3800 14700 3 0 0 0 -1 -1
L 3800 14700 3700 14600 3 0 0 0 -1 -1
L 3700 14600 3800 14500 3 0 0 0 -1 -1
L 3800 14500 4300 14500 3 0 0 0 -1 -1
T 4400 14800 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 14800 5 10 0 0 0 6 1
device=OUTPUT
T 3600 14500 5 10 1 1 0 6 1
value=PRU0_15_O
T 4500 14500 5 10 0 1 180 6 1
net=GPMC_AD13:1
}
C 4500 13700 1 0 1 EMBEDDEDoutput-1.sym
[
L 3800 13700 4300 13700 3 0 0 0 -1 -1
L 3700 13800 3800 13700 3 0 0 0 -1 -1
L 3800 13900 3700 13800 3 0 0 0 -1 -1
L 4300 13900 3800 13900 3 0 0 0 -1 -1
L 4300 13900 4300 13700 3 0 0 0 -1 -1
P 4500 13800 4300 13800 1 0 0
{
T 4250 13750 5 6 0 1 0 6 1
pinnumber=1
T 4250 13750 5 6 0 0 0 6 1
pinseq=1
}
T 4400 14000 5 10 0 0 0 6 1
device=OUTPUT
]
{
T 4400 14000 5 10 0 0 0 6 1
device=OUTPUT
T 3600 13700 5 10 1 1 0 6 1
value=GPIO1_15
T 4500 13700 5 10 0 1 180 6 1
net=GPMC_AD15:1
}
C 6500 16100 1 0 0 EMBEDDEDoutput-1.sym
[
P 6500 16200 6700 16200 1 0 0
{
T 6750 16150 5 6 0 0 0 0 1
pinseq=1
T 6750 16150 5 6 0 1 0 0 1
pinnumber=1
}
L 6700 16300 6700 16100 3 0 0 0 -1 -1
L 6700 16300 7200 16300 3 0 0 0 -1 -1
L 7200 16300 7300 16200 3 0 0 0 -1 -1
L 7300 16200 7200 16100 3 0 0 0 -1 -1
L 7200 16100 6700 16100 3 0 0 0 -1 -1
T 6600 16400 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 16400 5 10 0 0 0 0 1
device=OUTPUT
T 7400 16100 5 10 1 1 0 0 1
value=GPIO1_7
T 6500 16100 5 10 0 1 180 0 1
net=GPMC_AD7:1
}
C 6500 15700 1 0 0 EMBEDDEDoutput-1.sym
[
P 6500 15800 6700 15800 1 0 0
{
T 6750 15750 5 6 0 0 0 0 1
pinseq=1
T 6750 15750 5 6 0 1 0 0 1
pinnumber=1
}
L 6700 15900 6700 15700 3 0 0 0 -1 -1
L 6700 15900 7200 15900 3 0 0 0 -1 -1
L 7200 15900 7300 15800 3 0 0 0 -1 -1
L 7300 15800 7200 15700 3 0 0 0 -1 -1
L 7200 15700 6700 15700 3 0 0 0 -1 -1
T 6600 16000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 16000 5 10 0 0 0 0 1
device=OUTPUT
T 7400 15700 5 10 1 1 0 0 1
value=GPIO1_3
T 6500 15700 5 10 0 1 180 0 1
net=GPMC_AD3:1
}
C 6500 14500 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 14500 6700 14500 3 0 0 0 -1 -1
L 7300 14600 7200 14500 3 0 0 0 -1 -1
L 7200 14700 7300 14600 3 0 0 0 -1 -1
L 6700 14700 7200 14700 3 0 0 0 -1 -1
L 6700 14700 6700 14500 3 0 0 0 -1 -1
P 6500 14600 6700 14600 1 0 0
{
T 6750 14550 5 6 0 1 0 0 1
pinnumber=1
T 6750 14550 5 6 0 0 0 0 1
pinseq=1
}
T 6600 14800 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 14800 5 10 0 0 0 0 1
device=OUTPUT
T 7400 14500 5 10 1 1 0 0 1
value=PRU0_14_ O
T 6500 14500 5 10 0 1 180 0 1
net=GPMC_AD12:1
}
C 6500 13700 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 13700 6700 13700 3 0 0 0 -1 -1
L 7300 13800 7200 13700 3 0 0 0 -1 -1
L 7200 13900 7300 13800 3 0 0 0 -1 -1
L 6700 13900 7200 13900 3 0 0 0 -1 -1
L 6700 13900 6700 13700 3 0 0 0 -1 -1
P 6500 13800 6700 13800 1 0 0
{
T 6750 13750 5 6 0 1 0 0 1
pinnumber=1
T 6750 13750 5 6 0 0 0 0 1
pinseq=1
}
T 6600 14000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 14000 5 10 0 0 0 0 1
device=OUTPUT
T 7400 13700 5 10 1 1 0 0 1
value=GPIO1_14
T 6500 13700 5 10 0 1 180 0 1
net=GPMC_AD14:1
}
C 6500 11700 1 0 0 EMBEDDEDoutput-1.sym
[
L 7200 11700 6700 11700 3 0 0 0 -1 -1
L 7300 11800 7200 11700 3 0 0 0 -1 -1
L 7200 11900 7300 11800 3 0 0 0 -1 -1
L 6700 11900 7200 11900 3 0 0 0 -1 -1
L 6700 11900 6700 11700 3 0 0 0 -1 -1
P 6500 11800 6700 11800 1 0 0
{
T 6750 11750 5 6 0 1 0 0 1
pinnumber=1
T 6750 11750 5 6 0 0 0 0 1
pinseq=1
}
T 6600 12000 5 10 0 0 0 0 1
device=OUTPUT
]
{
T 6600 12000 5 10 0 1 0 0 1
device=OUTPUT
T 7400 11700 5 10 1 1 0 0 1
value=PRU1_16_I
T 6500 11700 5 10 0 1 180 0 1
net=GPMC_CSN0:1
}
N 4500 16200 4800 16200 4
N 4500 15800 4800 15800 4
N 4500 14600 4800 14600 4
N 4500 13800 4800 13800 4
N 6200 16200 6500 16200 4
N 6200 15800 6500 15800 4
N 6200 14600 6500 14600 4
N 6200 13800 6500 13800 4
N 6200 11800 6500 11800 4
N 14900 15800 15200 15800 4
N 16600 15800 16900 15800 4
C 16700 15800 1 0 0 EMBEDDED5V-plus-1.sym
[
T 16775 16050 9 8 1 0 0 0 1
+5V
T 17000 15800 8 8 0 0 0 0 1
net=+5V:1
P 16900 15800 16900 16000 1 0 0
{
T 16950 15850 5 6 0 1 0 0 1
pinnumber=1
T 16950 15850 5 6 0 0 0 0 1
pinseq=1
T 16950 15850 5 6 0 1 0 0 1
pinlabel=1
T 16950 15850 5 6 0 1 0 0 1
pintype=pwr
}
L 16750 16000 17050 16000 3 0 0 0 -1 -1
]
C 14800 16300 1 0 0 EMBEDDEDgnd-1.sym
[
T 15100 16350 8 10 0 0 0 0 1
net=GND:1
L 14880 16310 14920 16310 3 0 0 0 -1 -1
L 14855 16350 14945 16350 3 0 0 0 -1 -1
L 14800 16400 15000 16400 3 0 0 0 -1 -1
P 14900 16400 14900 16600 1 0 1
{
T 14958 16461 5 4 0 1 0 0 1
pintype=pwr
T 14958 16461 5 4 0 1 0 0 1
pinlabel=1
T 14958 16461 5 4 0 0 0 0 1
pinseq=1
T 14958 16461 5 4 0 1 0 0 1
pinnumber=1
}
]
C 16800 16300 1 0 0 EMBEDDEDgnd-1.sym
[
T 17100 16350 8 10 0 0 0 0 1
net=GND:1
L 16880 16310 16920 16310 3 0 0 0 -1 -1
L 16855 16350 16945 16350 3 0 0 0 -1 -1
L 16800 16400 17000 16400 3 0 0 0 -1 -1
P 16900 16400 16900 16600 1 0 1
{
T 16958 16461 5 4 0 1 0 0 1
pintype=pwr
T 16958 16461 5 4 0 1 0 0 1
pinlabel=1
T 16958 16461 5 4 0 0 0 0 1
pinseq=1
T 16958 16461 5 4 0 1 0 0 1
pinnumber=1
}
]
N 14900 16600 15200 16600 4
N 16600 16600 16900 16600 4
C 14800 7500 1 0 0 EMBEDDEDgnd-1.sym
[
T 15100 7550 8 10 0 0 0 0 1
net=GND:1
P 14900 7600 14900 7800 1 0 1
{
T 14958 7661 5 4 0 1 0 0 1
pinnumber=1
T 14958 7661 5 4 0 0 0 0 1
pinseq=1
T 14958 7661 5 4 0 1 0 0 1
pinlabel=1
T 14958 7661 5 4 0 1 0 0 1
pintype=pwr
}
L 14800 7600 15000 7600 3 0 0 0 -1 -1
L 14855 7550 14945 7550 3 0 0 0 -1 -1
L 14880 7510 14920 7510 3 0 0 0 -1 -1
]
C 16800 7500 1 0 0 EMBEDDEDgnd-1.sym
[
T 17100 7550 8 10 0 0 0 0 1
net=GND:1
L 16880 7510 16920 7510 3 0 0 0 -1 -1
L 16855 7550 16945 7550 3 0 0 0 -1 -1
L 16800 7600 17000 7600 3 0 0 0 -1 -1
P 16900 7600 16900 7800 1 0 1
{
T 16958 7661 5 4 0 1 0 0 1
pintype=pwr
T 16958 7661 5 4 0 1 0 0 1
pinlabel=1
T 16958 7661 5 4 0 0 0 0 1
pinseq=1
T 16958 7661 5 4 0 1 0 0 1
pinnumber=1
}
]
N 15200 8200 14900 8200 4
N 14900 8200 14900 7800 4
N 16600 8200 16900 8200 4
N 16900 8200 16900 7800 4
N 15200 7800 14900 7800 4
N 16900 7800 16600 7800 4
C 13200 6800 1 0 0 EMBEDDED3.3V-plus-1.sym
[
L 13250 7000 13550 7000 3 0 0 0 -1 -1
P 13400 6800 13400 7000 1 0 0
{
T 13450 6850 5 6 0 1 0 0 1
pinnumber=1
T 13450 6850 5 6 0 0 0 0 1
pinseq=1
T 13450 6850 5 6 0 1 0 0 1
pinlabel=1
T 13450 6850 5 6 0 1 0 0 1
pintype=pwr
}
T 13500 6800 8 8 0 0 0 0 1
net=+3.3V:1
T 13275 7050 9 8 1 0 0 0 1
+3.3V
]
N 11400 5000 11100 5000 4
C 14000 6800 1 90 1 EMBEDDEDresistor-1.sym
[
L 13800 6200 14000 6300 3 0 0 0 -1 -1
L 14000 6300 13800 6400 3 0 0 0 -1 -1
L 13800 6400 14000 6500 3 0 0 0 -1 -1
L 14000 6500 13800 6600 3 0 0 0 -1 -1
L 13800 6200 14000 6100 3 0 0 0 -1 -1
L 14000 6100 13900 6050 3 0 0 0 -1 -1
P 13900 5900 13900 6050 1 0 0
{
T 13850 6000 5 8 0 1 90 6 1
pinnumber=2
T 13850 6000 5 8 0 0 90 6 1
pinseq=2
T 13850 6000 5 8 0 1 90 6 1
pinlabel=2
T 13850 6000 5 8 0 1 90 6 1
pintype=pas
}
P 13900 6800 13900 6648 1 0 0
{
T 13850 6700 5 8 0 1 90 6 1
pinnumber=1
T 13850 6700 5 8 0 0 90 6 1
pinseq=1
T 13850 6700 5 8 0 1 90 6 1
pinlabel=1
T 13850 6700 5 8 0 1 90 6 1
pintype=pas
}
L 13800 6599 13900 6650 3 0 0 0 -1 -1
T 13600 6500 5 10 0 0 90 6 1
device=RESISTOR
T 13700 6600 8 10 0 1 90 6 1
refdes=R?
T 14000 6800 8 10 0 1 90 6 1
pins=2
T 14000 6800 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 13600 6500 5 10 0 0 90 6 1
device=RESISTOR
T 13600 6300 5 10 1 1 270 6 1
refdes=R102
T 13600 5900 5 10 1 1 270 6 1
value=4.7k
T 14000 6800 5 10 0 0 180 2 1
footprint=0805
}
C 14500 6800 1 90 1 EMBEDDEDresistor-1.sym
[
L 14300 6599 14400 6650 3 0 0 0 -1 -1
P 14400 6800 14400 6648 1 0 0
{
T 14350 6700 5 8 0 1 90 6 1
pintype=pas
T 14350 6700 5 8 0 1 90 6 1
pinlabel=1
T 14350 6700 5 8 0 0 90 6 1
pinseq=1
T 14350 6700 5 8 0 1 90 6 1
pinnumber=1
}
P 14400 5900 14400 6050 1 0 0
{
T 14350 6000 5 8 0 1 90 6 1
pintype=pas
T 14350 6000 5 8 0 1 90 6 1
pinlabel=2
T 14350 6000 5 8 0 0 90 6 1
pinseq=2
T 14350 6000 5 8 0 1 90 6 1
pinnumber=2
}
L 14500 6100 14400 6050 3 0 0 0 -1 -1
L 14300 6200 14500 6100 3 0 0 0 -1 -1
L 14500 6500 14300 6600 3 0 0 0 -1 -1
L 14300 6400 14500 6500 3 0 0 0 -1 -1
L 14500 6300 14300 6400 3 0 0 0 -1 -1
L 14300 6200 14500 6300 3 0 0 0 -1 -1
T 14500 6800 8 10 0 1 90 6 1
class=DISCRETE
T 14500 6800 8 10 0 1 90 6 1
pins=2
T 14200 6600 8 10 0 1 90 6 1
refdes=R?
T 14100 6500 5 10 0 0 90 6 1
device=RESISTOR
]
{
T 14100 6500 5 10 0 0 90 6 1
device=RESISTOR
T 14100 6300 5 10 1 1 270 6 1
refdes=R101
T 14100 5900 5 10 1 1 270 6 1
value=4.7k
T 14500 6800 5 10 0 0 180 2 1
footprint=0805
}
C 10400 6800 1 90 1 EMBEDDEDresistor-1.sym
[
L 10200 6200 10400 6300 3 0 0 0 -1 -1
L 10400 6300 10200 6400 3 0 0 0 -1 -1
L 10200 6400 10400 6500 3 0 0 0 -1 -1
L 10400 6500 10200 6600 3 0 0 0 -1 -1
L 10200 6200 10400 6100 3 0 0 0 -1 -1
L 10400 6100 10300 6050 3 0 0 0 -1 -1
P 10300 5900 10300 6050 1 0 0
{
T 10250 6000 5 8 0 1 90 6 1
pinnumber=2
T 10250 6000 5 8 0 0 90 6 1
pinseq=2
T 10250 6000 5 8 0 1 90 6 1
pinlabel=2
T 10250 6000 5 8 0 1 90 6 1
pintype=pas
}
P 10300 6800 10300 6648 1 0 0
{
T 10250 6700 5 8 0 1 90 6 1
pinnumber=1
T 10250 6700 5 8 0 0 90 6 1
pinseq=1
T 10250 6700 5 8 0 1 90 6 1
pinlabel=1
T 10250 6700 5 8 0 1 90 6 1
pintype=pas
}
L 10200 6599 10300 6650 3 0 0 0 -1 -1
T 10000 6500 5 10 0 0 90 6 1
device=RESISTOR
T 10100 6600 8 10 0 1 90 6 1
refdes=R?
T 10400 6800 8 10 0 1 90 6 1
pins=2
T 10400 6800 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 10000 6500 5 10 0 0 90 6 1
device=RESISTOR
T 10000 6300 5 10 1 1 270 6 1
refdes=R103
T 10000 5900 5 10 1 1 270 6 1
value=4.7k
T 10400 6800 5 10 0 0 180 2 1
footprint=0805
}
C 9900 6800 1 90 1 EMBEDDEDresistor-1.sym
[
L 9700 6200 9900 6300 3 0 0 0 -1 -1
L 9900 6300 9700 6400 3 0 0 0 -1 -1
L 9700 6400 9900 6500 3 0 0 0 -1 -1
L 9900 6500 9700 6600 3 0 0 0 -1 -1
L 9700 6200 9900 6100 3 0 0 0 -1 -1
L 9900 6100 9800 6050 3 0 0 0 -1 -1
P 9800 5900 9800 6050 1 0 0
{
T 9750 6000 5 8 0 1 90 6 1
pinnumber=2
T 9750 6000 5 8 0 0 90 6 1
pinseq=2
T 9750 6000 5 8 0 1 90 6 1
pinlabel=2
T 9750 6000 5 8 0 1 90 6 1
pintype=pas
}
P 9800 6800 9800 6648 1 0 0
{
T 9750 6700 5 8 0 1 90 6 1
pinnumber=1
T 9750 6700 5 8 0 0 90 6 1
pinseq=1
T 9750 6700 5 8 0 1 90 6 1
pinlabel=1
T 9750 6700 5 8 0 1 90 6 1
pintype=pas
}
L 9700 6599 9800 6650 3 0 0 0 -1 -1
T 9500 6500 5 10 0 0 90 6 1
device=RESISTOR
T 9600 6600 8 10 0 1 90 6 1
refdes=R?
T 9900 6800 8 10 0 1 90 6 1
pins=2
T 9900 6800 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 9500 6500 5 10 0 0 90 6 1
device=RESISTOR
T 9500 6300 5 10 1 1 270 6 1
refdes=R104
T 9500 5900 5 10 1 1 270 6 1
value=4.7k
T 9900 6800 5 10 0 0 180 2 1
footprint=0805
}
C 9400 6800 1 90 1 EMBEDDEDresistor-1.sym
[
L 9200 6200 9400 6300 3 0 0 0 -1 -1
L 9400 6300 9200 6400 3 0 0 0 -1 -1
L 9200 6400 9400 6500 3 0 0 0 -1 -1
L 9400 6500 9200 6600 3 0 0 0 -1 -1
L 9200 6200 9400 6100 3 0 0 0 -1 -1
L 9400 6100 9300 6050 3 0 0 0 -1 -1
P 9300 5900 9300 6050 1 0 0
{
T 9250 6000 5 8 0 1 90 6 1
pinnumber=2
T 9250 6000 5 8 0 0 90 6 1
pinseq=2
T 9250 6000 5 8 0 1 90 6 1
pinlabel=2
T 9250 6000 5 8 0 1 90 6 1
pintype=pas
}
P 9300 6800 9300 6648 1 0 0
{
T 9250 6700 5 8 0 1 90 6 1
pinnumber=1
T 9250 6700 5 8 0 0 90 6 1
pinseq=1
T 9250 6700 5 8 0 1 90 6 1
pinlabel=1
T 9250 6700 5 8 0 1 90 6 1
pintype=pas
}
L 9200 6599 9300 6650 3 0 0 0 -1 -1
T 9000 6500 5 10 0 0 90 6 1
device=RESISTOR
T 9100 6600 8 10 0 1 90 6 1
refdes=R?
T 9400 6800 8 10 0 1 90 6 1
pins=2
T 9400 6800 8 10 0 1 90 6 1
class=DISCRETE
]
{
T 9000 6500 5 10 0 0 90 6 1
device=RESISTOR
T 9000 6300 5 10 1 1 270 6 1
refdes=R105
T 9000 5900 5 10 1 1 270 6 1
value=4.7k
T 9400 6800 5 10 0 0 180 2 1
footprint=0805
}
N 11400 5600 10300 5600 4
N 10300 5600 10300 5900 4
N 8900 5400 11400 5400 4
N 9800 5400 9800 5900 4
N 11400 5200 9300 5200 4
N 9300 5200 9300 5900 4
C 7500 4100 1 0 0 EMBEDDEDgnd-1.sym
[
P 7600 4200 7600 4400 1 0 1
{
T 7658 4261 5 4 0 1 0 0 1
pinnumber=1
T 7658 4261 5 4 0 0 0 0 1
pinseq=1
T 7658 4261 5 4 0 1 0 0 1
pinlabel=1
T 7658 4261 5 4 0 1 0 0 1
pintype=pwr
}
L 7500 4200 7700 4200 3 0 0 0 -1 -1
L 7555 4150 7645 4150 3 0 0 0 -1 -1
L 7580 4110 7620 4110 3 0 0 0 -1 -1
T 7800 4150 8 10 0 0 0 0 1
net=GND:1
]
N 7600 5700 7600 4400 4
N 8900 5700 10300 5700 4
N 16600 13000 17500 13000 4
{
T 16600 13000 5 10 1 1 0 0 1
netname=I2C2_SDA
}
N 14300 13000 15200 13000 4
{
T 14300 13000 5 10 1 1 0 0 1
netname=I2C2_SCL
}
N 14300 8600 15200 8600 4
C 14300 8500 1 0 1 EMBEDDEDoutput-1.sym
[
T 14200 8800 5 10 0 0 0 6 1
device=OUTPUT
L 13600 8500 14100 8500 3 0 0 0 -1 -1
L 13500 8600 13600 8500 3 0 0 0 -1 -1
L 13600 8700 13500 8600 3 0 0 0 -1 -1
L 14100 8700 13600 8700 3 0 0 0 -1 -1
L 14100 8700 14100 8500 3 0 0 0 -1 -1
P 14300 8600 14100 8600 1 0 0
{
T 14050 8550 5 6 0 0 0 6 1
pinseq=1
T 14050 8550 5 6 0 1 0 6 1
pinnumber=1
}
]
{
T 14200 8800 5 10 0 0 0 6 1
device=OUTPUT
T 13400 8500 5 10 1 1 0 6 1
value=PRU0_6
T 14300 8500 5 10 0 1 180 6 1
net=CLKOUT2:1
}
C 6000 3700 1 270 0 EMBEDDEDcapacitor-2.sym
[
L 6349 3360 6349 3460 3 0 0 0 -1 -1
L 6400 3411 6300 3411 3 0 0 0 -1 -1
A 6200 2500 700 75 30 3 0 0 0 -1 -1
L 6200 3300 6200 3500 3 0 0 0 -1 -1
L 6200 3000 6200 3200 3 0 0 0 -1 -1
L 6400 3300 6000 3300 3 0 0 0 -1 -1
P 6200 2800 6200 3000 1 0 0
{
T 6250 2950 5 8 1 1 270 0 1
pinnumber=2
T 6150 3000 5 8 0 1 270 2 1
pinseq=2
T 6200 3050 9 8 0 1 270 6 1
pinlabel=-
T 6200 3050 5 8 0 1 270 8 1
pintype=pas
}
P 6200 3700 6200 3500 1 0 0
{
T 6250 3550 5 8 1 1 270 6 1
pinnumber=1
T 6150 3500 5 8 0 1 270 8 1
pinseq=1
T 6200 3450 9 8 0 1 270 0 1
pinlabel=+
T 6200 3450 5 8 0 1 270 2 1
pintype=pas
}
T 6900 3500 5 10 0 0 270 0 1
symversion=0.1
T 7100 3500 5 10 0 0 270 0 1
numslots=0
T 7300 3500 5 10 0 0 270 0 1
description=polarized capacitor
T 6500 3500 8 10 0 1 270 0 1
refdes=C?
T 6700 3500 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
]
{
T 6700 3500 5 10 0 0 270 0 1
device=POLARIZED_CAPACITOR
T 6500 3300 5 10 1 1 0 0 1
refdes=C102
T 6500 3100 5 10 1 1 0 0 1
value=10uF 10V
T 6000 3700 5 10 0 0 0 0 1
footprint=1206_pol
}
C 14300 10500 1 0 1 EMBEDDEDoutput-1.sym
[
T 14200 10800 5 10 0 0 0 6 1
device=OUTPUT
L 13600 10500 14100 10500 3 0 0 0 -1 -1
L 13500 10600 13600 10500 3 0 0 0 -1 -1
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C 14300 10900 1 0 1 EMBEDDEDoutput-1.sym
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C 14300 11300 1 0 1 EMBEDDEDoutput-1.sym
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C 14300 11700 1 0 1 EMBEDDEDoutput-1.sym
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C 17500 10900 1 0 0 EMBEDDEDoutput-1.sym
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{
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C 17500 8500 1 0 0 EMBEDDEDoutput-1.sym
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C 17500 12100 1 0 0 EMBEDDEDoutput-1.sym
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C 4500 7700 1 0 1 EMBEDDEDoutput-1.sym
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{
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C 4500 8100 1 0 1 EMBEDDEDoutput-1.sym
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C 4500 8500 1 0 1 EMBEDDEDoutput-1.sym
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C 4500 8900 1 0 1 EMBEDDEDoutput-1.sym
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C 6500 7700 1 0 0 EMBEDDEDoutput-1.sym
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{
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C 6500 8100 1 0 0 EMBEDDEDoutput-1.sym
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C 6500 8500 1 0 0 EMBEDDEDoutput-1.sym
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C 6500 8900 1 0 0 EMBEDDEDoutput-1.sym
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{
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{
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C 6500 11300 1 0 0 EMBEDDEDoutput-1.sym
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{
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{
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C 6500 10900 1 0 0 EMBEDDEDoutput-1.sym
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T 6600 11200 5 10 0 0 0 0 1
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{
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{
T 6600 11200 5 10 0 1 0 0 1
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N 6200 9000 6500 9000 4
N 6200 8600 6500 8600 4
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N 4500 9000 4800 9000 4
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C 14300 12100 1 0 1 EMBEDDEDoutput-1.sym
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{
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T 14200 12400 5 10 0 0 0 6 1
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{
T 14200 12400 5 10 0 0 0 6 1
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T 13400 12100 5 10 1 1 0 6 1
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T 14300 12100 5 10 0 1 180 6 1
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C 14300 13700 1 0 1 EMBEDDEDoutput-1.sym
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{
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{
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N 14300 13800 15200 13800 4
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C 4500 9300 1 0 1 EMBEDDEDoutput-1.sym
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{
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C 6500 9300 1 0 0 EMBEDDEDoutput-1.sym
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{
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C 7600 5000 1 0 0 EMBEDDEDswitch-dip2-1.sym
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{
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T 7800 5000 9 10 1 0 0 0 1
SW DIP-2
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{
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0.97
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{
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{
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C 4500 10500 1 0 1 EMBEDDEDoutput-1.sym
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{
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N 4500 10600 4800 10600 4
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