From 42eb228095bc587de328a5d387d0f8ed8ee83a12 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sun, 6 Aug 2023 23:41:18 -0700
Subject: [PATCH 01/10] added `verilator --xml-only` support

---
 doc/edam/api.rst                                  |  2 +-
 edalize/tools/verilator.py                        |  8 ++++----
 edalize/verilator.py                              |  8 ++++----
 tests/test_verilator.py                           | 10 ++++++++++
 tests/test_verilator/xml-only/config.mk           |  6 ++++++
 tests/test_verilator/xml-only/test_verilator_0.vc | 12 ++++++++++++
 6 files changed, 37 insertions(+), 9 deletions(-)
 create mode 100644 tests/test_verilator/xml-only/config.mk
 create mode 100644 tests/test_verilator/xml-only/test_verilator_0.vc

diff --git a/doc/edam/api.rst b/doc/edam/api.rst
index bb945dfc8..aa51c9bd1 100644
--- a/doc/edam/api.rst
+++ b/doc/edam/api.rst
@@ -264,7 +264,7 @@ Field Name        Type                  Description
 cli_parser        String                If `cli_parser` is set to managed, Edalize will parse all command-line options.
                                         Otherwise, they are sent directly to the compiled simulation model.
 libs              List of String        Extra options to be passed as -LDFLAGS when linking the C++ testbench
-mode              String                *cc* runs Verilator in regular C++ mode. *sc* runs in SystemC mode. *lint-only* only performs linting on the Verilog code
+mode              String                *cc* runs Verilator in regular C++ mode. *sc* runs in SystemC mode. *lint-only* only performs linting on the Verilog code. *xml-only* only creates XML output
 verilator_options List of String        Extra options to be passed when verilating model
 ================= ===================== ===========
 
diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 92fc306b2..76cd14b98 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -23,7 +23,7 @@ class Verilator(Edatool):
         },
         "mode": {
             "type": "str",
-            "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches or *lint-only* to only perform linting on the Verilog code",
+            "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches, *lint-only* to only perform linting on the Verilog code, or *xml-only* to only create XML output"
         },
         "verilator_options": {
             "type": "str",
@@ -44,7 +44,7 @@ def setup(self, edam):
         vc = []
         vc.append("--Mdir .")
 
-        modes = ["sc", "cc", "lint-only"]
+        modes = ["sc", "cc", "lint-only", "xml-only"]
 
         # Default to cc mode if not specified
         mode = self.tool_options.get("mode", "cc")
@@ -123,7 +123,7 @@ def setup(self, edam):
             depfiles,
         )
 
-        if mode == "lint-only":
+        if mode in ["lint-only", "xml-only"]:
             commands.set_default_target(mk_file)
         else:
             commands.add(
@@ -150,6 +150,6 @@ def run(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] == "lint-only":
+        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
             return
         return ("./V" + self.toplevel, self.args, self.work_root)
diff --git a/edalize/verilator.py b/edalize/verilator.py
index e1dafe038..b47e37edb 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -50,7 +50,7 @@ def get_doc(cls, api_ver):
                     {
                         "name": "mode",
                         "type": "String",
-                        "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches or *lint-only* to only perform linting on the Verilog code",
+                        "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches, *lint-only* to only perform linting on the Verilog code, or *xml-only* to only create XML output",
                     },
                     {
                         "name": "cli_parser",
@@ -117,7 +117,7 @@ def _write_config_files(self):
 
         with open(os.path.join(self.work_root, self.verilator_file), "w") as f:
             f.write("--Mdir .\n")
-            modes = ["sc", "cc", "lint-only"]
+            modes = ["sc", "cc", "lint-only", "xml-only"]
 
             # Default to cc mode if not specified
             if not "mode" in self.tool_options:
@@ -206,7 +206,7 @@ def build_main(self):
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
         args = []
-        if self.tool_options["mode"] == "lint-only":
+        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
             args.append("V" + self.toplevel + ".mk")
         self._run_tool("make", args, quiet=True)
 
@@ -223,7 +223,7 @@ def run_main(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] == "lint-only":
+        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
             return
         logger.info("Running simulation")
         self._run_tool("./V" + self.toplevel, self.args)
diff --git a/tests/test_verilator.py b/tests/test_verilator.py
index f982c9526..ff7e1cff1 100644
--- a/tests/test_verilator.py
+++ b/tests/test_verilator.py
@@ -44,3 +44,13 @@ def test_verilator_lint_only(make_edalize_test):
 
     tf.compare_files(["Makefile"])
     tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
+
+
+def test_verilator_xml_only(make_edalize_test):
+    mode = "xml-only"
+    tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
+
+    tf.backend.configure()
+
+    tf.compare_files(["Makefile"])
+    tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
diff --git a/tests/test_verilator/xml-only/config.mk b/tests/test_verilator/xml-only/config.mk
new file mode 100644
index 000000000..90fac0acb
--- /dev/null
+++ b/tests/test_verilator/xml-only/config.mk
@@ -0,0 +1,6 @@
+#Auto generated by Edalize
+
+TOP_MODULE        := top_module
+VC_FILE           := test_verilator_0.vc
+VERILATOR_OPTIONS := 
+MAKE_OPTIONS      := 
diff --git a/tests/test_verilator/xml-only/test_verilator_0.vc b/tests/test_verilator/xml-only/test_verilator_0.vc
new file mode 100644
index 000000000..f79ab39c1
--- /dev/null
+++ b/tests/test_verilator/xml-only/test_verilator_0.vc
@@ -0,0 +1,12 @@
+--Mdir .
+--xml-only
++incdir+.
+-CFLAGS -I.
+sv_file.sv
+vlog_file.v
+vlog05_file.v
+another_sv_file.sv
+--top-module top_module
+--exe
+c_file.c
+cpp_file.cpp

From c9458dfe4046f890116b9787185974c55f39ed3d Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Mon, 7 Aug 2023 14:07:15 -0700
Subject: [PATCH 02/10] added remaining verilator modes

---
 doc/edam/api.rst                              |  2 +-
 edalize/tools/verilator.py                    |  8 ++---
 edalize/verilator.py                          | 17 +++++++----
 tests/test_verilator.py                       | 30 +++++++++++++++++++
 tests/test_verilator/binary/config.mk         |  6 ++++
 .../test_verilator/binary/test_verilator_0.vc | 11 +++++++
 tests/test_verilator/dpi-hdr-only/config.mk   |  6 ++++
 .../dpi-hdr-only/test_verilator_0.vc          | 11 +++++++
 .../lint-only/test_verilator_0.vc             |  1 -
 tests/test_verilator/preprocess/config.mk     |  6 ++++
 .../preprocess/test_verilator_0.vc            | 11 +++++++
 .../xml-only/test_verilator_0.vc              |  1 -
 12 files changed, 97 insertions(+), 13 deletions(-)
 create mode 100644 tests/test_verilator/binary/config.mk
 create mode 100644 tests/test_verilator/binary/test_verilator_0.vc
 create mode 100644 tests/test_verilator/dpi-hdr-only/config.mk
 create mode 100644 tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
 create mode 100644 tests/test_verilator/preprocess/config.mk
 create mode 100644 tests/test_verilator/preprocess/test_verilator_0.vc

diff --git a/doc/edam/api.rst b/doc/edam/api.rst
index aa51c9bd1..e1959b3a0 100644
--- a/doc/edam/api.rst
+++ b/doc/edam/api.rst
@@ -264,7 +264,7 @@ Field Name        Type                  Description
 cli_parser        String                If `cli_parser` is set to managed, Edalize will parse all command-line options.
                                         Otherwise, they are sent directly to the compiled simulation model.
 libs              List of String        Extra options to be passed as -LDFLAGS when linking the C++ testbench
-mode              String                *cc* runs Verilator in regular C++ mode. *sc* runs in SystemC mode. *lint-only* only performs linting on the Verilog code. *xml-only* only creates XML output
+mode              String                Selects compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html
 verilator_options List of String        Extra options to be passed when verilating model
 ================= ===================== ===========
 
diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 76cd14b98..041260474 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -23,7 +23,7 @@ class Verilator(Edatool):
         },
         "mode": {
             "type": "str",
-            "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches, *lint-only* to only perform linting on the Verilog code, or *xml-only* to only create XML output"
+            "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
         },
         "verilator_options": {
             "type": "str",
@@ -44,7 +44,7 @@ def setup(self, edam):
         vc = []
         vc.append("--Mdir .")
 
-        modes = ["sc", "cc", "lint-only", "xml-only"]
+        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess", "sc", "xml-only"]
 
         # Default to cc mode if not specified
         mode = self.tool_options.get("mode", "cc")
@@ -123,7 +123,7 @@ def setup(self, edam):
             depfiles,
         )
 
-        if mode in ["lint-only", "xml-only"]:
+        if mode in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
             commands.set_default_target(mk_file)
         else:
             commands.add(
@@ -150,6 +150,6 @@ def run(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
             return
         return ("./V" + self.toplevel, self.args, self.work_root)
diff --git a/edalize/verilator.py b/edalize/verilator.py
index b47e37edb..3a2de50fc 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -50,7 +50,7 @@ def get_doc(cls, api_ver):
                     {
                         "name": "mode",
                         "type": "String",
-                        "desc": "Select compilation mode. Legal values are *cc* for C++ testbenches, *sc* for SystemC testbenches, *lint-only* to only perform linting on the Verilog code, or *xml-only* to only create XML output",
+                        "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
                     },
                     {
                         "name": "cli_parser",
@@ -117,14 +117,17 @@ def _write_config_files(self):
 
         with open(os.path.join(self.work_root, self.verilator_file), "w") as f:
             f.write("--Mdir .\n")
-            modes = ["sc", "cc", "lint-only", "xml-only"]
+            modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess", "sc", "xml-only"]
 
             # Default to cc mode if not specified
             if not "mode" in self.tool_options:
                 self.tool_options["mode"] = "cc"
 
             if self.tool_options["mode"] in modes:
-                f.write("--" + self.tool_options["mode"] + "\n")
+                if self.tool_options["mode"] == "preprocess":
+                    f.write("-E\n")
+                else:
+                    f.write("--" + self.tool_options["mode"] + "\n")
             else:
                 _s = "Illegal verilator mode {}. Allowed values are {}"
                 raise RuntimeError(
@@ -155,7 +158,9 @@ def _write_config_files(self):
                 f.write("\n".join(vlt_files) + "\n")
             f.write("\n".join(vlog_files) + "\n")
             f.write("--top-module {}\n".format(self.toplevel))
-            if str(self.tool_options.get("exe")).lower() != "false":
+            add_exe = (str(self.tool_options.get("exe")).lower() != "false") \
+                and (self.tool_options["mode"] not in ["binary", "dpi-hdr-only", "lint-only", "preprocess", "xml-only"])
+            if add_exe:
                 f.write("--exe\n")
             f.write("\n".join(opt_c_files))
             f.write("\n")
@@ -206,7 +211,7 @@ def build_main(self):
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
         args = []
-        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
             args.append("V" + self.toplevel + ".mk")
         self._run_tool("make", args, quiet=True)
 
@@ -223,7 +228,7 @@ def run_main(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] in ["lint-only", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
             return
         logger.info("Running simulation")
         self._run_tool("./V" + self.toplevel, self.args)
diff --git a/tests/test_verilator.py b/tests/test_verilator.py
index ff7e1cff1..1d66b631a 100644
--- a/tests/test_verilator.py
+++ b/tests/test_verilator.py
@@ -46,6 +46,36 @@ def test_verilator_lint_only(make_edalize_test):
     tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
 
 
+def test_verilator_binary(make_edalize_test):
+    mode = "binary"
+    tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
+
+    tf.backend.configure()
+
+    tf.compare_files(["Makefile"])
+    tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
+
+
+def test_verilator_dpi_hdr_only(make_edalize_test):
+    mode = "dpi-hdr-only"
+    tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
+
+    tf.backend.configure()
+
+    tf.compare_files(["Makefile"])
+    tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
+
+
+def test_verilator_preprocess(make_edalize_test):
+    mode = "preprocess"
+    tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
+
+    tf.backend.configure()
+
+    tf.compare_files(["Makefile"])
+    tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
+
+
 def test_verilator_xml_only(make_edalize_test):
     mode = "xml-only"
     tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
diff --git a/tests/test_verilator/binary/config.mk b/tests/test_verilator/binary/config.mk
new file mode 100644
index 000000000..90fac0acb
--- /dev/null
+++ b/tests/test_verilator/binary/config.mk
@@ -0,0 +1,6 @@
+#Auto generated by Edalize
+
+TOP_MODULE        := top_module
+VC_FILE           := test_verilator_0.vc
+VERILATOR_OPTIONS := 
+MAKE_OPTIONS      := 
diff --git a/tests/test_verilator/binary/test_verilator_0.vc b/tests/test_verilator/binary/test_verilator_0.vc
new file mode 100644
index 000000000..9d0be4827
--- /dev/null
+++ b/tests/test_verilator/binary/test_verilator_0.vc
@@ -0,0 +1,11 @@
+--Mdir .
+--binary
++incdir+.
+-CFLAGS -I.
+sv_file.sv
+vlog_file.v
+vlog05_file.v
+another_sv_file.sv
+--top-module top_module
+c_file.c
+cpp_file.cpp
diff --git a/tests/test_verilator/dpi-hdr-only/config.mk b/tests/test_verilator/dpi-hdr-only/config.mk
new file mode 100644
index 000000000..90fac0acb
--- /dev/null
+++ b/tests/test_verilator/dpi-hdr-only/config.mk
@@ -0,0 +1,6 @@
+#Auto generated by Edalize
+
+TOP_MODULE        := top_module
+VC_FILE           := test_verilator_0.vc
+VERILATOR_OPTIONS := 
+MAKE_OPTIONS      := 
diff --git a/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc b/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
new file mode 100644
index 000000000..68dbc17fd
--- /dev/null
+++ b/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
@@ -0,0 +1,11 @@
+--Mdir .
+--dpi-hdr-only
++incdir+.
+-CFLAGS -I.
+sv_file.sv
+vlog_file.v
+vlog05_file.v
+another_sv_file.sv
+--top-module top_module
+c_file.c
+cpp_file.cpp
diff --git a/tests/test_verilator/lint-only/test_verilator_0.vc b/tests/test_verilator/lint-only/test_verilator_0.vc
index 38397821d..25fa51620 100644
--- a/tests/test_verilator/lint-only/test_verilator_0.vc
+++ b/tests/test_verilator/lint-only/test_verilator_0.vc
@@ -7,6 +7,5 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
---exe
 c_file.c
 cpp_file.cpp
diff --git a/tests/test_verilator/preprocess/config.mk b/tests/test_verilator/preprocess/config.mk
new file mode 100644
index 000000000..90fac0acb
--- /dev/null
+++ b/tests/test_verilator/preprocess/config.mk
@@ -0,0 +1,6 @@
+#Auto generated by Edalize
+
+TOP_MODULE        := top_module
+VC_FILE           := test_verilator_0.vc
+VERILATOR_OPTIONS := 
+MAKE_OPTIONS      := 
diff --git a/tests/test_verilator/preprocess/test_verilator_0.vc b/tests/test_verilator/preprocess/test_verilator_0.vc
new file mode 100644
index 000000000..99e7989f4
--- /dev/null
+++ b/tests/test_verilator/preprocess/test_verilator_0.vc
@@ -0,0 +1,11 @@
+--Mdir .
+-E
++incdir+.
+-CFLAGS -I.
+sv_file.sv
+vlog_file.v
+vlog05_file.v
+another_sv_file.sv
+--top-module top_module
+c_file.c
+cpp_file.cpp
diff --git a/tests/test_verilator/xml-only/test_verilator_0.vc b/tests/test_verilator/xml-only/test_verilator_0.vc
index f79ab39c1..5a591b436 100644
--- a/tests/test_verilator/xml-only/test_verilator_0.vc
+++ b/tests/test_verilator/xml-only/test_verilator_0.vc
@@ -7,6 +7,5 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
---exe
 c_file.c
 cpp_file.cpp

From 9440335ed563a7aa5ae9ff104c74b43ec577a6c5 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Tue, 8 Aug 2023 12:44:28 -0700
Subject: [PATCH 03/10] renamed mode preprocess to preprocess-only

---
 doc/edam/api.rst                                     |  2 +-
 edalize/tools/verilator.py                           |  8 ++++----
 edalize/verilator.py                                 | 12 ++++++------
 tests/test_verilator.py                              |  4 ++--
 .../{preprocess => preprocess-only}/config.mk        |  0
 .../test_verilator_0.vc                              |  0
 6 files changed, 13 insertions(+), 13 deletions(-)
 rename tests/test_verilator/{preprocess => preprocess-only}/config.mk (100%)
 rename tests/test_verilator/{preprocess => preprocess-only}/test_verilator_0.vc (100%)

diff --git a/doc/edam/api.rst b/doc/edam/api.rst
index e1959b3a0..9718bed9a 100644
--- a/doc/edam/api.rst
+++ b/doc/edam/api.rst
@@ -264,7 +264,7 @@ Field Name        Type                  Description
 cli_parser        String                If `cli_parser` is set to managed, Edalize will parse all command-line options.
                                         Otherwise, they are sent directly to the compiled simulation model.
 libs              List of String        Extra options to be passed as -LDFLAGS when linking the C++ testbench
-mode              String                Selects compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html
+mode              String                Selects compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html
 verilator_options List of String        Extra options to be passed when verilating model
 ================= ===================== ===========
 
diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 041260474..2614d98eb 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -23,7 +23,7 @@ class Verilator(Edatool):
         },
         "mode": {
             "type": "str",
-            "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
+            "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
         },
         "verilator_options": {
             "type": "str",
@@ -44,7 +44,7 @@ def setup(self, edam):
         vc = []
         vc.append("--Mdir .")
 
-        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess", "sc", "xml-only"]
+        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
 
         # Default to cc mode if not specified
         mode = self.tool_options.get("mode", "cc")
@@ -123,7 +123,7 @@ def setup(self, edam):
             depfiles,
         )
 
-        if mode in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
+        if mode in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             commands.set_default_target(mk_file)
         else:
             commands.add(
@@ -150,6 +150,6 @@ def run(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             return
         return ("./V" + self.toplevel, self.args, self.work_root)
diff --git a/edalize/verilator.py b/edalize/verilator.py
index 3a2de50fc..7c1e0ca9f 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -50,7 +50,7 @@ def get_doc(cls, api_ver):
                     {
                         "name": "mode",
                         "type": "String",
-                        "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
+                        "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
                     },
                     {
                         "name": "cli_parser",
@@ -117,14 +117,14 @@ def _write_config_files(self):
 
         with open(os.path.join(self.work_root, self.verilator_file), "w") as f:
             f.write("--Mdir .\n")
-            modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess", "sc", "xml-only"]
+            modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
 
             # Default to cc mode if not specified
             if not "mode" in self.tool_options:
                 self.tool_options["mode"] = "cc"
 
             if self.tool_options["mode"] in modes:
-                if self.tool_options["mode"] == "preprocess":
+                if self.tool_options["mode"] == "preprocess-only":
                     f.write("-E\n")
                 else:
                     f.write("--" + self.tool_options["mode"] + "\n")
@@ -159,7 +159,7 @@ def _write_config_files(self):
             f.write("\n".join(vlog_files) + "\n")
             f.write("--top-module {}\n".format(self.toplevel))
             add_exe = (str(self.tool_options.get("exe")).lower() != "false") \
-                and (self.tool_options["mode"] not in ["binary", "dpi-hdr-only", "lint-only", "preprocess", "xml-only"])
+                and (self.tool_options["mode"] not in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"])
             if add_exe:
                 f.write("--exe\n")
             f.write("\n".join(opt_c_files))
@@ -211,7 +211,7 @@ def build_main(self):
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
         args = []
-        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             args.append("V" + self.toplevel + ".mk")
         self._run_tool("make", args, quiet=True)
 
@@ -228,7 +228,7 @@ def run_main(self):
         # Default to cc mode if not specified
         if not "mode" in self.tool_options:
             self.tool_options["mode"] = "cc"
-        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess", "xml-only"]:
+        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             return
         logger.info("Running simulation")
         self._run_tool("./V" + self.toplevel, self.args)
diff --git a/tests/test_verilator.py b/tests/test_verilator.py
index 1d66b631a..9ba25d701 100644
--- a/tests/test_verilator.py
+++ b/tests/test_verilator.py
@@ -66,8 +66,8 @@ def test_verilator_dpi_hdr_only(make_edalize_test):
     tf.compare_files(["config.mk", tf.test_name + ".vc"], ref_subdir=mode)
 
 
-def test_verilator_preprocess(make_edalize_test):
-    mode = "preprocess"
+def test_verilator_preprocess_only(make_edalize_test):
+    mode = "preprocess-only"
     tf = make_edalize_test("verilator", param_types=[], tool_options={"mode": mode})
 
     tf.backend.configure()
diff --git a/tests/test_verilator/preprocess/config.mk b/tests/test_verilator/preprocess-only/config.mk
similarity index 100%
rename from tests/test_verilator/preprocess/config.mk
rename to tests/test_verilator/preprocess-only/config.mk
diff --git a/tests/test_verilator/preprocess/test_verilator_0.vc b/tests/test_verilator/preprocess-only/test_verilator_0.vc
similarity index 100%
rename from tests/test_verilator/preprocess/test_verilator_0.vc
rename to tests/test_verilator/preprocess-only/test_verilator_0.vc

From a8aa9995fde638a3c65bf554a71b2384afaca883 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sat, 2 Sep 2023 14:08:41 -0700
Subject: [PATCH 04/10] added verilator modes as phonies

---
 edalize/tools/verilator.py                    |  4 +-
 edalize/verilator.py                          | 44 +++++++++++++------
 tests/test_verilator/Makefile                 | 13 +++++-
 .../test_verilator/binary/test_verilator_0.vc |  2 +-
 .../dpi-hdr-only/test_verilator_0.vc          |  2 +-
 .../lint-only/test_verilator_0.vc             |  2 +-
 .../preprocess-only/test_verilator_0.vc       |  2 +-
 .../xml-only/test_verilator_0.vc              |  2 +-
 8 files changed, 49 insertions(+), 22 deletions(-)

diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 2614d98eb..0e8d4e45a 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -123,8 +123,8 @@ def setup(self, edam):
             depfiles,
         )
 
-        if mode in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
-            commands.set_default_target(mk_file)
+        if mode in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
+            commands.set_default_target(mode)
         else:
             commands.add(
                 ["make", "-f", mk_file] + self.tool_options.get("make_options", []),
diff --git a/edalize/verilator.py b/edalize/verilator.py
index 7c1e0ca9f..b2ec7aff1 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -31,9 +31,20 @@
 
 V$(TOP_MODULE): V$(TOP_MODULE).mk
 	$(MAKE) $(MAKE_OPTIONS) -f $<
-
 V$(TOP_MODULE).mk:
 	$(EDALIZE_LAUNCHER) $(VERILATOR) -f $(VC_FILE) $(VERILATOR_OPTIONS)
+
+.PHONY: binary dpi-hdr-only lint-only preprocess-only xml-only
+binary:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --binary -f $(VC_FILE) $(VERILATOR_OPTIONS)
+dpi-hdr-only:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --dpi-hdr-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
+lint-only:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --lint-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
+preprocess-only V$(TOP_MODULE).i:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) -E -f $(VC_FILE) $(VERILATOR_OPTIONS) > V$(TOP_MODULE).i
+xml-only V$(TOP_MODULE).xml:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --xml-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
 """
 
 
@@ -123,16 +134,13 @@ def _write_config_files(self):
             if not "mode" in self.tool_options:
                 self.tool_options["mode"] = "cc"
 
-            if self.tool_options["mode"] in modes:
-                if self.tool_options["mode"] == "preprocess-only":
-                    f.write("-E\n")
-                else:
-                    f.write("--" + self.tool_options["mode"] + "\n")
-            else:
+            if self.tool_options["mode"] not in modes:
                 _s = "Illegal verilator mode {}. Allowed values are {}"
                 raise RuntimeError(
                     _s.format(self.tool_options["mode"], ", ".join(modes))
                 )
+            if self.tool_options["mode"] in ["cc", "sc"]:
+                f.write("--" + self.tool_options["mode"] + "\n")
             if "libs" in self.tool_options:
                 for lib in self.tool_options["libs"]:
                     f.write("-LDFLAGS {}\n".format(lib))
@@ -158,9 +166,7 @@ def _write_config_files(self):
                 f.write("\n".join(vlt_files) + "\n")
             f.write("\n".join(vlog_files) + "\n")
             f.write("--top-module {}\n".format(self.toplevel))
-            add_exe = (str(self.tool_options.get("exe")).lower() != "false") \
-                and (self.tool_options["mode"] not in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"])
-            if add_exe:
+            if str(self.tool_options.get("exe")).lower() != "false":
                 f.write("--exe\n")
             f.write("\n".join(opt_c_files))
             f.write("\n")
@@ -208,11 +214,21 @@ def _write_config_files(self):
 
     def build_main(self):
         logger.info("Building simulation model")
-        if not "mode" in self.tool_options:
+        if "mode" not in self.tool_options:
             self.tool_options["mode"] = "cc"
         args = []
-        if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
-            args.append("V" + self.toplevel + ".mk")
+
+        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
+        if self.tool_options["mode"] not in modes:
+            _s = "Illegal verilator mode {}. Allowed values are {}"
+            raise RuntimeError(
+                _s.format(self.tool_options["mode"], ", ".join(modes))
+            )
+
+        # PHONY Makefile targets
+        if self.tool_options["mode"] in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
+            args.append(self.tool_options["mode"])
+
         self._run_tool("make", args, quiet=True)
 
     def run_main(self):
@@ -226,7 +242,7 @@ def run_main(self):
         self.args += self.tool_options.get("run_options", [])
 
         # Default to cc mode if not specified
-        if not "mode" in self.tool_options:
+        if "mode" not in self.tool_options:
             self.tool_options["mode"] = "cc"
         if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             return
diff --git a/tests/test_verilator/Makefile b/tests/test_verilator/Makefile
index 215e34c7d..1e70bcefb 100644
--- a/tests/test_verilator/Makefile
+++ b/tests/test_verilator/Makefile
@@ -11,6 +11,17 @@ endif
 
 V$(TOP_MODULE): V$(TOP_MODULE).mk
 	$(MAKE) $(MAKE_OPTIONS) -f $<
-
 V$(TOP_MODULE).mk:
 	$(EDALIZE_LAUNCHER) $(VERILATOR) -f $(VC_FILE) $(VERILATOR_OPTIONS)
+
+.PHONY: binary dpi-hdr-only lint-only preprocess-only xml-only
+binary:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --binary -f $(VC_FILE) $(VERILATOR_OPTIONS)
+dpi-hdr-only:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --dpi-hdr-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
+lint-only:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --lint-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
+preprocess-only V$(TOP_MODULE).i:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) -E -f $(VC_FILE) $(VERILATOR_OPTIONS) > V$(TOP_MODULE).i
+xml-only V$(TOP_MODULE).xml:
+	$(EDALIZE_LAUNCHER) $(VERILATOR) --xml-only -f $(VC_FILE) $(VERILATOR_OPTIONS)
diff --git a/tests/test_verilator/binary/test_verilator_0.vc b/tests/test_verilator/binary/test_verilator_0.vc
index 9d0be4827..e74fbea45 100644
--- a/tests/test_verilator/binary/test_verilator_0.vc
+++ b/tests/test_verilator/binary/test_verilator_0.vc
@@ -1,5 +1,4 @@
 --Mdir .
---binary
 +incdir+.
 -CFLAGS -I.
 sv_file.sv
@@ -7,5 +6,6 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
+--exe
 c_file.c
 cpp_file.cpp
diff --git a/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc b/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
index 68dbc17fd..e74fbea45 100644
--- a/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
+++ b/tests/test_verilator/dpi-hdr-only/test_verilator_0.vc
@@ -1,5 +1,4 @@
 --Mdir .
---dpi-hdr-only
 +incdir+.
 -CFLAGS -I.
 sv_file.sv
@@ -7,5 +6,6 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
+--exe
 c_file.c
 cpp_file.cpp
diff --git a/tests/test_verilator/lint-only/test_verilator_0.vc b/tests/test_verilator/lint-only/test_verilator_0.vc
index 25fa51620..e74fbea45 100644
--- a/tests/test_verilator/lint-only/test_verilator_0.vc
+++ b/tests/test_verilator/lint-only/test_verilator_0.vc
@@ -1,5 +1,4 @@
 --Mdir .
---lint-only
 +incdir+.
 -CFLAGS -I.
 sv_file.sv
@@ -7,5 +6,6 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
+--exe
 c_file.c
 cpp_file.cpp
diff --git a/tests/test_verilator/preprocess-only/test_verilator_0.vc b/tests/test_verilator/preprocess-only/test_verilator_0.vc
index 99e7989f4..e74fbea45 100644
--- a/tests/test_verilator/preprocess-only/test_verilator_0.vc
+++ b/tests/test_verilator/preprocess-only/test_verilator_0.vc
@@ -1,5 +1,4 @@
 --Mdir .
--E
 +incdir+.
 -CFLAGS -I.
 sv_file.sv
@@ -7,5 +6,6 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
+--exe
 c_file.c
 cpp_file.cpp
diff --git a/tests/test_verilator/xml-only/test_verilator_0.vc b/tests/test_verilator/xml-only/test_verilator_0.vc
index 5a591b436..e74fbea45 100644
--- a/tests/test_verilator/xml-only/test_verilator_0.vc
+++ b/tests/test_verilator/xml-only/test_verilator_0.vc
@@ -1,5 +1,4 @@
 --Mdir .
---xml-only
 +incdir+.
 -CFLAGS -I.
 sv_file.sv
@@ -7,5 +6,6 @@ vlog_file.v
 vlog05_file.v
 another_sv_file.sv
 --top-module top_module
+--exe
 c_file.c
 cpp_file.cpp

From e5d5edc1514f9c731bdf19cbf1c8ea943bfc6831 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sat, 2 Sep 2023 15:07:33 -0700
Subject: [PATCH 05/10] condensed modes list to static member

---
 edalize/tools/verilator.py | 11 +++++------
 edalize/verilator.py       | 17 +++++++++--------
 2 files changed, 14 insertions(+), 14 deletions(-)

diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 0e8d4e45a..8d4503faa 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -6,6 +6,7 @@
 
 from edalize.tools.edatool import Edatool
 from edalize.utils import EdaCommands
+from edalize.verilator import Verilator as EdalizeVerilator
 
 
 class Verilator(Edatool):
@@ -23,7 +24,7 @@ class Verilator(Edatool):
         },
         "mode": {
             "type": "str",
-            "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
+            "desc": "Select compilation mode. Use *none* for no compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *none*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
         },
         "verilator_options": {
             "type": "str",
@@ -44,14 +45,12 @@ def setup(self, edam):
         vc = []
         vc.append("--Mdir .")
 
-        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
-
         # Default to cc mode if not specified
         mode = self.tool_options.get("mode", "cc")
 
-        if not mode in modes:
+        if mode not in EdalizeVerilator.modes:
             _s = "Illegal verilator mode {}. Allowed values are {}"
-            raise RuntimeError(_s.format(mode, ", ".join(modes)))
+            raise RuntimeError(_s.format(mode, ", ".join(EdalizeVerilator.modes)))
         vc.append("--" + mode)
 
         vc += self.tool_options.get("verilator_options", [])
@@ -148,7 +147,7 @@ def run(self):
         self.args += self.tool_options.get("run_options", [])
 
         # Default to cc mode if not specified
-        if not "mode" in self.tool_options:
+        if "mode" not in self.tool_options:
             self.tool_options["mode"] = "cc"
         if self.tool_options["mode"] in ["dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             return
diff --git a/edalize/verilator.py b/edalize/verilator.py
index b2ec7aff1..0eecfb691 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -52,6 +52,8 @@ class Verilator(Edatool):
 
     argtypes = ["cmdlinearg", "plusarg", "vlogdefine", "vlogparam"]
 
+    modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "none", "preprocess-only", "sc", "xml-only"]
+
     @classmethod
     def get_doc(cls, api_ver):
         if api_ver == 0:
@@ -128,16 +130,15 @@ def _write_config_files(self):
 
         with open(os.path.join(self.work_root, self.verilator_file), "w") as f:
             f.write("--Mdir .\n")
-            modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
 
             # Default to cc mode if not specified
-            if not "mode" in self.tool_options:
+            if "mode" not in self.tool_options:
                 self.tool_options["mode"] = "cc"
 
-            if self.tool_options["mode"] not in modes:
+            if self.tool_options["mode"] not in Verilator.modes:
                 _s = "Illegal verilator mode {}. Allowed values are {}"
                 raise RuntimeError(
-                    _s.format(self.tool_options["mode"], ", ".join(modes))
+                    _s.format(self.tool_options["mode"], ", ".join(Verilator.modes))
                 )
             if self.tool_options["mode"] in ["cc", "sc"]:
                 f.write("--" + self.tool_options["mode"] + "\n")
@@ -218,18 +219,18 @@ def build_main(self):
             self.tool_options["mode"] = "cc"
         args = []
 
-        modes = ["binary", "cc", "dpi-hdr-only", "lint-only", "preprocess-only", "sc", "xml-only"]
-        if self.tool_options["mode"] not in modes:
+        if self.tool_options["mode"] not in Verilator.modes:
             _s = "Illegal verilator mode {}. Allowed values are {}"
             raise RuntimeError(
-                _s.format(self.tool_options["mode"], ", ".join(modes))
+                _s.format(self.tool_options["mode"], ", ".join(Verilator.modes))
             )
 
         # PHONY Makefile targets
         if self.tool_options["mode"] in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             args.append(self.tool_options["mode"])
 
-        self._run_tool("make", args, quiet=True)
+        if self.tool_options["mode"] != "none":
+            self._run_tool("make", args, quiet=True)
 
     def run_main(self):
         self.check_managed_parser()

From bf0517aeb87428429d4cb955e027eddaa0b37a35 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sat, 2 Sep 2023 15:08:16 -0700
Subject: [PATCH 06/10] added gen xml/dpi-hdr/preprocess

---
 edalize/tools/verilator.py | 12 ++++++++++++
 edalize/verilator.py       | 25 +++++++++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/edalize/tools/verilator.py b/edalize/tools/verilator.py
index 8d4503faa..cb00e0bab 100644
--- a/edalize/tools/verilator.py
+++ b/edalize/tools/verilator.py
@@ -26,6 +26,18 @@ class Verilator(Edatool):
             "type": "str",
             "desc": "Select compilation mode. Use *none* for no compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *none*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
         },
+        "gen-xml": {
+            "type": "bool",
+            "desc": "Generate XML output",
+        },
+        "gen-dpi-hdr": {
+            "type": "bool",
+            "desc": "Generate DPI header output",
+        },
+        "gen-preprocess": {
+            "type": "bool",
+            "desc": "Generate preprocessor output",
+        },
         "verilator_options": {
             "type": "str",
             "desc": "Additional options for verilator",
diff --git a/edalize/verilator.py b/edalize/verilator.py
index 0eecfb691..d067cfc95 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -75,6 +75,21 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "Controls whether to create an executable. Set to 'false' when something else will do the final linking",
                     },
+                    {
+                        "name": "gen-xml",
+                        "type": "bool",
+                        "desc": "Generate XML output",
+                    },
+                    {
+                        "name": "gen-dpi-hdr",
+                        "type": "bool",
+                        "desc": "Generate DPI header output",
+                    },
+                    {
+                        "name": "gen-preprocess",
+                        "type": "bool",
+                        "desc": "Generate preprocessor output",
+                    },
                 ],
                 "lists": [
                     {
@@ -229,9 +244,19 @@ def build_main(self):
         if self.tool_options["mode"] in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             args.append(self.tool_options["mode"])
 
+        # Build according to mode
         if self.tool_options["mode"] != "none":
             self._run_tool("make", args, quiet=True)
 
+        # Builds runs
+        if str(self.tool_options.get("gen-xml")).lower() == "true":
+            self._run_tool("make", ["xml-only"], quiet=True)
+        if str(self.tool_options.get("gen-dpi-hdr")).lower() == "true":
+            self._run_tool("make", ["dpi-hdr-only"], quiet=True)
+        if str(self.tool_options.get("gen-preprocess")).lower() == "true":
+            self._run_tool("make", ["preprocess-only"], quiet=True)
+
+
     def run_main(self):
         self.check_managed_parser()
         self.args = []

From 2e30ad1726622a6674e723cdbc32397f063c62b3 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sat, 2 Sep 2023 15:18:18 -0700
Subject: [PATCH 07/10] improved clarity

---
 edalize/verilator.py | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/edalize/verilator.py b/edalize/verilator.py
index d067cfc95..d416cacca 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -244,11 +244,11 @@ def build_main(self):
         if self.tool_options["mode"] in ["binary", "dpi-hdr-only", "lint-only", "preprocess-only", "xml-only"]:
             args.append(self.tool_options["mode"])
 
-        # Build according to mode
+        # Build mode
         if self.tool_options["mode"] != "none":
             self._run_tool("make", args, quiet=True)
 
-        # Builds runs
+        # Additional builds
         if str(self.tool_options.get("gen-xml")).lower() == "true":
             self._run_tool("make", ["xml-only"], quiet=True)
         if str(self.tool_options.get("gen-dpi-hdr")).lower() == "true":

From fd3560fb0c4d09af27edf14a5fc1494fb6a73d29 Mon Sep 17 00:00:00 2001
From: Ethan Sifferman <ethan@sifferman.dev>
Date: Sun, 3 Sep 2023 20:27:32 -0700
Subject: [PATCH 08/10] corrected documentation

---
 doc/edam/api.rst     | 2 +-
 edalize/verilator.py | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/doc/edam/api.rst b/doc/edam/api.rst
index 9718bed9a..c8f842644 100644
--- a/doc/edam/api.rst
+++ b/doc/edam/api.rst
@@ -264,7 +264,7 @@ Field Name        Type                  Description
 cli_parser        String                If `cli_parser` is set to managed, Edalize will parse all command-line options.
                                         Otherwise, they are sent directly to the compiled simulation model.
 libs              List of String        Extra options to be passed as -LDFLAGS when linking the C++ testbench
-mode              String                Selects compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html
+mode              String                Selects compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *none*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html
 verilator_options List of String        Extra options to be passed when verilating model
 ================= ===================== ===========
 
diff --git a/edalize/verilator.py b/edalize/verilator.py
index d416cacca..a79b9de7d 100644
--- a/edalize/verilator.py
+++ b/edalize/verilator.py
@@ -63,7 +63,7 @@ def get_doc(cls, api_ver):
                     {
                         "name": "mode",
                         "type": "String",
-                        "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
+                        "desc": "Select compilation mode. Legal values are *binary*, *cc*, *dpi-hdr-only*, *lint-only*, *none*, *preprocess-only*, *sc*, *xml-only*. See Verilator documentation for function: https://veripool.org/guide/latest/exe_verilator.html",
                     },
                     {
                         "name": "cli_parser",

From 42ef601c4ab2e0f7be08261b33c104125c0a2a07 Mon Sep 17 00:00:00 2001
From: Anna Lee <150648636+a-n-n-a-l-e-e@users.noreply.github.com>
Date: Thu, 16 Nov 2023 04:44:30 +0000
Subject: [PATCH 09/10] skip failing tests with pandas 2.1.0

from https://github.com/olofk/edalize/commit/2a3db6658752f97c61048664b478ebfe65a909f8
There seems to be a bug with newer versions of pandas that prevents
kwargs from being passed through the apply function (specifically
passing errors='ignore' to to_numeric in edalize/vivado_reporting.py).
---
 tests/test_reporting.py | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/tests/test_reporting.py b/tests/test_reporting.py
index 7c66aeb45..caf322b09 100644
--- a/tests/test_reporting.py
+++ b/tests/test_reporting.py
@@ -5,6 +5,7 @@
 
 from .edalize_common import tests_dir
 
+PANDAS_VERSION = tuple(map(int, pd.__version__.split('.')[:3]))
 
 def check_types(s, allowed=[int, float]):
     """Check data structures use expected types
@@ -348,6 +349,7 @@ def picorv32_artix7_data():
     return rpt
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_artix7_summary(picorv32_artix7_data):
     """Check all summary fields"""
 
@@ -367,6 +369,7 @@ def test_picorv32_artix7_summary(picorv32_artix7_data):
     assert round_fmax(summary, digits=4) == expected
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_artix7_resources(picorv32_artix7_data):
     """Check selected resource report fields"""
 
@@ -383,6 +386,7 @@ def test_picorv32_artix7_resources(picorv32_artix7_data):
     assert df.at["DSPs", "Available"] == 740
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_artix7_timing(picorv32_artix7_data):
     """Check selected timing report fields"""
 
@@ -409,6 +413,7 @@ def picorv32_kusp_data():
     return rpt
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_kusp_summary(picorv32_kusp_data):
     """Check all summary fields"""
 
@@ -428,6 +433,7 @@ def test_picorv32_kusp_summary(picorv32_kusp_data):
     assert round_fmax(summary, 4) == expected
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_kusp_resources(picorv32_kusp_data):
     """Check selected resource report fields"""
 
@@ -447,6 +453,7 @@ def test_picorv32_kusp_resources(picorv32_kusp_data):
     assert list(tables["Instantiated Netlists"].columns) == ["Ref Name", "Used"]
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_picorv32_kusp_timing(picorv32_kusp_data):
     """Check selected timing report fields"""
 
@@ -481,6 +488,7 @@ def linux_on_litex_vexriscv_arty_a7_data():
     return result
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_linux_on_litex_vexriscv_arty_a7_summary(linux_on_litex_vexriscv_arty_a7_data):
 
     summary = linux_on_litex_vexriscv_arty_a7_data["summary"]
@@ -523,6 +531,7 @@ def test_linux_on_litex_vexriscv_arty_a7_summary(linux_on_litex_vexriscv_arty_a7
     assert round_fmax(summary, 4) == expected
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_linux_on_litex_vexriscv_arty_a7_resources(
     linux_on_litex_vexriscv_arty_a7_data,
 ):
@@ -534,6 +543,7 @@ def test_linux_on_litex_vexriscv_arty_a7_resources(
     assert df.loc["LUT as Distributed RAM", "Used"] == 1932
 
 
+@pytest.mark.skipif(PANDAS_VERSION >= (2, 1, 0), reason="apply(...,error='ignore') ignored")
 def test_linux_on_litex_vexriscv_arty_a7_timing(linux_on_litex_vexriscv_arty_a7_data):
 
     rpt = linux_on_litex_vexriscv_arty_a7_data["timing"]

From f156232667e60309cd03ac39b3335b1a2fe660f9 Mon Sep 17 00:00:00 2001
From: GCHQDeveloper147 <104002105+GCHQDeveloper147@users.noreply.github.com>
Date: Tue, 21 Nov 2023 21:04:05 +0000
Subject: [PATCH 10/10] Add a --pgm tool option to stop build stage from
 automatically programming (#392)

Add --pgm flag to tools with programming capabilities
---
 edalize/ise.py     |  7 +++++++
 edalize/quartus.py | 14 +++++++-------
 edalize/vivado.py  | 12 +++++++-----
 3 files changed, 21 insertions(+), 12 deletions(-)

diff --git a/edalize/ise.py b/edalize/ise.py
index 1a26cf73a..0123d7f32 100644
--- a/edalize/ise.py
+++ b/edalize/ise.py
@@ -94,6 +94,11 @@ def get_doc(cls, api_ver):
                         "type": "Integer",
                         "desc": "Specifies the FPGA's device number in the JTAG chain, starting at 1",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is 'none', set to 'ise' to program the FPGA in the run stage.",
+                    },
                 ],
             }
 
@@ -188,6 +193,8 @@ def _write_tcl_file(self):
         tcl_file.close()
 
     def run_main(self):
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "ise"):
+            return
         pgm_file_name = os.path.join(self.work_root, self.name + ".pgm")
         self._write_pgm_file(pgm_file_name)
         self._run_tool("impact", ["-batch", pgm_file_name])
diff --git a/edalize/quartus.py b/edalize/quartus.py
index f6330ddbf..f6068ad18 100644
--- a/edalize/quartus.py
+++ b/edalize/quartus.py
@@ -58,6 +58,11 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "P&R tool. Allowed values are quartus (default), dse (to run Design Space Explorer) and none (to just run synthesis)",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is 'none', set to 'quartus' to program the FPGA in the run stage.",
+                    },
                 ],
                 "lists": [
                     {
@@ -272,13 +277,8 @@ def run_main(self):
         args += ["-o"]
         args += ["p;" + self.name.replace(".", "_") + ".sof"]
 
-        if "pnr" in self.tool_options:
-            if self.tool_options["pnr"] == "quartus":
-                pass
-            elif self.tool_options["pnr"] == "dse":
-                return
-            elif self.tool_options["pnr"] == "none":
-                return
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "quartus"):
+            return
 
         if "board_device_index" in self.tool_options:
             args[-1] += "@" + self.tool_options["board_device_index"]
diff --git a/edalize/vivado.py b/edalize/vivado.py
index 49be7533e..ac896c35c 100644
--- a/edalize/vivado.py
+++ b/edalize/vivado.py
@@ -61,6 +61,11 @@ def get_doc(cls, api_ver):
                         "type": "String",
                         "desc": "P&R tool. Allowed values are vivado (default) and none (to just run synthesis)",
                     },
+                    {
+                        "name": "pgm",
+                        "type": "String",
+                        "desc": "Programming tool. Default is none, set to 'vivado' to program the FPGA in the run stage.",
+                    },
                     {
                         "name": "jobs",
                         "type": "Integer",
@@ -115,11 +120,8 @@ def run_main(self):
         correct FPGA board and then downloads the bitstream. The tcl script is then
         executed in Vivado's batch mode.
         """
-        if "pnr" in self.tool_options:
-            if self.tool_options["pnr"] == "vivado":
-                pass
-            elif self.tool_options["pnr"] == "none":
-                return
+        if ("pgm" not in self.tool_options) or (self.tool_options["pgm"] != "vivado"):
+            return
 
         self._run_tool("make", ["pgm"])