Incorrect flagging of write request event

[ArnauBigas]

Hi, I have noticed that the write request event (evt_write_req_o) is not flagged when there is a write request with a write-back policy and the memory produces a response with the error bit set.

How to reproduce the issue

Using the verilator testbench, run the following command:

make run SEQUENCE=random LOG_LEVEL=3 NTRANSACTIONS=69 SEED=42

The faulting transaction will be the last one.

Issue description

The core makes a store request, using a write-back policy. This request causes a miss, causing the cache to issue a load request to memory due to the write-allocate policy. The write miss event (evt_cache_write_miss_o) is flagged, but the write request event (evt_write_req_o) is not. The request is put in the RTAB while the cache waits for the memory response.

Once the response arrives, it has the error bit set. The original request is then replayed from the RTAB. Because it has been flagged with the error bit, it only sends a response to the core with this flag set. However, it does not flag any event and does not proceed any further.

Under normal circumstances, when the error bit is not set, the directory would be updated and the replayed request would hit the cache. It is under this logic when the write request event is flagged (see hpdcache_ctrl_pe.sv:881).

Possible solutions

• When replaying a request with the error bit set, check if it's a store with the write-back policy, and flag the event then (inside hpdcache_ctrl_pe.sv:404).
• When there is a write-back store making a hit in the cache, check if it's a core request or a replay from the RTAB. Emit the write request event both when there is a miss and when the core (and not a replay due to a miss) makes a hit.

[cfuguet]

Hi @ArnauBigas,

Thank you for reporting this issue. It is indeed a bug.

I'm testing the fix and then I will merge into master. It is based in the first solution you propose. I simplified it a little bit as only write back misses can have the error bit set (as they trigger a read to the memory). Thus, it is only needed to check that it is a write.

Actually, the evt_write_req_o signal could be set unconditionally in case of a request with error, because as I mentioned, above, only write back misses with errors can set the error bit from the RTAB. However, for generality, I check at least if it is a write. Maybe in the future, this bit could be used by other types of requests...

Thanks again