From 2cb5cf5faa65f3def04a8079419f0925adc76498 Mon Sep 17 00:00:00 2001
From: Josh Junon <junon@oro.sh>
Date: Wed, 19 Feb 2025 16:14:05 +0100
Subject: [PATCH] x86_64: debug print discovered PCI(e) devices from MCFG

---
 oro-arch-x86_64/Cargo.toml      |  1 +
 oro-arch-x86_64/src/boot/mod.rs | 29 +++++++++++++++++++++++++++++
 2 files changed, 30 insertions(+)

diff --git a/oro-arch-x86_64/Cargo.toml b/oro-arch-x86_64/Cargo.toml
index 3f2be87..517e553 100644
--- a/oro-arch-x86_64/Cargo.toml
+++ b/oro-arch-x86_64/Cargo.toml
@@ -44,6 +44,7 @@ oro-dbgutil.workspace = true
 oro-acpi.workspace = true
 oro-sync.workspace = true
 oro.workspace = true
+oro-pci.workspace = true
 
 # Work around non-composability of `test` profile and global allocator conflicts in unit test runner.
 [dev-dependencies]
diff --git a/oro-arch-x86_64/src/boot/mod.rs b/oro-arch-x86_64/src/boot/mod.rs
index c447a48..e493a69 100644
--- a/oro-arch-x86_64/src/boot/mod.rs
+++ b/oro-arch-x86_64/src/boot/mod.rs
@@ -73,6 +73,35 @@ pub unsafe fn boot_primary() -> ! {
 		.sdt()
 		.expect("ACPI tables are missing either the RSDT or XSDT table");
 
+	{
+		let mcfg = sdt
+			.find::<oro_acpi::Mcfg>()
+			.expect("MCFG table not found in ACPI tables");
+
+		for entry in mcfg.entries() {
+			dbg!("MCFG entry: {entry:?}", entry = entry);
+
+			let base =
+				unsafe { Phys::from_address_unchecked(entry.Address.read()).as_ptr_unchecked() };
+
+			for dev in oro_pci::MmioIterator::new(
+				base,
+				entry.StartBusNumber.read(),
+				entry.EndBusNumber.read(),
+			)
+			.expect("mis-aligned MCFG PCI(e) base pointer")
+			{
+				#[allow(unreachable_patterns)]
+				match dev.config {
+					oro_pci::PciConfig::Type0(config) => {
+						dbg!("{dev:?} -> {:#?}", unsafe { config.read_volatile() });
+					}
+					_ => dbg!("{dev:?} -> ???"),
+				}
+			}
+		}
+	}
+
 	let fadt = sdt
 		.find::<oro_acpi::Fadt>()
 		.expect("FADT table not found in ACPI tables");