Support higher SPI clock frequency

[microxblue]

Many of the recent PC uses 33Mhz SPI clock. So the current 20Mhz limitation might not work on those platforms. I am thinking the implementation could be enhanced a little bit to allow higher SPI clock freq.

Current implementation issues the SDRAM read command immediately after receiving A1 SPI address on a SPI read command. Later on A0 SPI address can be used to select low/high byte of the 16bit word. This approach provides around 1.5 SPI clock timing for SDRAM to complete read and prepare the first bit output on SPI MISO. However, the timing is very tight for SDRAM read and it limits the max supported SPI clock freq.

Could we issue the SDRAM read command immediately after receiving A2 SPI address instead ? This provides one more SPI clock timing for SDRAM read. Accordingly SDRAM needs to do a burst read with BL=2. It reads a 32bit dword. And later on A1:A0 SPI address can be used to index one of the 8-bit slice. In this way, I think it should be able to allow higher SPI freq.

Is it feasible to do ?