Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Use -sv or recognise SystemVerilog files #12

Open
concavegit opened this issue Mar 10, 2019 · 0 comments
Open

Use -sv or recognise SystemVerilog files #12

concavegit opened this issue Mar 10, 2019 · 0 comments

Comments

@concavegit
Copy link

concavegit commented Mar 10, 2019

I am using a source with an always_comb block which only builds when I change it to always @* and rename the file from foo.sv to foo.v.
Looking through the builder, it looks like only .v extensions are recognixed, rather than .sv which would enable systemverilog files.
A solution to build systemverilog files is to recognize .sv as a source suffix, or find some other way to pass -sv to yosys.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

1 participant