From d14274ce98871edbac646edb8b15d45265464e76 Mon Sep 17 00:00:00 2001
From: Sergio Mazzola <smazzola@iis.ee.ethz.ch>
Date: Tue, 28 Jan 2025 16:07:58 +0100
Subject: [PATCH] Fix rebase

---
 .gitignore                       |  1 +
 bender.mk                        |  2 --
 target/sim/sim.mk                | 13 ++++---------
 target/sim/src/tb_chimera_soc.sv | 14 +++++++-------
 4 files changed, 12 insertions(+), 18 deletions(-)

diff --git a/.gitignore b/.gitignore
index 5a63bac..1ad955d 100644
--- a/.gitignore
+++ b/.gitignore
@@ -36,6 +36,7 @@ target/sim/models
 target/sim/vsim/work
 target/sim/vsim/transcript
 target/sim/vsim/*.do
+target/sim/vsim/*.log
 target/sim/vsim/trace*
 modelsim.ini
 compile.tcl
diff --git a/bender.mk b/bender.mk
index 144c74f..9b1f2b4 100644
--- a/bender.mk
+++ b/bender.mk
@@ -10,5 +10,3 @@ COMMON_TARGS ?=
 COMMON_TARGS += -t pulp_cluster -t cv32a6_convolve -t cva6 -t rtl
 
 SIM_TARGS = $(COMMON_TARGS) -t test -t sim
-
-VLOG_ARGS += \"+incdir+$(CHIM_ROOT)/hw/include\"
diff --git a/target/sim/sim.mk b/target/sim/sim.mk
index daf082b..62e024c 100644
--- a/target/sim/sim.mk
+++ b/target/sim/sim.mk
@@ -14,7 +14,7 @@ CHIM_SIM_DIR ?= $(CHIM_ROOT)/target/sim
 .PHONY: chim-sim
 chim-sim: chim-hyperram-model $(CHIM_SIM_DIR)/vsim/compile.tcl
 
-# Get HyperRAM verification IP (VIP) for simulation
+# HyperRAM verification IP (VIP) for simulation
 .PHONY: chim-hyperram-model
 chim-hyperram-model: $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv
 $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv:
@@ -25,8 +25,9 @@ $(CHIM_SIM_DIR)/models/s27ks0641/s27ks0641.sv:
 HYP_USER_PRELOAD      ?= 0
 HYP0_PRELOAD_MEM_FILE ?= ""
 
-
+# vsim compilation arguments (options, macros)
 CHIM_VLOG_ARGS += -suppress 2583 -suppress 13314
+CHIM_VLOG_ARGS += \"+incdir+$(CHIM_ROOT)/hw/include\"
 CHIM_VLOG_ARGS += +define+HYP_USER_PRELOAD="$(HYP_USER_PRELOAD)"
 CHIM_VLOG_ARGS += +define+HYP0_PRELOAD_MEM_FILE=\"$(HYP0_PRELOAD_MEM_FILE)\"
 # this path should be kept relative to the vsim directory to avoid CI issues:
@@ -35,7 +36,7 @@ CHIM_VLOG_ARGS += +define+PATH_TO_HYP_SDF=\"../models/s27ks0641/s27ks0641.sdf\"
 
 # Generate vsim compilation script
 $(CHIM_SIM_DIR)/vsim/compile.tcl: chs-hw-init snitch-hw-init
-	@bender script vsim $(SIM_TARGS) --vlog-arg="$(CHIM_VLOG_ARGS)" > $@
+	bender script vsim $(SIM_TARGS) --vlog-arg="$(CHIM_VLOG_ARGS)" > $@
 	echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $@
 
 # Clean
@@ -45,10 +46,4 @@ chim-sim-clean:
 	@rm -rf $(CHIM_SIM_DIR)/vsim/transcript
 	@rm -f $(CHIM_SIM_DIR)/vsim/compile.tcl
 
-chim-sim: $(CHIM_SIM_DIR)/vsim/compile.tcl
-
-$(CHIM_SIM_DIR)/vsim/compile.tcl: chs-hw-init snitch-hw-init pulp-sw-init
-	@bender script vsim $(COMMON_TARGS) $(SIM_TARGS) --vlog-arg="$(VLOG_ARGS)"> $@
-	echo 'vlog "$(realpath $(CHS_ROOT))/target/sim/src/elfloader.cpp" -ccflags "-std=c++11"' >> $@
-
 endif # chim_sim_mk
diff --git a/target/sim/src/tb_chimera_soc.sv b/target/sim/src/tb_chimera_soc.sv
index d57d7b1..07ee8a3 100644
--- a/target/sim/src/tb_chimera_soc.sv
+++ b/target/sim/src/tb_chimera_soc.sv
@@ -106,13 +106,6 @@ module tb_chimera_soc
         0: begin  // JTAG
           fix.vip.jtag_init();
           fix.vip.jtag_elf_run(preload_elf);
-
-          fix.dut.i_cluster_domain.gen_clusters[0].i_chimera_cluster.boot_cluster();
-          fix.dut.i_cluster_domain.gen_clusters[1].i_chimera_cluster.boot_cluster();
-          fix.dut.i_cluster_domain.gen_clusters[2].i_chimera_cluster.boot_cluster();
-          fix.dut.i_cluster_domain.gen_clusters[3].i_chimera_cluster.boot_cluster();
-          fix.dut.i_cluster_domain.gen_clusters[4].i_chimera_cluster.boot_cluster();
-
           fix.vip.jtag_wait_for_eoc(exit_code);
         end
         2: begin  // UART
@@ -127,6 +120,13 @@ module tb_chimera_soc
           fast_elf_preload(preload_elf);
           // Unhalt the core
           fix.vip.jtag_resume_hart();
+
+          fix.dut.i_cluster_domain.gen_clusters[0].i_chimera_cluster.boot_cluster();
+          fix.dut.i_cluster_domain.gen_clusters[1].i_chimera_cluster.boot_cluster();
+          fix.dut.i_cluster_domain.gen_clusters[2].i_chimera_cluster.boot_cluster();
+          fix.dut.i_cluster_domain.gen_clusters[3].i_chimera_cluster.boot_cluster();
+          fix.dut.i_cluster_domain.gen_clusters[4].i_chimera_cluster.boot_cluster();
+
           // Wait for the end of computation
           fix.vip.jtag_wait_for_eoc(exit_code);
         end