From 063c7c8d92c51079fc89d2e048df0cae04931dbf Mon Sep 17 00:00:00 2001 From: graham sanderson Date: Mon, 11 Nov 2024 12:25:41 -0600 Subject: [PATCH] more doc fixes --- src/rp2_common/hardware_clocks/include/hardware/clocks.h | 2 +- src/rp2_common/pico_cyw43_driver/include/pico/cyw43_driver.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/rp2_common/hardware_clocks/include/hardware/clocks.h b/src/rp2_common/hardware_clocks/include/hardware/clocks.h index f7fa8cd5c..ce6090a73 100644 --- a/src/rp2_common/hardware_clocks/include/hardware/clocks.h +++ b/src/rp2_common/hardware_clocks/include/hardware/clocks.h @@ -355,7 +355,7 @@ void clocks_enable_resus(resus_callback_t resus_callback); * \param src The source clock. See the register field CLOCKS_CLK_GPOUT0_CTRL_AUXSRC for a full list. The list is the same for each GPOUT clock generator. * \param div_int The integer part of the value to divide the source clock by. This is useful to not overwhelm the GPIO pin with a fast clock. This is in range of 1..2^24-1 on RP2040 * and 1..2^16-1 on RP2350 - * \param div_frac16 The fractional part of the value to divide the source clock by. This is in range of 0..65536 (/65536). + * \param div_frac16 The fractional part of the value to divide the source clock by. This is in range of 0..65535 (/65536). */ void clock_gpio_init_int_frac16(uint gpio, uint src, uint32_t div_int, uint16_t div_frac16); diff --git a/src/rp2_common/pico_cyw43_driver/include/pico/cyw43_driver.h b/src/rp2_common/pico_cyw43_driver/include/pico/cyw43_driver.h index 1c204a989..7a26b5527 100644 --- a/src/rp2_common/pico_cyw43_driver/include/pico/cyw43_driver.h +++ b/src/rp2_common/pico_cyw43_driver/include/pico/cyw43_driver.h @@ -48,7 +48,7 @@ void cyw43_driver_deinit(struct async_context *context); #define CYW43_PIO_CLOCK_DIV_DYNAMIC 0 #endif -// PICO_CONFIG: CYW43_PIO_CLOCK_DIV_INT, Integer part of the clock divider for communication with the wireless chip, type=bool, default=2, group=pico_cyw43_driver +// PICO_CONFIG: CYW43_PIO_CLOCK_DIV_INT, Integer part of the clock divider for communication with the wireless chip, type=int, default=2, group=pico_cyw43_driver #ifndef CYW43_PIO_CLOCK_DIV_INT // backwards compatibility using old define #ifdef CYW43_PIO_CLOCK_DIV @@ -58,7 +58,7 @@ void cyw43_driver_deinit(struct async_context *context); #endif #endif -// PICO_CONFIG: CYW43_PIO_CLOCK_DIV_FRAC8, Fractional part of the clock divider for communication with the wireless chip 0-255, type=bool, default=0, group=pico_cyw43_driver +// PICO_CONFIG: CYW43_PIO_CLOCK_DIV_FRAC8, Fractional part of the clock divider for communication with the wireless chip 0-255, type=int, min=0, max=255, default=0, group=pico_cyw43_driver #ifndef CYW43_PIO_CLOCK_DIV_FRAC8 #ifdef CYW43_PIO_CLOCK_DIV_FRAC #define CYW43_PIO_CLOCK_DIV_FRAC8 CYW43_PIO_CLOCK_DIV_FRAC