From 44feaf6b25ae407aee437657a6b5d1bc92da06ab Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Kjetil=20=C3=98ster=C3=A5s?= <102311786+silabs-kjetil@users.noreply.github.com> Date: Fri, 7 Jun 2024 06:33:17 +0200 Subject: [PATCH] Replacing the special tick character (#168) * Replacing the special tick character The use of a special tick character in schema_isa.yaml cause the riscof validateyaml command to fail in some environments. This has been reported in the following issues. https://github.com/riscv-software-src/riscof/issues/17 https://github.com/riscv-software-src/riscof/issues/107 --------- Signed-off-by: Neel Gala --- CHANGELOG.md | 3 +++ riscv_config/schemas/schema_isa.yaml | 12 ++++++------ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index df8febc..6b7d364 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -23,6 +23,9 @@ This project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.htm ## [3.17.1] - 2024-02-25 - add unratified Ssdbltrp, Smdbltrp, and Sddbltrp extensions +## [3.17.1] - 2024-02-07 + - Fixing yaml parsing issue by replacing special characters in schema_isa.yaml. + ## [3.17.0] - 2024-01-09 - support march generation without custom extensions diff --git a/riscv_config/schemas/schema_isa.yaml b/riscv_config/schemas/schema_isa.yaml index 981ee62..5d90742 100644 --- a/riscv_config/schemas/schema_isa.yaml +++ b/riscv_config/schemas/schema_isa.yaml @@ -523,7 +523,7 @@ hart_schema: schema: description: type: string - default: The mstatus register keeps track of and controls the hart’s current + default: The mstatus register keeps track of and controls the hart's current operating state. address: {type: integer, default: 768, allowed: [768]} priv_mode: {type: string, default: M, allowed: [M]} @@ -1468,7 +1468,7 @@ hart_schema: schema: description: type: string - default: The mstatush register keeps track of and controls the hart’s current + default: The mstatush register keeps track of and controls the hart's current operating state. address: {type: integer, default: 768, allowed: [768]} priv_mode: {type: string, default: M, allowed: [M]} @@ -8242,7 +8242,7 @@ hart_schema: schema: description: type: string - default: The sstatus register keeps track of the processor’s current operating state. + default: The sstatus register keeps track of the processor's current operating state. address: {type: integer, default: 0x100, allowed: [0x100]} priv_mode: {type: string, default: S, allowed: [S]} reset-val: @@ -9738,7 +9738,7 @@ hart_schema: schema: description: type: string - default: The ustatus register keeps track of the processor’s current operating state. + default: The ustatus register keeps track of the processor's current operating state. address: {type: integer, default: 0x000, allowed: [0x000]} priv_mode: {type: string, default: U, allowed: [U]} reset-val: @@ -10501,7 +10501,7 @@ hart_schema: schema: description: type: string - default: The hstatus register keeps track of and controls the hart’s current + default: The hstatus register keeps track of and controls the hart's current operating state. address: {type: integer, default: 1536, allowed: [1536]} priv_mode: {type: string, default: H, allowed: [H]} @@ -12229,7 +12229,7 @@ CSR and the value returned in VS-mode or VU-mode.} schema: description: type: string - default: The vsstatus register keeps track of the processor’s current operating state. + default: The vsstatus register keeps track of the processor's current operating state. address: {type: integer, default: 0x200, allowed: [0x200]} priv_mode: {type: string, default: S, allowed: [S]} reset-val: