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mtvec is not backwards compatible due to alignment #446

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Timmmm opened this issue Feb 4, 2025 · 2 comments
Open

mtvec is not backwards compatible due to alignment #446

Timmmm opened this issue Feb 4, 2025 · 2 comments

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@Timmmm
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Timmmm commented Feb 4, 2025

It's pretty annoying that existing code that uses mtvec can get broken just by running it on a CLIC core because CLIC increases the alignment requirement from 2^2 to 2^6 bytes. The failure mode can also be pretty bad - it can just jump to a random incorrect address.

Why not put the submode in the low bits of xtvt? Or just remove it entirely since it isn't even used.

@jnk0le
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jnk0le commented Feb 4, 2025

submode is active only with mode set to 0b11. Alignment requirement doesn't apply in "legacy" mode.

Systems implementing both CLIC and CLINT mode may, but are not required to, limit
alignment of mtvec to 64-byte boundaries in both modes.

@Timmmm
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Timmmm commented Feb 4, 2025

Sure, but one of the CPUs I am working on only supports CLIC mode, so mode is hard-wired to 0b11. Here's an example of some code that works fine on non-CLIC CPUs, and would work fine on CLIC CPUs too, except for this issue.

    la t0, 9f
    csrw mtvec, t0
    li t0, MSTATUS_FS
    csrrs t0, mstatus, t0
    fmv.w.x f0, x0
...
    fmv.w.x f31, x0
    .balign 4
9:
    csrw mstatus, t0

If you run it on a CLIC CPU where mode is hard-wired to 0b11 then it will crash because 9: is not 64-byte aligned. If you change it to the following code it works.

    .balign 64
9:
    csrw mstatus, t0

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