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It's pretty annoying that existing code that uses mtvec can get broken just by running it on a CLIC core because CLIC increases the alignment requirement from 2^2 to 2^6 bytes. The failure mode can also be pretty bad - it can just jump to a random incorrect address.
Why not put the submode in the low bits of xtvt? Or just remove it entirely since it isn't even used.
The text was updated successfully, but these errors were encountered:
Sure, but one of the CPUs I am working on only supports CLIC mode, so mode is hard-wired to 0b11. Here's an example of some code that works fine on non-CLIC CPUs, and would work fine on CLIC CPUs too, except for this issue.
If you run it on a CLIC CPU where mode is hard-wired to 0b11 then it will crash because 9: is not 64-byte aligned. If you change it to the following code it works.
It's pretty annoying that existing code that uses
mtvec
can get broken just by running it on a CLIC core because CLIC increases the alignment requirement from 2^2 to 2^6 bytes. The failure mode can also be pretty bad - it can just jump to a random incorrect address.Why not put the
submode
in the low bits ofxtvt
? Or just remove it entirely since it isn't even used.The text was updated successfully, but these errors were encountered: