diff --git a/librz/arch/p/asm/asm_arm_cs.c b/librz/arch/p/asm/asm_arm_cs.c index c0d13b8ace4..b9bc86f3944 100644 --- a/librz/arch/p/asm/asm_arm_cs.c +++ b/librz/arch/p/asm/asm_arm_cs.c @@ -285,6 +285,18 @@ static char *mnemonics(RzAsm *a, int id, bool json) { return rz_strbuf_drain(buf); } +char **arm_cpu_descriptions() { + static char *cpu_desc[] = { + "v8", "ARMv8 version", + "cortexm", "ARM Cortex-M family", + "arm1176", "ARM1176JZ(F)-S processor, ARMv6 version", + "cortexA72", "ARM Cortex-A72 processor, ARMv8-A version", + "cortexA8", "ARM Cortex-A8, ARMv7-A version", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_arm_cs = { .name = "arm", .desc = "Capstone ARM disassembler", @@ -300,6 +312,7 @@ RzAsmPlugin rz_asm_plugin_arm_cs = { .assemble = &assemble, .init = &arm_init, .fini = &arm_fini, + .get_cpu_desc = arm_cpu_descriptions, #if 0 // arm32 and arm64 "crypto,databarrier,divide,fparmv8,multpro,neon,t2extractpack," diff --git a/librz/arch/p/asm/asm_avr.c b/librz/arch/p/asm/asm_avr.c index 0cb20f4ceac..2d797292ce4 100644 --- a/librz/arch/p/asm/asm_avr.c +++ b/librz/arch/p/asm/asm_avr.c @@ -37,6 +37,28 @@ static int assemble(RzAsm *a, RzAsmOp *ao, const char *str) { return (int)written; } +char **avr_cpu_descriptions() { + static char *cpu_desc[] = { + "ATmega8", "8-bit AVR microcontroller with 8KB Flash, 1KB SRAM", + "ATmega1280", "8-bit AVR microcontroller with 128KB Flash, 8KB SRAM", + "ATmega1281", "8-bit AVR microcontroller with 128KB Flash, 8KB SRAM", + "ATmega16", "8-bit AVR microcontroller with 16KB Flash, 1KB SRAM", + "ATmega168", "8-bit AVR microcontroller with 16KB Flash, 1KB SRAMs", + "ATmega2560", "8-bit AVR microcontroller with 256KB Flash, 8KB SRAM", + "ATmega2561", "8-bit AVR microcontroller with 256KB Flash, 8KB SRAM", + "ATmega328p", "8-bit AVR microcontroller with 32KB Flash, 2KB SRAM", + "ATmega32u4", "8-bit AVR microcontroller with 32KB Flash, 2.5KB SRAM", + "ATmega48", "8-bit AVR microcontroller with 4KB Flash, 512B SRAM", + "ATmega640", "8-bit AVR microcontroller with 64KB Flash, 8KB SRAM", + "ATmega88", "8-bit AVR microcontroller with 8KB Flash, 1KB SRAM", + "ATxmega128a4u", "8-bit AVR microcontroller with 128KB Flash, 8KB SRAM", + "ATTiny48", "8-bit AVR microcontroller with 4KB Flash, 256B SRAM", + "ATTiny88", "8-bit AVR microcontroller with 8KB Flash, 512B SRAM", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_avr = { .name = "avr", .arch = "avr", @@ -61,5 +83,6 @@ RzAsmPlugin rz_asm_plugin_avr = { "ATmega88," "ATxmega128a4u," "ATTiny48," - "ATTiny88," + "ATTiny88,", + .get_cpu_desc = avr_cpu_descriptions, }; diff --git a/librz/arch/p/asm/asm_m680x_cs.c b/librz/arch/p/asm/asm_m680x_cs.c index 4ed876357b6..c94f8d313b7 100644 --- a/librz/arch/p/asm/asm_m680x_cs.c +++ b/librz/arch/p/asm/asm_m680x_cs.c @@ -79,6 +79,23 @@ static int m680x_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { return op->size; } +char **m680x_cpu_descriptions() { + static char *cpu_desc[] = { + "6800", "Motorola 6800: 8-bit microprocessor launched in 1974", + "6801", "Motorola 6801: Enhanced version of the 6800 with additional features like on-chip RAM and timers.", + "6805", "Motorola 68HC05: 8-bit microcontroller", + "6808", "Motorola 6808: Variant of the 6800 microprocessor", + "6809", "Motorola 6809: Advanced 8-bit microprocessor", + "6811", "Motorola 68HC11: 8-bit microcontroller (also abbreviated as 6811 or HC11)", + "cpu12", "Motorola 68HC12: 16-bit microcontroller (also abbreviated as 6812 or HC12)", + "6301", "Hitachi 6301: 8-bit microcontroller, CMOS version of 6800", + "6309", "Hitachi 6309: CMOS version of 6809", + "hcs08", "Freescale HCS08: 8-bit microcontroller family", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_m680x_cs = { .name = "m680x", .cpus = "6800,6801,6805,6808,6809,6811,cpu12,6301,6309,hcs08", @@ -91,6 +108,7 @@ RzAsmPlugin rz_asm_plugin_m680x_cs = { .fini = m680x_asm_fini, .disassemble = &m680x_disassemble, .mnemonics = m680x_asm_mnemonics, + .get_cpu_desc = m680x_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_m68k_cs.c b/librz/arch/p/asm/asm_m68k_cs.c index ed319dea9e9..8a1c26b8680 100644 --- a/librz/arch/p/asm/asm_m68k_cs.c +++ b/librz/arch/p/asm/asm_m68k_cs.c @@ -115,6 +115,19 @@ static int m68k_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { return ret; } +char **m68k_cpu_descriptions() { + static char *cpu_desc[] = { + "68000", "Motorola 68000: 16/32-bit CISC microprocessor", + "68010", "Motorola 68010: 16/32-bit microprocessors. Successor to Motoroloa 68000", + "68020", "Motorola 68020: 32-bit microprocessor with added instructions and additional addressing modes", + "68030", "Motorola 68030: Enhanced 32-bit microprocessor with integrated MMU", + "68040", "Motorola 68040: High-performance 32-bit microprocessor with integrated FPU", + "68060", "Motorola 68060: 32-bit microprocessor, highest performer in m68k series", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_m68k_cs = { .name = "m68k", .desc = "Capstone M68K disassembler", @@ -127,6 +140,7 @@ RzAsmPlugin rz_asm_plugin_m68k_cs = { .fini = m68k_asm_fini, .disassemble = &m68k_disassemble, .mnemonics = &m68k_asm_mnemonics, + .get_cpu_desc = m68k_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_mips_cs.c b/librz/arch/p/asm/asm_mips_cs.c index 768d6ecdbd4..63dbb3ba237 100644 --- a/librz/arch/p/asm/asm_mips_cs.c +++ b/librz/arch/p/asm/asm_mips_cs.c @@ -93,6 +93,45 @@ static int mips_assemble(RzAsm *a, RzAsmOp *op, const char *str) { return ret; } +char **mips_cpu_descriptions() { + static char *cpu_desc[] = { + "mips3", "MIPS III architecture.", + "mips1", "MIPS I architecture", + "mips2", "MIPS II architecture", + "mips32r2", "MIPS32 Release 2 architecture", + "mips32r3", "MIPS32 Release 3 architecture", + "mips32r5", "MIPS32 Release 5 architecture", + "mips32r6", "MIPS32 Release 6 architecture", + "mips4", "MIPS IV architecture", + "mips5", "MIPS V architecture", + "mips64r2", "MIPS64 Release 2 architecture", + "mips64r3", "MIPS64 Release 3 architecture", + "mips64r5", "MIPS64 Release 5 architecture", + "mips64r6", "MIPS64 Release 6 architecture", + "octeon", "OCTEON architecture (also known as cnMIPS)", + "octeonp", "OCTEON+ architecture (also known as cnMIPS+)", + "nanomips", "nanoMIPS architecture", + "nms1", "nanoMIPS Release 1 architecture", + "i7200", "nanoMIPS i7200 architecture", + "micromips", "microMIPS architecture", + "micro32r3", "microMIPS32 Release 3 architecture", + "micro32r6", "microMIPS32 Release 6 architecture", + "r2300", "R2300 MIPS cpu", + "r2600", "R2600 MIPS cpu", + "r2800", "R2800 MIPS cpu", + "r2000a", "R2000A MIPS cpu", + "r2000", "R2000 MIPS cpu", + "r3000a", "R3000A MIPS cpu", + "r3000", "R3000 MIPS cpu", + "r10000", "R10000 MIPS cpu", + "noptr64", "Special MIPS configuration to disable support for 64-bit pointers", + "nofloat", "Special MIPS configuration to disable support for floating-points", + NULL + }; + + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_mips_cs = { .name = "mips", .desc = "Capstone MIPS disassembler", @@ -105,7 +144,8 @@ RzAsmPlugin rz_asm_plugin_mips_cs = { .fini = mips_asm_fini, .disassemble = &mips_disassemble, .mnemonics = mips_asm_mnemonics, - .assemble = &mips_assemble + .assemble = &mips_assemble, + .get_cpu_desc = mips_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_pic.c b/librz/arch/p/asm/asm_pic.c index 4a5a2f80a93..31ae335fa8d 100644 --- a/librz/arch/p/asm/asm_pic.c +++ b/librz/arch/p/asm/asm_pic.c @@ -21,6 +21,19 @@ static int asm_pic_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *b, int l) { return op->size = res; } +char **pic_cpu_descriptions() { + static char *cpu_desc[] = { + "pic18", "PIC18: High-performance 8-bit microcontroller family", + "pic16", "PIC16: Mid-range 8-bit microcontroller family", + "pic14", "PIC14: 14-bit instruction set microcontroller family", + "highend", "Alias for PIC18", + "midrange", "Alias for PIC16", + "baseline", "Alias for PIC14", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_pic = { .name = "pic", .arch = "pic", @@ -28,7 +41,8 @@ RzAsmPlugin rz_asm_plugin_pic = { .bits = 16 | 32, .license = "LGPL3", .desc = "PIC disassembler", - .disassemble = &asm_pic_disassemble + .disassemble = &asm_pic_disassemble, + .get_cpu_desc = pic_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_ppc_cs.c b/librz/arch/p/asm/asm_ppc_cs.c index b48784d282d..5ec77fe0cff 100644 --- a/librz/arch/p/asm/asm_ppc_cs.c +++ b/librz/arch/p/asm/asm_ppc_cs.c @@ -116,6 +116,17 @@ static int ppc_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { return op->size; } +char **ppc_cpu_descriptions() { + static char *cpu_desc[] = { + "ppc", "Generic PowerPC CPU", + "vle", "PowerPC with Variable Length Encoding extension", + "ps", "PowerPC with Paired Single SIMD extension", + "qpx", "PowerPC with Quad Processing eXtensions", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_ppc_cs = { .name = "ppc", .desc = "Capstone PowerPC disassembler", @@ -129,6 +140,7 @@ RzAsmPlugin rz_asm_plugin_ppc_cs = { .fini = ppc_asm_fini, .disassemble = &ppc_disassemble, .mnemonics = ppc_asm_mnemonics, + .get_cpu_desc = ppc_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_sparc_cs.c b/librz/arch/p/asm/asm_sparc_cs.c index 510fe91c548..e53cf82fe09 100644 --- a/librz/arch/p/asm/asm_sparc_cs.c +++ b/librz/arch/p/asm/asm_sparc_cs.c @@ -65,6 +65,14 @@ static int sparc_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len) { return ret; } +char **sparc_cpu_descriptions() { + static char *cpu_desc[] = { + "v9", "SPARC V9: 64-bit RISC architecture specification", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_sparc_cs = { .name = "sparc", .desc = "Capstone SPARC disassembler", @@ -76,7 +84,8 @@ RzAsmPlugin rz_asm_plugin_sparc_cs = { .init = sparc_asm_init, .fini = sparc_asm_fini, .disassemble = &sparc_disassemble, - .mnemonics = sparc_asm_mnemonics + .mnemonics = sparc_asm_mnemonics, + .get_cpu_desc = sparc_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_tms320.c b/librz/arch/p/asm/asm_tms320.c index f5a971a2b83..02828afcd7e 100644 --- a/librz/arch/p/asm/asm_tms320.c +++ b/librz/arch/p/asm/asm_tms320.c @@ -61,6 +61,17 @@ static char *tms320_mnemonics(RzAsm *a, int id, bool json) { return tms320_c64x_mnemonics(a, id, json, ctx->c64x); } +char **tms320_cpu_descriptions() { + static char *cpu_desc[] = { + "c54x", "Texas Instruments TMS320C54x DSP family", + "c55x", "Texas Instruments TMS320C55x DSP family", + "c55x+", "Texas Instruments TMS320C55x+ DSP family", + "c64x", "Texas Instruments TMS320C64x DSP family", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_tms320 = { .name = "tms320", .arch = "tms320", @@ -73,4 +84,5 @@ RzAsmPlugin rz_asm_plugin_tms320 = { .fini = tms320_fini, .disassemble = &tms320_disassemble, .mnemonics = tms320_mnemonics, + .get_cpu_desc = tms320_cpu_descriptions, }; diff --git a/librz/arch/p/asm/asm_tricore_cs.c b/librz/arch/p/asm/asm_tricore_cs.c index ecdeaf36d07..af386dab5a1 100644 --- a/librz/arch/p/asm/asm_tricore_cs.c +++ b/librz/arch/p/asm/asm_tricore_cs.c @@ -103,6 +103,14 @@ static bool fini(void *u) { return true; } +char **tricore_cpu_descriptions() { + static char *cpu_desc[] = { + "tricore", "Generic TriCore CPU family by Infineon", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_tricore_cs = { .name = "tricore", .arch = "tricore", @@ -115,6 +123,7 @@ RzAsmPlugin rz_asm_plugin_tricore_cs = { .disassemble = &disassemble, .init = &init, .fini = &fini, + .get_cpu_desc = tricore_cpu_descriptions, }; #ifndef RZ_PLUGIN_INCORE diff --git a/librz/arch/p/asm/asm_xtensa_cs.c b/librz/arch/p/asm/asm_xtensa_cs.c index 3dba0341cde..77200bf4083 100644 --- a/librz/arch/p/asm/asm_xtensa_cs.c +++ b/librz/arch/p/asm/asm_xtensa_cs.c @@ -29,6 +29,16 @@ static int asm_xtensa_disassemble(RzAsm *a, RzAsmOp *op, const ut8 *buf, int len return -1; } +char **xtensa_cpu_descriptions() { + static char *cpu_desc[] = { + "esp32", "Xtensa microcontroller with Wi-Fi and Bluetooth capabilities", + "esp32s2", "Xtensa microcontroller with Wi-Fi and USB OTG support", + "esp8266", "Xtensa microcontroller with Wi-Fi support", + NULL + }; + return cpu_desc; +} + RzAsmPlugin rz_asm_plugin_xtensa_cs = { .name = "xtensa", .license = "LGPL3", @@ -41,4 +51,5 @@ RzAsmPlugin rz_asm_plugin_xtensa_cs = { .disassemble = asm_xtensa_disassemble, .init = &xtensa_init, .fini = &xtensa_fini, + .get_cpu_desc = xtensa_cpu_descriptions, }; diff --git a/librz/core/casm.c b/librz/core/casm.c index 12f54b949ff..6043dd75b63 100644 --- a/librz/core/casm.c +++ b/librz/core/casm.c @@ -219,6 +219,38 @@ RZ_API RzCmdStatus rz_core_asm_plugins_print(RZ_NONNULL RZ_BORROW RzCore *core, return RZ_CMD_STATUS_OK; } +RZ_API RzCmdStatus rz_core_cpu_descs_print(RZ_NONNULL RzCore *core, RZ_NONNULL const char *plugin) { + rz_return_val_if_fail(core && plugin && core->rasm, RZ_CMD_STATUS_ERROR); + RzAsm *a = core->rasm; + RzIterator *iter = ht_sp_as_iter(a->plugins); + RzList *plugin_list = rz_list_new_from_iterator(iter); + if (!plugin_list) { + rz_iterator_free(iter); + return RZ_CMD_STATUS_ERROR; + } + rz_list_sort(plugin_list, (RzListComparator)rz_asm_plugin_cmp, NULL); + RzListIter *it; + RzAsmPlugin *ap; + rz_list_foreach (plugin_list, it, ap) { + if (ap->cpus && RZ_STR_EQ(plugin, ap->name)) { + char **desc = ap->get_cpu_desc(); + if (!desc) { + rz_iterator_free(iter); + rz_list_free(plugin_list); + return RZ_CMD_STATUS_ERROR; + } + for (size_t i = 0; desc[i] != NULL; i += 2) { + rz_cons_printf("%-15s %s", desc[i], desc[i + 1]); + rz_cons_newline(); + } + break; + } + } + rz_iterator_free(iter); + rz_list_free(plugin_list); + return RZ_CMD_STATUS_OK; +} + // TODO: add support for byte-per-byte opcode search RZ_API RzList /**/ *rz_core_asm_strsearch(RzCore *core, const char *input, ut64 from, ut64 to, int maxhits, int regexp, int everyByte, int mode) { RzCoreAsmHit *hit; diff --git a/librz/core/cmd/cmd_analysis.c b/librz/core/cmd/cmd_analysis.c index 6c388d99f86..58a1eadbaa1 100644 --- a/librz/core/cmd/cmd_analysis.c +++ b/librz/core/cmd/cmd_analysis.c @@ -5500,6 +5500,10 @@ RZ_IPI RzCmdStatus rz_list_plugins_handler(RzCore *core, int argc, const char ** return rz_core_asm_plugins_print(core, NULL, state, NULL); } +RZ_IPI RzCmdStatus rz_list_cpu_details_handler(RzCore *core, int argc, const char **argv) { + return rz_core_cpu_descs_print(core, argv[1]); +} + RZ_IPI RzCmdStatus rz_analyse_name_handler(RzCore *core, int argc, const char **argv, RzCmdStateOutput *state) { if (argc > 1) { bool ret = rz_core_analysis_rename(core, argv[1], core->offset); diff --git a/librz/core/cmd_descs/cmd_analysis.yaml b/librz/core/cmd_descs/cmd_analysis.yaml index e50236d47a8..31fe49ff2ab 100644 --- a/librz/core/cmd_descs/cmd_analysis.yaml +++ b/librz/core/cmd_descs/cmd_analysis.yaml @@ -2396,12 +2396,22 @@ commands: type: RZ_CMD_ARG_TYPE_NUM - name: aL summary: List all asm/analysis plugins (e asm.arch=?) - cname: list_plugins - args: [] - type: RZ_CMD_DESC_TYPE_ARGV_STATE - modes: - - RZ_OUTPUT_MODE_STANDARD - - RZ_OUTPUT_MODE_JSON + subcommands: + - name: aL + summary: List all asm/analysis plugins (e asm.arch=?) or CPU details for a plugin. + cname: list_plugins + args: [] + type: RZ_CMD_DESC_TYPE_ARGV_STATE + modes: + - RZ_OUTPUT_MODE_STANDARD + - RZ_OUTPUT_MODE_JSON + - name: aLc + summary: Shows the CPU details for a specific plugin. + cname: list_cpu_details + args: + - name: plugin_name + type: RZ_CMD_ARG_TYPE_STRING + optional: false - name: ae summary: ESIL analysis commands subcommands: diff --git a/librz/core/cmd_descs/cmd_descs.c b/librz/core/cmd_descs/cmd_descs.c index ecb445c5e53..baf9a2f48f3 100644 --- a/librz/core/cmd_descs/cmd_descs.c +++ b/librz/core/cmd_descs/cmd_descs.c @@ -320,6 +320,7 @@ static const RzCmdDescArg analysis_syscall_dump_assembly_args[2]; static const RzCmdDescArg analysis_syscall_dump_c_args[2]; static const RzCmdDescArg analysis_syscall_name_args[2]; static const RzCmdDescArg analysis_syscall_number_args[2]; +static const RzCmdDescArg list_cpu_details_args[2]; static const RzCmdDescArg analyze_esil_eval_expr_args[2]; static const RzCmdDescArg analyze_esil_set_pc_args[2]; static const RzCmdDescArg analyze_esil_sdb_query_args[2]; @@ -6459,14 +6460,32 @@ static const RzCmdDescHelp analysis_syscall_number_help = { .args = analysis_syscall_number_args, }; +static const RzCmdDescHelp aL_help = { + .summary = "List all asm/analysis plugins (e asm.arch=?)", +}; static const RzCmdDescArg list_plugins_args[] = { { 0 }, }; static const RzCmdDescHelp list_plugins_help = { - .summary = "List all asm/analysis plugins (e asm.arch=?)", + .summary = "List all asm/analysis plugins (e asm.arch=?) or CPU details for a plugin.", .args = list_plugins_args, }; +static const RzCmdDescArg list_cpu_details_args[] = { + { + .name = "plugin_name", + .type = RZ_CMD_ARG_TYPE_STRING, + .flags = RZ_CMD_ARG_FLAG_LAST, + .optional = false, + + }, + { 0 }, +}; +static const RzCmdDescHelp list_cpu_details_help = { + .summary = "Shows the CPU details for a specific plugin.", + .args = list_cpu_details_args, +}; + static const RzCmdDescHelp ae_help = { .summary = "ESIL analysis commands", }; @@ -20847,8 +20866,10 @@ RZ_IPI void rzshell_cmddescs_init(RzCore *core) { RzCmdDesc *analysis_syscall_number_cd = rz_cmd_desc_argv_new(core->rcmd, as_cd, "asr", rz_analysis_syscall_number_handler, &analysis_syscall_number_help); rz_warn_if_fail(analysis_syscall_number_cd); - RzCmdDesc *list_plugins_cd = rz_cmd_desc_argv_state_new(core->rcmd, cmd_analysis_cd, "aL", RZ_OUTPUT_MODE_STANDARD | RZ_OUTPUT_MODE_JSON, rz_list_plugins_handler, &list_plugins_help); - rz_warn_if_fail(list_plugins_cd); + RzCmdDesc *aL_cd = rz_cmd_desc_group_state_new(core->rcmd, cmd_analysis_cd, "aL", RZ_OUTPUT_MODE_STANDARD | RZ_OUTPUT_MODE_JSON, rz_list_plugins_handler, &list_plugins_help, &aL_help); + rz_warn_if_fail(aL_cd); + RzCmdDesc *list_cpu_details_cd = rz_cmd_desc_argv_new(core->rcmd, aL_cd, "aLc", rz_list_cpu_details_handler, &list_cpu_details_help); + rz_warn_if_fail(list_cpu_details_cd); RzCmdDesc *ae_cd = rz_cmd_desc_group_new(core->rcmd, cmd_analysis_cd, "ae", rz_analyze_esil_eval_expr_handler, &analyze_esil_eval_expr_help, &ae_help); rz_warn_if_fail(ae_cd); diff --git a/librz/core/cmd_descs/cmd_descs.h b/librz/core/cmd_descs/cmd_descs.h index fb2ef1e5b2e..2d8fd37b261 100644 --- a/librz/core/cmd_descs/cmd_descs.h +++ b/librz/core/cmd_descs/cmd_descs.h @@ -777,6 +777,8 @@ RZ_IPI RzCmdStatus rz_analysis_syscall_name_handler(RzCore *core, int argc, cons RZ_IPI RzCmdStatus rz_analysis_syscall_number_handler(RzCore *core, int argc, const char **argv); // "aL" RZ_IPI RzCmdStatus rz_list_plugins_handler(RzCore *core, int argc, const char **argv, RzCmdStateOutput *state); +// "aLc" +RZ_IPI RzCmdStatus rz_list_cpu_details_handler(RzCore *core, int argc, const char **argv); // "ae" RZ_IPI RzCmdStatus rz_analyze_esil_eval_expr_handler(RzCore *core, int argc, const char **argv); // "aeH" diff --git a/librz/include/rz_asm.h b/librz/include/rz_asm.h index 821c9d2c71b..f0db9f17e6b 100644 --- a/librz/include/rz_asm.h +++ b/librz/include/rz_asm.h @@ -147,6 +147,7 @@ typedef struct rz_asm_plugin_t { RZ_OWN RzConfig *(*get_config)(void *plugin_data); const char *features; const char *platforms; + char **(*get_cpu_desc)(); } RzAsmPlugin; /** diff --git a/librz/include/rz_core.h b/librz/include/rz_core.h index 42210d93fa2..4d7034b2571 100644 --- a/librz/include/rz_core.h +++ b/librz/include/rz_core.h @@ -851,6 +851,7 @@ RZ_API void rz_core_asm_hit_free(void *_hit); RZ_API void rz_core_set_asm_configs(RzCore *core, char *arch, ut32 bits, int segoff); RZ_API char *rz_core_asm_search(RzCore *core, const char *input); RZ_API RzCmdStatus rz_core_asm_plugins_print(RZ_NONNULL RZ_BORROW RzCore *core, RZ_NULLABLE const char *arch, RZ_OUT RzCmdStateOutput *state, RZ_NULLABLE const char *flags); +RZ_API RzCmdStatus rz_core_cpu_descs_print(RZ_NONNULL RzCore *core, RZ_NONNULL const char *plugin); RZ_API RzList /**/ *rz_core_asm_strsearch(RzCore *core, const char *input, ut64 from, ut64 to, int maxhits, int regexp, int everyByte, int mode); RZ_API RzList /**/ *rz_core_asm_bwdisassemble(RzCore *core, ut64 addr, int n, int len); RZ_API RzList /**/ *rz_core_asm_back_disassemble_instr(RzCore *core, ut64 addr, int len, ut32 hit_count, ut32 extra_padding); diff --git a/test/db/cmd/cmd_aL b/test/db/cmd/cmd_aL new file mode 100644 index 00000000000..e58edba4ea4 --- /dev/null +++ b/test/db/cmd/cmd_aL @@ -0,0 +1,179 @@ +NAME=List all asm/analysis plugins (e asm.arch=?) +FILE== +CMDS=aL +EXPECT=<