HillCipher.qsf

# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
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# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
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# applicable agreement for further details.
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# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Full Version
# Date created = 12:16:32  January 07, 2016
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		HillCipher_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name DEVICE auto
set_global_assignment -name TOP_LEVEL_ENTITY hill_cipher
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "12:16:32  JANUARY 07, 2016"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name VHDL_FILE matrix_mult.vhd
set_global_assignment -name VECTOR_TEXT_FILE matrix_multiplier.vec
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name VHDL_FILE vector_mult.vhd
set_global_assignment -name VHDL_FILE matrix_mult_struct.vhd
set_global_assignment -name VHDL_FILE key_loader.vhd
set_global_assignment -name VHDL_FILE key_loader_struct.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE matrix_multiplier.vwf
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_simulation
set_global_assignment -name VECTOR_WAVEFORM_FILE key_loader.vwf
set_global_assignment -name VHDL_FILE key_inverter.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE key_inverter.vwf
set_global_assignment -name VHDL_FILE hill_cipher.vhd
set_global_assignment -name VHDL_FILE mux_loader.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE hill_cipher.vwf
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE "C:/Users/scarte9/ECSE487-Ass/hill_cipher.vwf"