From 9cc5dfcaa5d5a4f836f359da3d8512aba7df47c8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alexander=20Mei=C3=9Fner?= Date: Fri, 6 Sep 2024 16:53:08 +0200 Subject: [PATCH] Docs - fix bytecode spec (#589) * SUB32_REG will also cease to perform sign extension of results. * Fixes verification rules around call instructions. --- doc/bytecode.md | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/doc/bytecode.md b/doc/bytecode.md index 0990df49..0730d9f0 100644 --- a/doc/bytecode.md +++ b/doc/bytecode.md @@ -87,7 +87,8 @@ The following Rust equivalents assume that: | `0C` / `00001100` | from v2 | `add32 dst, src` | `dst = (dst as u32).wrapping_add(src as u32) as u64` | `14` / `00010100` | until v2 | `sub32 dst, imm` | `dst = (dst as u32).wrapping_sub(imm) as u64` | `14` / `00010100` | from v2 | `sub32 dst, imm` | `dst = imm.wrapping_sub(dst as u32) as u64` -| `1C` / `00011100` | all | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as u64` +| `1C` / `00011100` | until v2 | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as i32 as i64 as u64` +| `1C` / `00011100` | from v2 | `sub32 dst, src` | `dst = (dst as u32).wrapping_sub(src as u32) as u64` | `24` / `00100100` | until v2 | `mul32 dst, imm` | `dst = (dst as i32).wrapping_mul(imm as i32) as i64 as u64` | `2C` / `00101100` | until v2 | `mul32 dst, src` | `dst = (dst as i32).wrapping_mul(src as i32) as i64 as u64` | `34` / `00110100` | until v2 | `div32 dst, imm` | `dst = ((dst as u32) / imm) as u64` @@ -322,5 +323,6 @@ Verification - `hor64` is allowed - The offset of jump instructions must be limited to the range of the current function - `callx` source register is encoded in the src field -- The targets of syscalls (`call` instructions with src ≠ 0) must have been registered at verification time +- The targets of internal calls (`call` instructions with src ≠ 0) must have been registered at verification time +- The targets of syscalls (`call` instructions with src = 0) must have been registered at verification time - `add64 reg, imm` can use `r11` as destination register