diff --git a/ISSCC25/submitted_notebooks/PCA/PCA.ipynb b/ISSCC25/submitted_notebooks/PCA/PCA.ipynb new file mode 100644 index 00000000..292320ae --- /dev/null +++ b/ISSCC25/submitted_notebooks/PCA/PCA.ipynb @@ -0,0 +1,1426 @@ +{ + "cells": [ + { + "cell_type": "markdown", + "metadata": { + "id": "view-in-github", + "colab_type": "text" + }, + "source": [ + "\"Open" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "R0yzsajE0LWS" + }, + "source": [ + "# Build the ADC blocks: A Programmable Analog-to-Digital Converter Array" + ] + }, + { + "cell_type": "markdown", + "source": [ + "|Name|Affiliation |IEEE Member| SSCS Member|\n", + "|:--:|:----------:|:----------:|:-------:|\n", + "|Kun Lin| Tsinghua University| No |No|\n", + "|Zhishuai Zhang (Lead)
zhangzs21@mails.tsinghua.edu.cn|\tTsinghua University| Yes| Yes|\n", + "|Nan Sun (Advisor)| Tsinghua University| Yes| Yes|\n", + "|Lu Jie (Advisor) |Tsinghua University |Yes |Yes|\n" + ], + "metadata": { + "id": "9vGYQDCshC5u" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Abstract" + ], + "metadata": { + "id": "LJzIRcD6iJ57" + } + }, + { + "cell_type": "markdown", + "source": [ + "This project presents a reproducible and scalable design concept for analog-to-digital converters (ADCs): the programmable ADC array (PCA). The core idea involves assembling multiple medium-performance conversion blocks into an array, with programmable control over their timing and interconnections. This modular approach allows for the formation of various structures tailored to achieve different performance specifications. The project demonstrates the high programmability and flexibility of PCA by showcasing diverse timing configurations and conducting behavioral-level simulations. These demonstrations highlight the PCA's ability to adapt to varying signal requirements, underscoring its potential for resource pooling in multi-mode signal acquisition systems." + ], + "metadata": { + "id": "Nb97vhMSiNEg" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Introduction" + ], + "metadata": { + "id": "_KMfeXKLiR18" + } + }, + { + "cell_type": "markdown", + "source": [ + "There are growing diversity in mobile communication standards, and the requirements for bandwidth and accuracy of baseband signal quantization are also increasing. Designing a dedicated receiver chain for each possible signal mode requires large silicon area and high design costs. It is unsustainable as the number of signals continues to increase.\n", + "\n", + "
\n", + " \n", + "
\n", + "\n", + "The above problems also exist in other similar application scenarios, especially in such systems:\n", + "- There are many signal chains;\n", + "- The number of concurrent signals is uncertain;\n", + "- There are many possible signal modes and the performance varies greatly;\n", + "- The perception and quantization capabilities need to be dynamically adjusted according to the situation.\n", + "\n", + "***For such multi-mode and multi-frequency receivers, resource pool is all you need!***\n", + "\n", + "This project demonstrates a resource pool solution for the quantization stage, which is somewhat similar to the implementation of field programmable arrays in the realm of ADCs.\n", + "\n", + "Array resources can be allocated and scheduled between different signal chains and different modes, so a high degree of resource sharing can be achieved, making the best use of limited on-chip resources.\n", + "\n", + "The PCA is highly reproducible and scalable, and suitable for rapid development. With the conversion block as the basic unit, the number of blocks can be added and removed as needed, and the size of the resource pool can be tailored.\n" + ], + "metadata": { + "id": "ZPWi79CeiS2G" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Architecture" + ], + "metadata": { + "id": "WIWmeMw2jZ26" + } + }, + { + "cell_type": "markdown", + "source": [ + "PCA consists of an array of multiple configuration blocks (CBs). Multiple CBs can be combined in various ways—such as time-interleaved, pipelined, or in parallel—to create different ADC configurations that address a wide range of needs.\n", + "\n", + "Multiple input signals can be distributed to multiple CB samplers through a set of input buses. By configuring the input multiplexer, you can\n", + "- let one CB sample multiple signals in turn to achieve time division multiplexing;\n", + "- let multiple CBs sample different signals at the same time to achieve multitasking;\n", + "- let multiple CBs sample the same signal to suppress noise;\n", + "- let multiple CBs sample the same signal to achieve interleaving.\n" + ], + "metadata": { + "id": "Llsiqxfijda9" + } + }, + { + "cell_type": "markdown", + "source": [ + "Considering energy efficiency and advanced process compatibility, CBs are based on SAR ADCs. The residue of SAR conversion can be\n", + "- amplified and transmitted to one of the analog buses;\n", + "- received from one of the analog buses and injected into the CDAC;\n", + "- FIR filtered for noise-shaping\n", + "It is necessary to add configurable switched capacitor circuits for residual extraction, injection, and filtering.\n", + "
\n", + " \n", + "
\n", + "\n", + "The programmability of PCA is based on a description method called **timing table**.\n", + "\n", + "Note that although various SAR-based hybrid architectures differ in implementation, they are fundamentally composed of three operations: sampling, conversion, and residual processing. Different architectures are essentially different combinations and sequences of these three basic operations.\n", + "\n", + "So a timing table can be used to describe the working state of the PCA. Each row of the table represents a channel, and each column represents a time unit (named frame). The number of columns represents the cycle period. By specifying the behavior of each channel in each frame, the working mode of the entire array can be defined.\n", + "\n", + "It is a highly open and reusable timing framework that can be filled with a variety of different instruction primitives to describe a variety of ADC architectures. For example,\n" + ], + "metadata": { + "id": "Iv-6wNtRjxj-" + } + }, + { + "cell_type": "markdown", + "source": [ + "|Primitive|Meaning|Example|Note|\n", + "|---------|-------|-------|-----|\n", + "|SAM[ix][F]|Sample from bus [ix], (optional) flip input|SAM0, SAM1, SAM2F|ix=0, short input; ix=1, input bus 1; ix=2, input bus 2; etc. If [ix] is omitted, SAM1 by default|\n", + "|MSB|MSB conversion (bit 1-5)|MSB| |\n", + "|LSB|LSB conversion (bit 6-11)|LSB| |\n", + "|RST|Reset SAR logic and CDAC|RST| |\n", + "|OUT[ox]|Output to output bus [ox]|OUT1, OUT2|ox=1, output bus 1; ox=2, output bus 2; etc. If [ox] is omitted, OUT1 by default|\n", + "|AMP[ax][F]|Enable residue TX and transfer residue current to analog bus [ax], (optional) flip gm input|AMP0, AMP1, AMP1F|ax=1, analog bus 1; ax=2, analog bus 2; etc.|\n", + "|F[ax][P/N][cx][L]|Enable residue RX and receive residue from analog bus [ax] to a certain capacitor [cx], positively or negatively, (optional) use low bandwidth|F1P1, F1P2, F1P12, F1P01, F1P02, F1P012, F2P2, F2N1L|cx=0, Cmajor; cx=1, Cminor1; cx=2, Cminor2; etc.|\n", + "|CHS[cx1][cx2][cx3]|Charge share between two or more caps|CHS01, CHS012|\"F1P0 CHS01\" is the same as \"F1P1 CHS01\"|\n", + "|SRT[cx1][cx2]|Short one or more bridge capacitors|SRT0, SRT01|If [cx] is omitted, SRT0 by default|\n" + ], + "metadata": { + "id": "MeWC-ypZkylE" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Workflow" + ], + "metadata": { + "id": "maWNQNl0mbHQ" + } + }, + { + "cell_type": "markdown", + "metadata": { + "id": "fau8tp4X0LWU" + }, + "source": [ + "### Dependencies" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": { + "colab": { + "base_uri": "https://localhost:8080/" + }, + "id": "s25U5OWi0LWU", + "outputId": "d18bac25-0596-4cff-c355-21d75c9ad3d2" + }, + "outputs": [ + { + "output_type": "stream", + "name": "stdout", + "text": [ + "Cloning into 'SAR_ADC'...\n", + "remote: Enumerating objects: 589, done.\u001b[K\n", + "remote: Counting objects: 100% (589/589), done.\u001b[K\n", + "remote: Compressing objects: 100% (351/351), done.\u001b[K\n", + "remote: Total 589 (delta 359), reused 465 (delta 235), pack-reused 0 (from 0)\u001b[K\n", + "Receiving objects: 100% (589/589), 4.20 MiB | 15.77 MiB/s, done.\n", + "Resolving deltas: 100% (359/359), done.\n", + "/content/SAR_ADC/script\n" + ] + } + ], + "source": [ + "!git clone https://github.com/lin-k23/SAR_ADC.git\n", + "import pandas as pd\n", + "import os\n", + "%cd SAR_ADC/script\n", + "from preset_mdl import preset_mdl\n", + "from preset_pr import preset_pr\n", + "from signal_source import signal_source\n", + "from RISCA_core import RISCA_core\n", + "from analyser.analyser_new import Analyser\n", + "from util.load_assembler_xlsx import load_assembler_xlsx\n", + "from util.display_dataframe import display_dataframe\n", + "from util.select import select" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "5HKborS10LWU" + }, + "source": [ + "### Run Simulator" + ] + }, + { + "cell_type": "markdown", + "source": [ + "#### Single-Channel SAR" + ], + "metadata": { + "id": "Pr6u7gDRAbXM" + } + }, + { + "cell_type": "markdown", + "source": [ + "**Array Usage**\n", + "\n", + "
\n", + " \n", + "
\n", + "\n" + ], + "metadata": { + "id": "ebp8YUk32Qn2" + } + }, + { + "cell_type": "code", + "source": [ + "mdl = preset_mdl()\n", + "pr = preset_pr()\n", + "Mode='Single-Channel SAR' # @param ['Single-Channel SAR', '3xTI-SAR', '2-stage Pipe-Sar', '1st-order NS-SAR', '1st-order NS-SAR(with chopping)','3-stage Pipe-Sar'] {type:'string'}\n", + "pr['conf_name']=select(Mode)\n", + "pr['N_fft']=8192\n", + "pr_loaded = load_assembler_xlsx(os.path.join(\"../config\",pr['conf_name']))\n", + "pr.update(pr_loaded)\n", + "cfg_info = pd.DataFrame(pr[\"conf_table\"])\n", + "display_dataframe(cfg_info,pr[\"conf_name\"])" + ], + "metadata": { + "id": "Cj60d4Pcjlqu", + "outputId": "664891c5-0ac4-4583-e279-8ccb20b8ae67", + "colab": { + "base_uri": "https://localhost:8080/", + "height": 534 + } + }, + "execution_count": null, + "outputs": [ + { + "output_type": "stream", + "name": "stdout", + "text": [ + "Loading file: ../config/sar/timing_table.xlsx\n" + ] + }, + { + "output_type": "display_data", + "data": { + "text/plain": [ + "" + ], + "text/html": [ + "
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\n", + " \n", + "\n", + "\n", + "The above problems also exist in other similar application scenarios, especially in such systems:\n", + "- There are many signal chains;\n", + "- The number of concurrent signals is uncertain;\n", + "- There are many possible signal modes and the performance varies greatly;\n", + "- The perception and quantization capabilities need to be dynamically adjusted according to the situation.\n", + "\n", + "***For such multi-mode and multi-frequency receivers, resource pool is all you need!***\n", + "\n", + "This project demonstrates a resource pool solution for the quantization stage, which is somewhat similar to the implementation of field programmable arrays in the realm of ADCs.\n", + "\n", + "Array resources can be allocated and scheduled between different signal chains and different modes, so a high degree of resource sharing can be achieved, making the best use of limited on-chip resources.\n", + "\n", + "The PCA is highly reproducible and scalable, and suitable for rapid development. With the conversion block as the basic unit, the number of blocks can be added and removed as needed, and the size of the resource pool can be tailored.\n" + ], + "metadata": { + "id": "ZPWi79CeiS2G" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Architecture" + ], + "metadata": { + "id": "WIWmeMw2jZ26" + } + }, + { + "cell_type": "markdown", + "source": [ + "PCA consists of an array of multiple configuration blocks (CBs). Multiple CBs can be combined in various ways—such as time-interleaved, pipelined, or in parallel—to create different ADC configurations that address a wide range of needs.\n", + "\n", + "Multiple input signals can be distributed to multiple CB samplers through a set of input buses. By configuring the input multiplexer, you can\n", + "- let one CB sample multiple signals in turn to achieve time division multiplexing;\n", + "- let multiple CBs sample different signals at the same time to achieve multitasking;\n", + "- let multiple CBs sample the same signal to suppress noise;\n", + "- let multiple CBs sample the same signal to achieve interleaving.\n" + ], + "metadata": { + "id": "Llsiqxfijda9" + } + }, + { + "cell_type": "markdown", + "source": [ + "Considering energy efficiency and advanced process compatibility, CBs are based on SAR ADCs. The residue of SAR conversion can be\n", + "- amplified and transmitted to one of the analog buses;\n", + "- received from one of the analog buses and injected into the CDAC;\n", + "- FIR filtered for noise-shaping\n", + "It is necessary to add configurable switched capacitor circuits for residual extraction, injection, and filtering.\n", + "
\n", + " \n", + "
\n", + "\n", + "The programmability of PCA is based on a description method called **timing table**.\n", + "\n", + "Note that although various SAR-based hybrid architectures differ in implementation, they are fundamentally composed of three operations: sampling, conversion, and residual processing. Different architectures are essentially different combinations and sequences of these three basic operations.\n", + "\n", + "So a timing table can be used to describe the working state of the PCA. Each row of the table represents a channel, and each column represents a time unit (named frame). The number of columns represents the cycle period. By specifying the behavior of each channel in each frame, the working mode of the entire array can be defined.\n", + "\n", + "It is a highly open and reusable timing framework that can be filled with a variety of different instruction primitives to describe a variety of ADC architectures. For example,\n" + ], + "metadata": { + "id": "Iv-6wNtRjxj-" + } + }, + { + "cell_type": "markdown", + "source": [ + "|Primitive|Meaning|Example|Note|\n", + "|---------|-------|-------|-----|\n", + "|SAM[ix][F]|Sample from bus [ix], (optional) flip input|SAM0, SAM1, SAM2F|ix=0, short input; ix=1, input bus 1; ix=2, input bus 2; etc. If [ix] is omitted, SAM1 by default|\n", + "|MSB|MSB conversion (bit 1-5)|MSB| |\n", + "|LSB|LSB conversion (bit 6-11)|LSB| |\n", + "|RST|Reset SAR logic and CDAC|RST| |\n", + "|OUT[ox]|Output to output bus [ox]|OUT1, OUT2|ox=1, output bus 1; ox=2, output bus 2; etc. If [ox] is omitted, OUT1 by default|\n", + "|AMP[ax][F]|Enable residue TX and transfer residue current to analog bus [ax], (optional) flip gm input|AMP0, AMP1, AMP1F|ax=1, analog bus 1; ax=2, analog bus 2; etc.|\n", + "|F[ax][P/N][cx][L]|Enable residue RX and receive residue from analog bus [ax] to a certain capacitor [cx], positively or negatively, (optional) use low bandwidth|F1P1, F1P2, F1P12, F1P01, F1P02, F1P012, F2P2, F2N1L|cx=0, Cmajor; cx=1, Cminor1; cx=2, Cminor2; etc.|\n", + "|CHS[cx1][cx2][cx3]|Charge share between two or more caps|CHS01, CHS012|\"F1P0 CHS01\" is the same as \"F1P1 CHS01\"|\n", + "|SRT[cx1][cx2]|Short one or more bridge capacitors|SRT0, SRT01|If [cx] is omitted, SRT0 by default|\n" + ], + "metadata": { + "id": "MeWC-ypZkylE" + } + }, + { + "cell_type": "markdown", + "source": [ + "## Workflow" + ], + "metadata": { + "id": "maWNQNl0mbHQ" + } + }, + { + "cell_type": "markdown", + "metadata": { + "id": "fau8tp4X0LWU" + }, + "source": [ + "### Dependencies" + ] + }, + { + "cell_type": "code", + "source": [ + "!git clone https://github.com/lin-k23/SAR_ADC.git\n", + "import imp\n", + "from preset_mdl import preset_mdl\n", + "import preset_mdl\n", + "imp.reload(preset_mdl)\n", + "from preset_mdl import preset_mdl\n", + "\n", + "from analyser.analyser_new import Analyser\n", + "import analyser.analyser_new\n", + "imp.reload(analyser.analyser_new)\n", + "from analyser.analyser_new import Analyser" + ], + "metadata": { + "id": "bS2kivnlTxkr" + }, + "execution_count": null, + "outputs": [] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": { + "colab": { + "base_uri": "https://localhost:8080/" + }, + "id": "s25U5OWi0LWU", + "outputId": "d18bac25-0596-4cff-c355-21d75c9ad3d2" + }, + "outputs": [ + { + "output_type": "stream", + "name": "stdout", + "text": [ + "Cloning into 'SAR_ADC'...\n", + "remote: Enumerating objects: 589, done.\u001b[K\n", + "remote: Counting objects: 100% (589/589), done.\u001b[K\n", + "remote: Compressing objects: 100% (351/351), done.\u001b[K\n", + "remote: Total 589 (delta 359), reused 465 (delta 235), pack-reused 0 (from 0)\u001b[K\n", + "Receiving objects: 100% (589/589), 4.20 MiB | 15.77 MiB/s, done.\n", + "Resolving deltas: 100% (359/359), done.\n", + "/content/SAR_ADC/script\n" + ] + } + ], + "source": [ + "# !git clone https://github.com/lin-k23/SAR_ADC.git\n", + "import pandas as pd\n", + "import os\n", + "%cd SAR_ADC/script\n", + "from preset_mdl import preset_mdl\n", + "from preset_pr import preset_pr\n", + "from signal_source import signal_source\n", + "from RISCA_core import RISCA_core\n", + "from analyser.analyser_new import Analyser\n", + "from util.load_assembler_xlsx import load_assembler_xlsx\n", + "from util.display_dataframe import display_dataframe\n", + "from util.select import select" + ] + }, + { + "cell_type": "markdown", + "metadata": { + "id": "5HKborS10LWU" + }, + "source": [ + "### Run Simulator" + ] + }, + { + "cell_type": "markdown", + "source": [ + "#### Single-Channel SAR" + ], + "metadata": { + "id": "Pr6u7gDRAbXM" + } + }, + { + "cell_type": "markdown", + "source": [ + "**Array Usage**\n", + "\n", + "
\n", + " \n", + "
\n", + "\n" + ], + "metadata": { + "id": "ebp8YUk32Qn2" + } + }, + { + "cell_type": "code", + "source": [ + "mdl = preset_mdl()\n", + "pr = preset_pr()\n", + "Mode='Single-Channel SAR' # @param ['Single-Channel SAR', '3xTI-SAR', '2-stage Pipe-Sar', '1st-order NS-SAR', '1st-order NS-SAR(with chopping)','3-stage Pipe-Sar'] {type:'string'}\n", + "pr['conf_name']=select(Mode)\n", + "pr['N_fft']=8192\n", + "pr_loaded = load_assembler_xlsx(os.path.join(\"../config\",pr['conf_name']))\n", + "pr.update(pr_loaded)\n", + "cfg_info = pd.DataFrame(pr[\"conf_table\"])\n", + "display_dataframe(cfg_info,pr[\"conf_name\"])" + ], + "metadata": { + "id": "Cj60d4Pcjlqu", + "outputId": "664891c5-0ac4-4583-e279-8ccb20b8ae67", + "colab": { + "base_uri": "https://localhost:8080/", + "height": 534 + } + }, + "execution_count": null, + "outputs": [ + { + "output_type": "stream", + "name": "stdout", + "text": [ + "Loading file: ../config/sar/timing_table.xlsx\n" + ] + }, + { + "output_type": "display_data", + "data": { + "text/plain": [ + "" + ], + "text/html": [ + "
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