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Copy pathframebuffer_av_hw.tcl
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framebuffer_av_hw.tcl
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# TCL File Generated by Component Editor 11.0sp1
# Wed Jul 04 20:53:24 EDT 2012
# DO NOT MODIFY
# +-----------------------------------
# |
# | framebuffer_av "GB Framebuffer" v1.0
# | Jean Charles Vallieres 2012.07.04.20:53:24
# | Gameboy Framebuffer
# |
# | D:/dev/gbfpga/framebuffer_av.vhd
# |
# | ./framebuffer_av.vhd syn, sim
# |
# +-----------------------------------
# +-----------------------------------
# | request TCL package from ACDS 11.0
# |
package require -exact sopc 11.0
# |
# +-----------------------------------
# +-----------------------------------
# | module framebuffer_av
# |
set_module_property DESCRIPTION "Gameboy Framebuffer"
set_module_property NAME framebuffer_av
set_module_property VERSION 1.0
set_module_property INTERNAL false
set_module_property OPAQUE_ADDRESS_MAP true
set_module_property AUTHOR "Jean Charles Vallieres"
set_module_property DISPLAY_NAME "GB Framebuffer"
set_module_property TOP_LEVEL_HDL_FILE framebuffer_av.vhd
set_module_property TOP_LEVEL_HDL_MODULE framebuffer_av
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE true
set_module_property ANALYZE_HDL TRUE
set_module_property STATIC_TOP_LEVEL_MODULE_NAME framebuffer_av
set_module_property FIX_110_VIP_PATH false
# |
# +-----------------------------------
# +-----------------------------------
# | files
# |
add_file framebuffer_av.vhd {SYNTHESIS SIMULATION}
# |
# +-----------------------------------
# +-----------------------------------
# | parameters
# |
# |
# +-----------------------------------
# +-----------------------------------
# | display items
# |
# |
# +-----------------------------------
# +-----------------------------------
# | connection point clock
# |
add_interface clock clock end
set_interface_property clock clockRate 0
set_interface_property clock ENABLED true
add_interface_port clock clk clk Input 1
# |
# +-----------------------------------
# +-----------------------------------
# | connection point reset_sink
# |
add_interface reset_sink reset end
set_interface_property reset_sink associatedClock clock
set_interface_property reset_sink synchronousEdges DEASSERT
set_interface_property reset_sink ENABLED true
add_interface_port reset_sink rst_n reset_n Input 1
# |
# +-----------------------------------
# +-----------------------------------
# | connection point conduit_end
# |
add_interface conduit_end conduit end
set_interface_property conduit_end ENABLED true
add_interface_port conduit_end wr_addr export Output 8
add_interface_port conduit_end wren export Output 1
add_interface_port conduit_end q export Output 16
add_interface_port conduit_end next_line export Input 1
# |
# +-----------------------------------
# +-----------------------------------
# | connection point avalon_master
# |
add_interface avalon_master avalon start
set_interface_property avalon_master addressUnits SYMBOLS
set_interface_property avalon_master associatedClock clock
set_interface_property avalon_master associatedReset reset_sink
set_interface_property avalon_master bitsPerSymbol 8
set_interface_property avalon_master burstOnBurstBoundariesOnly false
set_interface_property avalon_master burstcountUnits WORDS
set_interface_property avalon_master doStreamReads false
set_interface_property avalon_master doStreamWrites false
set_interface_property avalon_master holdTime 0
set_interface_property avalon_master linewrapBursts false
set_interface_property avalon_master maximumPendingReadTransactions 0
set_interface_property avalon_master readLatency 0
set_interface_property avalon_master readWaitTime 1
set_interface_property avalon_master setupTime 0
set_interface_property avalon_master timingUnits Cycles
set_interface_property avalon_master writeWaitTime 0
set_interface_property avalon_master ENABLED true
add_interface_port avalon_master datavalid readdatavalid Input 1
add_interface_port avalon_master readdata readdata Input 16
add_interface_port avalon_master waitrequest waitrequest Input 1
add_interface_port avalon_master address address Output 32
add_interface_port avalon_master flush flush Output 1
add_interface_port avalon_master read read Output 1
# |
# +-----------------------------------