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blitter.cpp
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/*
* UAE - The Un*x Amiga Emulator
*
* Custom chip emulation
*
* (c) 1995 Bernd Schmidt, Alessandro Bissacco
* (c) 2002 - 2024 Toni Wilen
*/
#define SPEEDUP 1
#define BLITTER_DEBUG 0
#include "sysconfig.h"
#include "sysdeps.h"
#include "options.h"
#include "uae.h"
#include "memory.h"
#include "custom.h"
#include "events.h"
#include "newcpu.h"
#include "blitter.h"
#include "blit.h"
#include "savestate.h"
#include "debug.h"
#define BLIT_TRACE 0
#if BLIT_TRACE
static uae_u32 *bdp;
static uae_u32 blit_tracer[2 * 10000000];
#endif
// 1 = logging
// 2 = no wait detection
// 4 = no D
// 8 = instant
// 16 = activate debugger if weird things
// 32 = logging (no line)
#if BLITTER_DEBUG
int log_blitter = 1 | 16;
#else
int log_blitter = 0;
#endif
extern uae_u8 agnus_hpos;
#define BLTCHA 0x800
#define BLTCHB 0x400
#define BLTCHC 0x200
#define BLTCHD 0x100
#define BLTDOFF 0x80
#define BLTEFE 0x10
#define BLTIFE 0x08
#define BLTFILL (BLTEFE | BLTIFE)
#define BLTFC 0x04
#define BLTDESC 0x02
#define BLTLINE 0x01
#define BLTSIGN 0x40
#define BLTOVF 0x20
#define BLTSUD 0x10
#define BLTSUL 0x08
#define BLTAUL 0x04
#define BLTSING 0x02
#define BLITTER_PIPELINE_BLIT 0x0008
#define BLITTER_PIPELINE_ADDMOD 0x0010
#define BLITTER_PIPELINE_LINE 0x0020
#define BLITTER_PIPELINE_PROCESS 0x0200
#define BLITTER_PIPELINE_FINISHED 0x0400
#define BLITTER_PIPELINE_LASTD 0x1000
#define BLITTER_PIPELINE_FIRST 0x2000
#define BLITTER_PIPELINE_LAST 0x4000
#define BLIT_NASTY_CPU_STEAL_CYCLE_COUNT 3
/* we must not change ce-mode while blitter is running.. */
static int blitter_cycle_exact, immediate_blits;
static int blt_statefile_type;
static uae_u16 bltcon0_next, bltcon1_next;
bool blitter_delayed_update;
static uae_u16 blineb;
static int blitline, blitfc, blitfill, blitife, blit_ovf, blitfill_old;
static int blitdesc_next, blitdesc;
static int blitline_started, blitlineloop;
static int blitonedot, blitlinepixel, blitlinepixel2;
static int blit_add;
static int blit_modadda, blit_modaddb, blit_modaddc, blit_modaddd;
static int blit_ch;
static bool shifter_skip_b, shifter_skip_y;
static bool shifter_skip_b_old, shifter_skip_y_old;
static uae_u16 bltcon0_old, bltcon1_old;
static bool shifter[4], shifter_out;
static bool shifter_d[4], shifter_d_armed;
static bool shifter_d_aga[3];
static bool blitline_c, blitfill_c;
static int blitter_delayed_debug;
#ifdef BLITTER_SLOWDOWNDEBUG
static int blitter_slowdowndebug;
#endif
struct bltinfo blt_info;
static uae_u8 blit_filltable[256][4][2];
uae_u32 blit_masktable[BLITTER_MAX_WORDS];
static int blit_cyclecounter;
static int blit_maxcyclecounter, blit_slowdown, blit_totalcyclecounter;
static int blit_misscyclecounter;
#ifdef CPUEMU_13
static int blitter_cyclecounter;
static int blitter_hcounter;
static int blitter_vcounter;
#endif
static evt_t blit_firstline_cycles;
static evt_t blit_first_cycle;
static int blit_last_cycle, blit_dmacount, blit_cyclecount;
static int blt_delayed_irq;
static int blit_dof;
static uae_u16 debug_bltcon0, debug_bltcon1;
static uae_u32 debug_bltapt, debug_bltbpt, debug_bltcpt, debug_bltdpt;
static uae_u16 debug_bltamod, debug_bltbmod, debug_bltcmod, debug_bltdmod;
static uae_u32 debug_bltafwm, debug_bltalwm;
static uae_u32 debug_bltpc;
static int debug_bltcop;
static uae_u16 debug_bltsizev, debug_bltsizeh;
static uae_u16 debug_bltadat, debug_bltbdat, debug_bltcdat;
#define BLITTER_MAX_PIPELINED_CYCLES 4
#define CYCLECOUNT_FINISHED -1000
#define CYCLECOUNT_START 2
/*
Blitter Idle Cycle:
Cycles that are free cycles (available for CPU) and
are not used by any other Agnus DMA channel. Blitter
idle cycle is not "used" by blitter, CPU can still use
it normally if it needs the bus.
same in both block and line modes
number of cycles, initial cycle, main cycle
*/
#if 0
#define DIAGSIZE 10
static const int blit_cycle_diagram[][DIAGSIZE] =
{
{ 2, 0,0, 0,0 }, /* 0 -- */
{ 2, 0,0, 0,4 }, /* 1 -D */
{ 2, 0,3, 0,3 }, /* 2 -C */
{ 3, 0,3,0, 0,3,4 }, /* 3 -CD */
{ 3, 0,2,0, 0,2,0 }, /* 4 -B- */
{ 3, 0,2,0, 0,2,4 }, /* 5 -BD */
{ 3, 0,2,3, 0,2,3 }, /* 6 -BC */
{ 4, 0,2,3,0, 0,2,3,4 }, /* 7 -BCD */
{ 2, 1,0, 1,0 }, /* 8 A- */
{ 2, 1,0, 1,4 }, /* 9 AD */
{ 2, 1,3, 1,3 }, /* A AC */
{ 3, 1,3,0, 1,3,4, }, /* B ACD */
{ 3, 1,2,0, 1,2,0 }, /* C AB- */
{ 3, 1,2,0, 1,2,4 }, /* D ABD */
{ 3, 1,2,3, 1,2,3 }, /* E ABC */
{ 4, 1,2,3,0, 1,2,3,4 } /* F ABCD */
};
#endif
/*
following 4 channel combinations in fill mode have extra
idle cycle added (still requires free bus cycle)
Condition: If D without C: Add extra cycle.
*/
#if 0
// Cycle sequences are now generated using same
// logic as real blitter. Tables are not used anymore.
static const int blit_cycle_diagram_fill[][DIAGSIZE] =
{
{ 0 }, /* 0 -- */
{ 3, 0,0,0, 0,4,0 }, /* 1 -D */
{ 0 }, /* 2 -C */
{ 0 }, /* 3 -CD */
{ 0 }, /* 4 -B- */
{ 4, 0,2,0,0, 0,2,4,0 }, /* 5 -BD */
{ 0 }, /* 6 -BC */
{ 0 }, /* 7 -BCD */
{ 0 }, /* 8 A- */
{ 3, 1,0,0, 1,4,0 }, /* 9 AD */
{ 0 }, /* A AC */
{ 0 }, /* B ACD */
{ 0 }, /* C AB- */
{ 4, 1,2,0,0, 1,2,4,0 }, /* D ABD */
{ 0 }, /* E ABC */
{ 0 }, /* F ABCD */
};
#endif
/*
-C-D C-D- ... C-D- --
line draw takes 4 cycles (-C-D)
idle cycles do the same as above, 2 dma fetches
(read from C, write to D, but see below)
Oddities:
- first word is written to address pointed by BLTDPT
but all following writes go to address pointed by BLTCPT!
(some kind of internal copy because all bus cyles are
using normal BLTDDAT)
- BLTDMOD is ignored by blitter (BLTCMOD is used)
- state of D-channel enable bit does not matter!
- disabling A-channel freezes the content of BPLAPT
- C-channel disabled: nothing is written
There is one tricky situation, writing to DFF058 just before
last D write cycle (which is normally free) does not disturb
blitter operation, final D is still written correctly before
blitter starts normally (after 2 idle cycles)
There is at least one demo that does this..
*/
/* Copper pointer to Blitter register copy bug
1: -d = D (-D)
2: -c = C (-C)
3: - (-CD)
4: - (-B-)
5: - (-BD)
6: - (-BC)
7: -BcD = C, -BCd = D
8: - (A-)
9: - (AD)
A: - (AC)
B: A (ACD)
C: - (AB-)
D: - (ABD-)
E: - (ABC)
F: AxBxCxD = -, aBxCxD = A,
1FE,8C,RGA,8C
*/
void build_blitfilltable(void)
{
uae_u32 fillmask;
for (int i = 0; i < BLITTER_MAX_WORDS; i++) {
blit_masktable[i] = 0xFFFF;
}
for (int d = 0; d < 256; d++) {
for (int i = 0; i < 4; i++) {
int fc = i & 1;
uae_u8 data = d;
for (fillmask = 1; fillmask != 0x100; fillmask <<= 1) {
uae_u16 tmp = data;
if (fc) {
if (i & 2)
data |= fillmask;
else
data ^= fillmask;
}
if (tmp & fillmask) fc = !fc;
}
blit_filltable[d][i][0] = data;
blit_filltable[d][i][1] = fc;
}
}
}
static void record_dma_blit_val(uae_u32 v)
{
#ifdef DEBUGGER
if (debug_dma && blitter_cycle_exact) {
record_dma_read_value(v);
}
if (memwatch_enabled) {
debug_getpeekdma_value(v);
}
#endif
}
static void record_dma_blit(uae_u16 reg, uae_u16 v, uae_u32 addr)
{
#ifdef DEBUGGER
if (debug_dma && blitter_cycle_exact) {
if (reg == 0) {
record_dma_write(reg, v, addr, DMARECORD_BLITTER, 3 + (blitline_c ? 0x20 : (blitfill_c ? 0x10 : 0)));
} else {
int r = 0;
if (reg == 0x70)
r = 2;
if (reg == 0x72)
r = 1;
if (reg == 0x74)
r = 0;
record_dma_read(reg, addr, DMARECORD_BLITTER, r + (blitline_c ? 0x20 : (blitfill_c ? 0x10 : 0)));
}
}
if (memwatch_enabled) {
if (reg == 0) {
uae_u32 mask = MW_MASK_BLITTER_D_N;
if (blitfill_c)
mask = MW_MASK_BLITTER_D_F;
if (blitline_c)
mask = MW_MASK_BLITTER_D_L;
debug_putpeekdma_chipram(addr, v, mask, reg);
} else if (reg == 0x70) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_C, reg);
} else if (reg == 0x72) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_B, reg);
} else if (reg == 0x74) {
debug_getpeekdma_chipram(addr, MW_MASK_BLITTER_A, reg);
}
}
#endif
}
static void blitter_debugsave(int copper, uaecptr pc)
{
debug_bltcon0 = blt_info.bltcon0;
debug_bltcon1 = blt_info.bltcon1;
debug_bltsizev = blt_info.vblitsize;
debug_bltsizeh = blt_info.hblitsize;
debug_bltapt = blt_info.bltapt;
debug_bltbpt = blt_info.bltbpt;
debug_bltcpt = blt_info.bltcpt;
debug_bltdpt = blt_info.bltdpt;
debug_bltadat = blt_info.bltadat;
debug_bltbdat = blt_info.bltbdat;
debug_bltcdat = blt_info.bltcdat;
debug_bltamod = blt_info.bltamod;
debug_bltbmod = blt_info.bltbmod;
debug_bltcmod = blt_info.bltcmod;
debug_bltdmod = blt_info.bltdmod;
debug_bltafwm = blt_info.bltafwm;
debug_bltalwm = blt_info.bltalwm;
debug_bltpc = pc;
debug_bltcop = copper;
}
static void blitter_dump(void)
{
int chipsize = currprefs.chipmem.size;
console_out_f(_T("PT A=%08X B=%08X C=%08X D=%08X\n"), blt_info.bltapt, blt_info.bltbpt, blt_info.bltcpt, blt_info.bltdpt);
console_out_f(_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"),
blt_info.bltcon0, blt_info.bltcon1, blt_info.bltadat, blt_info.bltbdat, blt_info.bltcdat);
console_out_f(_T("AFWM=%04X ALWM=%04X MOD A=%04X B=%04X C=%04X D=%04X\n"),
blt_info.bltafwm, blt_info.bltalwm,
blt_info.bltamod & 0xffff, blt_info.bltbmod & 0xffff, blt_info.bltcmod & 0xffff, blt_info.bltdmod & 0xffff);
console_out_f(_T("PC=%08X DMA=%d\n"), m68k_getpc(), dmaen (DMA_BLITTER));
if (((blt_info.bltcon0 & BLTCHA) && blt_info.bltapt >= chipsize) || ((blt_info.bltcon0 & BLTCHB) && blt_info.bltbpt >= chipsize) ||
((blt_info.bltcon0 & BLTCHC) && blt_info.bltcpt >= chipsize) || ((blt_info.bltcon0 & BLTCHD) && blt_info.bltdpt >= chipsize))
console_out_f(_T("PT outside of chipram\n"));
}
void blitter_debugdump(void)
{
console_out(_T("Blitter registers at start:\n"));
console_out_f(_T("PT A=%08X B=%08X C=%08X D=%08X\n"), debug_bltapt, debug_bltbpt, debug_bltcpt, debug_bltdpt);
console_out_f(_T("CON0=%04X CON1=%04X DAT A=%04X B=%04X C=%04X\n"),
debug_bltcon0, debug_bltcon1, debug_bltadat, debug_bltbdat, debug_bltcdat);
console_out_f(_T("AFWM=%04X ALWM=%04X MOD A=%04X B=%04X C=%04X D=%04X\n"),
debug_bltafwm, debug_bltalwm, debug_bltamod, debug_bltbmod, debug_bltcmod, debug_bltdmod);
console_out_f(_T("COP=%d PC=%08X\n"), debug_bltcop, debug_bltpc);
console_out(_T("Blitter registers now:\n"));
blitter_dump();
}
static bool blit_pending(void)
{
if (shifter_d_armed || shifter[0] || shifter[1] || shifter[2] || shifter[3] ||
shifter_d[0] || shifter_d[1] || shifter_d[2] || shifter_d[3] ||
shifter_d_aga[0] || shifter_d_aga[1] || shifter_d_aga[2]) {
return true;
}
return false;
}
static void markidlecycle(void)
{
#ifdef DEBUGGER
if (debug_dma && blit_pending()) {
record_dma_event(DMA_EVENT_BLITSTARTFINISH);
}
#endif
}
// blitter interrupt is set (and busy bit cleared) when
// last "main" cycle has been finished, any non-linedraw
// D-channel blit still needs 2 more cycles before final
// D is written (idle cycle, final D write)
//
// According to schematics, AGA has workaround delay circuit
// that adds 2 extra cycles if D is enabled and not line mode.
//
// line draw interrupt triggers when last D is written
// (or cycle where last D write would have been if
// ONEDOT was active)
static void blitter_interrupt(void)
{
#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITIRQ);
}
#endif
if (blt_info.blit_interrupt) {
return;
}
blt_info.blit_interrupt = 1;
INTREQ_INT(6, 3);
}
static void blitter_end(void)
{
blt_info.blit_main = 0;
blt_info.blit_queued = 0;
event2_remevent(ev2_blitter);
unset_special(SPCFLAG_BLTNASTY);
if (log_blitter & 1) {
if (blt_info.vblitsize > 100) {
blitter_dump();
}
write_log(_T("cycles %d, missed %d, total %d\n"),
blit_totalcyclecounter, blit_misscyclecounter, blit_totalcyclecounter + blit_misscyclecounter);
}
}
static void blitter_done_all(bool all)
{
blt_info.blit_main = 0;
blt_info.blit_queued = blitter_cycle_exact ? BLITTER_MAX_PIPELINED_CYCLES : 0;
blt_info.finishcycle_dmacon = get_cycles();
blt_info.finishcycle_copper = get_cycles() + 1 * CYCLE_UNIT;
blitter_interrupt();
if (all) {
blitter_done_notify();
}
}
static void blit_chipmem_agnus_wput(uaecptr addr, uae_u32 w, uae_u32 typemask)
{
if (!(log_blitter & 4)) {
if (blit_dof) {
w = regs.chipset_latch_rw;
}
#ifdef DEBUGGER
debug_putpeekdma_chipram(addr, w, typemask, 0x000);
#endif
chipmem_wput_indirect(addr, w);
regs.chipset_latch_rw = w;
}
}
static void blitter_dofast(void)
{
int i,j;
uaecptr bltadatptr = 0, bltbdatptr = 0, bltcdatptr = 0, bltddatptr = 0;
uae_u8 mt = blt_info.bltcon0 & 0xFF;
uae_u16 ashift = blt_info.bltcon0 >> 12;
uae_u16 bshift = blt_info.bltcon1 >> 12;
blit_masktable[0] = blt_info.bltafwm;
blit_masktable[blt_info.hblitsize - 1] &= blt_info.bltalwm;
if (blt_info.bltcon0 & BLTCHA) {
bltadatptr = blt_info.bltapt;
blt_info.bltapt += (blt_info.hblitsize * 2 + blt_info.bltamod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHB) {
bltbdatptr = blt_info.bltbpt;
blt_info.bltbpt += (blt_info.hblitsize * 2 + blt_info.bltbmod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHC) {
bltcdatptr = blt_info.bltcpt;
blt_info.bltcpt += (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHD) {
bltddatptr = blt_info.bltdpt;
blt_info.bltdpt += (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize;
}
#if SPEEDUP
if (blitfunc_dofast[mt] && !blitfill) {
(*blitfunc_dofast[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info);
} else
#endif
{
uae_u32 blitbhold = blt_info.bltbhold;
int ashift = blt_info.bltcon0 >> 12;
int bshift = blt_info.bltcon1 >> 12;
uaecptr dstp = 0;
int dodst = 0;
for (j = 0; j < blt_info.vblitsize; j++) {
blitfc = !!(blt_info.bltcon1 & BLTFC);
for (i = 0; i < blt_info.hblitsize; i++) {
uae_u32 bltadat, blitahold;
if (bltadatptr) {
blt_info.bltadat = bltadat = chipmem_wget_indirect (bltadatptr);
bltadatptr += 2;
} else
bltadat = blt_info.bltadat;
bltadat &= blit_masktable[i];
blitahold = (((uae_u32)blt_info.bltaold << 16) | bltadat) >> ashift;
blt_info.bltaold = bltadat;
if (bltbdatptr) {
uae_u16 bltbdat = chipmem_wget_indirect (bltbdatptr);
bltbdatptr += 2;
blitbhold = (((uae_u32)blt_info.bltbold << 16) | bltbdat) >> bshift;
blt_info.bltbold = bltbdat;
blt_info.bltbdat = bltbdat;
}
if (bltcdatptr) {
blt_info.bltcdat = chipmem_wget_indirect (bltcdatptr);
bltcdatptr += 2;
}
if (dodst)
blit_chipmem_agnus_wput(dstp, blt_info.bltddat, MW_MASK_BLITTER_D_N);
blt_info.bltddat = blit_func(blitahold, blitbhold, blt_info.bltcdat, mt) & 0xFFFF;
if (blitfill) {
uae_u16 d = blt_info.bltddat;
int ifemode = blitife ? 2 : 0;
int fc1 = blit_filltable[d & 255][ifemode + blitfc][1];
blt_info.bltddat = (blit_filltable[d & 255][ifemode + blitfc][0]
+ (blit_filltable[d >> 8][ifemode + fc1][0] << 8));
blitfc = blit_filltable[d >> 8][ifemode + fc1][1];
}
if (blt_info.bltddat)
blt_info.blitzero = 0;
if (bltddatptr) {
dodst = 1;
dstp = bltddatptr;
bltddatptr += 2;
}
}
if (bltadatptr)
bltadatptr += blt_info.bltamod;
if (bltbdatptr)
bltbdatptr += blt_info.bltbmod;
if (bltcdatptr)
bltcdatptr += blt_info.bltcmod;
if (bltddatptr)
bltddatptr += blt_info.bltdmod;
}
if (dodst)
blit_chipmem_agnus_wput(dstp, blt_info.bltddat, MW_MASK_BLITTER_D_N);
blt_info.bltbhold = blitbhold;
}
blit_masktable[0] = 0xFFFF;
blit_masktable[blt_info.hblitsize - 1] = 0xFFFF;
blt_info.blit_main = 0;
}
static void blitter_dofast_desc(void)
{
int i,j;
uaecptr bltadatptr = 0, bltbdatptr = 0, bltcdatptr = 0, bltddatptr = 0;
uae_u8 mt = blt_info.bltcon0 & 0xFF;
uae_u16 ashift = 16 - (blt_info.bltcon0 >> 12);
uae_u16 bshift = 16 - (blt_info.bltcon1 >> 12);
blit_masktable[0] = blt_info.bltafwm;
blit_masktable[blt_info.hblitsize - 1] &= blt_info.bltalwm;
if (blt_info.bltcon0 & BLTCHA) {
bltadatptr = blt_info.bltapt;
blt_info.bltapt -= (blt_info.hblitsize * 2 + blt_info.bltamod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHB) {
bltbdatptr = blt_info.bltbpt;
blt_info.bltbpt -= (blt_info.hblitsize * 2 + blt_info.bltbmod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHC) {
bltcdatptr = blt_info.bltcpt;
blt_info.bltcpt -= (blt_info.hblitsize * 2 + blt_info.bltcmod) * blt_info.vblitsize;
}
if (blt_info.bltcon0 & BLTCHD) {
bltddatptr = blt_info.bltdpt;
blt_info.bltdpt -= (blt_info.hblitsize * 2 + blt_info.bltdmod) * blt_info.vblitsize;
}
#if SPEEDUP
if (blitfunc_dofast_desc[mt] && !blitfill) {
(*blitfunc_dofast_desc[mt])(bltadatptr, bltbdatptr, bltcdatptr, bltddatptr, &blt_info);
} else
#endif
{
uae_u32 blitbhold = blt_info.bltbhold;
uaecptr dstp = 0;
int dodst = 0;
for (j = 0; j < blt_info.vblitsize; j++) {
blitfc = !!(blt_info.bltcon1 & BLTFC);
for (i = 0; i < blt_info.hblitsize; i++) {
uae_u32 bltadat, blitahold;
if (bltadatptr) {
bltadat = blt_info.bltadat = chipmem_wget_indirect (bltadatptr);
bltadatptr -= 2;
} else
bltadat = blt_info.bltadat;
bltadat &= blit_masktable[i];
blitahold = (((uae_u32)bltadat << 16) | blt_info.bltaold) >> ashift;
blt_info.bltaold = bltadat;
if (bltbdatptr) {
uae_u16 bltbdat = chipmem_wget_indirect (bltbdatptr);
bltbdatptr -= 2;
blitbhold = (((uae_u32)bltbdat << 16) | blt_info.bltbold) >> bshift;
blt_info.bltbold = bltbdat;
blt_info.bltbdat = bltbdat;
}
if (bltcdatptr) {
blt_info.bltcdat = blt_info.bltbdat = chipmem_wget_indirect (bltcdatptr);
bltcdatptr -= 2;
}
if (dodst)
blit_chipmem_agnus_wput(dstp, blt_info.bltddat, MW_MASK_BLITTER_D_N);
blt_info.bltddat = blit_func(blitahold, blitbhold, blt_info.bltcdat, mt) & 0xFFFF;
if (blitfill) {
uae_u16 d = blt_info.bltddat;
int ifemode = blitife ? 2 : 0;
int fc1 = blit_filltable[d & 255][ifemode + blitfc][1];
blt_info.bltddat = (blit_filltable[d & 255][ifemode + blitfc][0]
+ (blit_filltable[d >> 8][ifemode + fc1][0] << 8));
blitfc = blit_filltable[d >> 8][ifemode + fc1][1];
}
if (blt_info.bltddat)
blt_info.blitzero = 0;
if (bltddatptr) {
dstp = bltddatptr;
dodst = 1;
bltddatptr -= 2;
}
}
if (bltadatptr)
bltadatptr -= blt_info.bltamod;
if (bltbdatptr)
bltbdatptr -= blt_info.bltbmod;
if (bltcdatptr)
bltcdatptr -= blt_info.bltcmod;
if (bltddatptr)
bltddatptr -= blt_info.bltdmod;
}
if (dodst)
blit_chipmem_agnus_wput(dstp, blt_info.bltddat, MW_MASK_BLITTER_D_N);
blt_info.bltbhold = blitbhold;
}
blit_masktable[0] = 0xFFFF;
blit_masktable[blt_info.hblitsize - 1] = 0xFFFF;
blt_info.blit_main = 0;
}
static void blitter_line_read_b(void)
{
if (blt_info.bltcon0 & BLTCHB) {
// B (normally not enabled)
record_dma_blit(0x72, 0, blt_info.bltbpt);
blt_info.bltbdat = chipmem_wget_indirect(blt_info.bltbpt);
regs.chipset_latch_rw = blt_info.bltbdat;
record_dma_blit_val(blt_info.bltbdat);
blt_info.bltbpt += blt_info.bltbmod;
}
}
static void blitter_line_read_c(void)
{
if (blt_info.bltcon0 & BLTCHC) {
// C
record_dma_blit(0x70, 0, blt_info.bltcpt);
blt_info.bltcdat = chipmem_wget_indirect(blt_info.bltcpt);
regs.chipset_latch_rw = blt_info.bltcdat;
record_dma_blit_val(blt_info.bltcdat);
}
}
static void blitter_line_write(void)
{
/* D-channel state has no effect on linedraw, but C must be enabled or nothing is drawn! */
if (blt_info.bltcon0 & BLTCHC) {
blit_chipmem_agnus_wput(blt_info.bltdpt, blt_info.bltddat, MW_MASK_BLITTER_D_L);
}
}
static void blitter_line_minterm_extra(void)
{
int ashift = blt_info.bltcon0 >> 12;
// never first or last, no masking needed.
uae_u16 blitahold = blt_info.bltadat >> ashift;
blt_info.bltahold2 = blitahold;
blt_info.bltbhold2 = blt_info.bltbhold;
blt_info.bltchold2 = blt_info.bltcdat;
}
static void blitter_line_adat(void)
{
int ashift = blt_info.bltcon0 >> 12;
blt_info.bltaold = (((uae_u32)blt_info.bltaold << 16) | (blt_info.bltadat & blt_info.bltafwm)) >> ashift;
}
static void blitter_line_proc_apt(void)
{
if (blt_info.bltcon0 & BLTCHA) {
bool sign = (blt_info.bltcon1 & BLTSIGN) != 0;
if (sign)
blt_info.bltapt += (uae_s16)blt_info.bltbmod;
else
blt_info.bltapt += (uae_s16)blt_info.bltamod;
}
}
static void blitter_line_ovf(void)
{
uae_u16 ashift = blt_info.bltcon0 >> 12;
ashift += blit_ovf;
ashift &= 15;
blt_info.bltcon0 &= 0x0fff;
blt_info.bltcon0 |= ashift << 12;
blit_ovf = 0;
}
static void blitter_line_incx(void)
{
uae_u16 ashift = blt_info.bltcon0 >> 12;
if (ashift == 15) {
blt_info.bltcpt += 2;
}
blit_ovf = 1;
}
static void blitter_line_decx(void)
{
uae_u16 ashift = blt_info.bltcon0 >> 12;
if (ashift == 0) {
blt_info.bltcpt -= 2;
}
blit_ovf = -1;
}
static void blitter_line_decy(void)
{
if (blt_info.bltcon0 & BLTCHC) {
blt_info.bltcpt -= blt_info.bltcmod;
blitonedot = 0;
}
}
static void blitter_line_incy(void)
{
if (blt_info.bltcon0 & BLTCHC) {
blt_info.bltcpt += blt_info.bltcmod;
blitonedot = 0;
}
}
static void blitter_line_proc_cpt_y(void)
{
bool sign = (blt_info.bltcon1 & BLTSIGN) != 0;
if (!sign) {
if (blt_info.bltcon1 & BLTSUD) {
if (blt_info.bltcon1 & BLTSUL)
blitter_line_decy();
else
blitter_line_incy();
}
}
if (!(blt_info.bltcon1 & BLTSUD)) {
if (blt_info.bltcon1 & BLTAUL)
blitter_line_decy();
else
blitter_line_incy();
}
}
static void blitter_line_proc_cpt_x(void)
{
bool sign = (blt_info.bltcon1 & BLTSIGN) != 0;
if (!sign) {
if (!(blt_info.bltcon1 & BLTSUD)) {
if (blt_info.bltcon1 & BLTSUL)
blitter_line_decx();
else
blitter_line_incx();
}
}
if (blt_info.bltcon1 & BLTSUD) {
if (blt_info.bltcon1 & BLTAUL)
blitter_line_decx();
else
blitter_line_incx();
}
}
static void blitter_line_proc_status(void)
{
blitlinepixel = !(blt_info.bltcon1 & BLTSING) || ((blt_info.bltcon1 & BLTSING) && !blitonedot);
blitonedot = 1;
}
static void blitter_line_sign(void)
{
bool blitsign = (uae_s16)blt_info.bltapt < 0;
if (blitsign) {
blt_info.bltcon1 |= BLTSIGN;
} else {
blt_info.bltcon1 &= ~BLTSIGN;
}
}
static void blitter_nxline(void)
{
int bshift = blt_info.bltcon1 >> 12;
bshift--;
bshift &= 15;
blineb = (blt_info.bltbdat >> bshift) | (blt_info.bltbdat << (16 - bshift));
blt_info.bltcon1 &= 0x0fff;
blt_info.bltcon1 |= bshift << 12;
}
static void blitter_line_minterm(uae_u16 dat)
{
uae_u16 mask = blt_info.bltafwm;
if (dat & BLITTER_PIPELINE_LAST) {
mask &= blt_info.bltalwm;
}
int ashift = blt_info.bltcon0 >> 12;
uae_u16 blitahold = (blt_info.bltadat & mask) >> ashift;
if (blt_info.bltcon0 & BLTCHB) {
// B special case if enabled
int bshift = blt_info.bltcon1 >> 12;
blineb = (((uae_u32)blt_info.bltbold << 16) | blt_info.bltbdat) >> bshift;
}
blt_info.bltbhold = (blineb & 0x0001) ? 0xFFFF : 0;
blt_info.bltahold2 = blitahold;
blt_info.bltbhold2 = blt_info.bltbhold;
blt_info.bltchold2 = blt_info.bltcdat;
}
static void blitter_loadadat(uae_u16 dat)
{
uae_u32 blitahold;
uae_u16 ashift = blt_info.bltcon0 >> 12;
uae_u16 bltadat = blt_info.bltadat;
if (dat & BLITTER_PIPELINE_FIRST) {
bltadat &= blt_info.bltafwm;
}
if (dat & BLITTER_PIPELINE_LAST) {
bltadat &= blt_info.bltalwm;
}
if (blitdesc) {
blitahold = (((uae_u32)bltadat << 16) | blt_info.bltaold) >> (16 - ashift);
} else {
blitahold = (((uae_u32)blt_info.bltaold << 16) | bltadat) >> ashift;
}
blt_info.bltaold = bltadat;
blt_info.bltahold2 = blitahold;
}
static void blitter_loadblit(uae_u16 dat)
{
blitter_loadadat(dat);
blt_info.bltbhold2 = blt_info.bltbhold;
}
static void blitter_doblit_last(void)
{
uae_u8 mt = blt_info.bltcon0 & 0xFF;
uae_u16 ddat = blit_func(blt_info.bltahold2, blt_info.bltbhold2, blt_info.bltchold2, mt) & 0xFFFF;
if (blitfill) {
uae_u16 d = ddat;
int ifemode = blitife ? 2 : 0;
int fc1 = blit_filltable[d & 255][ifemode + blitfc][1];
ddat = (blit_filltable[d & 255][ifemode + blitfc][0]
+ (blit_filltable[d >> 8][ifemode + fc1][0] << 8));
blitfc = blit_filltable[d >> 8][ifemode + fc1][1];
}
if (ddat) {
blt_info.blitzero = 0;
}
blt_info.bltddat = ddat;
}
// immediate blit
static void actually_do_blit(void)
{
if (blitline) {
do {
blitter_line_proc_status();
blitter_line_proc_apt();
if (blt_info.hblitsize > 1) {
blitter_line_read_b();
blitter_line_read_c();
blitter_line_minterm(BLITTER_PIPELINE_FIRST);
blitter_doblit_last();
blitter_line_proc_cpt_x();
}
if (blt_info.hblitsize > 2) {
if (blitlineloop && !(blt_info.bltcon1 & BLTSUD)) {
blitter_line_proc_cpt_y();
blitlineloop = 0;
}
blitter_line_read_c();
blitter_line_minterm_extra();
blitter_doblit_last();
}
blitter_line_adat();
blitter_line_ovf();
if (blt_info.hblitsize >= 2) {
if (blitlineloop) {
blitter_line_proc_cpt_y();
blitlineloop = 0;
}
}
blitter_line_sign();
blitter_nxline();
if (blitlinepixel) {
blitter_line_write();
blitlinepixel = 0;
}
blt_info.bltdpt = blt_info.bltcpt;
blitter_line_minterm(BLITTER_PIPELINE_FIRST | BLITTER_PIPELINE_LAST);
blitter_doblit_last();
blitlineloop = 1;
blt_info.vblitsize--;
} while (blt_info.vblitsize != 0);
} else {
if (blitdesc)
blitter_dofast_desc();
else
blitter_dofast();
}
blt_info.blit_main = 0;
}
static void blitter_doit(void)
{
if (blt_info.vblitsize == 0) {
blitter_done_all(true);
return;
}
actually_do_blit();
blitter_done_all(true);
}
static int makebliteventtime(int delay)
{
if (delay) {
delay += delay - (int)(delay * (1 + currprefs.blitter_speed_throttle) + 0.5);
if (delay <= 0)
delay = 1;
}
return delay;
}
void blitter_handler(uae_u32 data)
{