Skip to content

No labels!

There aren’t any labels for this repository quite yet.

50 labels

Sort
Sort
Alphabetically
Reverse alphabetically
Most issues
Fewest issues
Odin Parser
Odin Parser
Odin II Logic Synthesis Tool: Verilog Preproc and Parser related
12
Odin Regression
Odin Regression
Odin II Logic Synthesis Tool: regression test related
2
Odin Simulation
Odin Simulation
Odin II Logic Synthesis Tool: Simulation related
1
Odin Tech.Mapping
Odin Tech.Mapping
Odin II Logic Synthesis Tool: Technology Mapping High level contruct into hard or soft logic
8
Odin
Odin
Odin II Logic Synthesis Tool: Unsorted item
49
Parmys
Parmys
1
python
python
Pull requests that update Python code
question
question
regression
regression
Regression against previous behaviour
scripts
scripts
Utility & Infrastructure scripts
6
submodules
submodules
Pull requests that update Submodules code
1
tatum
tatum
Tatum timing analyzer
1
tests
tests
9
Titan Benchmarks
Titan Benchmarks
The Titan benchmarks: www.eecg.utoronto.ca/~kmurray/titan
1
VPR
VPR
VPR FPGA Placement & Routing Tool
91
VTR Benchmarks
VTR Benchmarks
The VTR verilog benchmarks included with the VTR Flow
1
VTR Flow
VTR Flow
VTR Design Flow (scripts/benchmarks/architectures)
13
wontfix
wontfix
1
Yosys+Odin-II
Yosys+Odin-II
The Yosys+Odin-II synthesizer: the Yosys coarse-grained Tcl script and Odin-II partial mapping flow
2
Yosys
Yosys
Yosys synthesizer and its interaction with VTR