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Copy pathACC_CLK_GEN.bsf
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ACC_CLK_GEN.bsf
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2010 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 16 16 216 208)
(text "ACC_CLK_GEN" (rect 5 0 85 12)(font "Arial" ))
(text "inst" (rect 8 176 25 188)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clock_25Mhz" (rect 0 0 62 12)(font "Arial" ))
(text "clock_25Mhz" (rect 21 27 83 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 200 32)
(output)
(text "clock_12500KHz" (rect 0 0 81 12)(font "Arial" ))
(text "clock_12500KHz" (rect 98 27 179 39)(font "Arial" ))
(line (pt 200 32)(pt 184 32)(line_width 1))
)
(port
(pt 200 48)
(output)
(text "clock_400KHz" (rect 0 0 69 12)(font "Arial" ))
(text "clock_400KHz" (rect 110 43 179 55)(font "Arial" ))
(line (pt 200 48)(pt 184 48)(line_width 1))
)
(port
(pt 200 64)
(output)
(text "clock_170KHz" (rect 0 0 69 12)(font "Arial" ))
(text "clock_170KHz" (rect 110 59 179 71)(font "Arial" ))
(line (pt 200 64)(pt 184 64)(line_width 1))
)
(port
(pt 200 80)
(output)
(text "clock_10KHz" (rect 0 0 63 12)(font "Arial" ))
(text "clock_10KHz" (rect 116 75 179 87)(font "Arial" ))
(line (pt 200 80)(pt 184 80)(line_width 1))
)
(port
(pt 200 96)
(output)
(text "clock_100Hz" (rect 0 0 62 12)(font "Arial" ))
(text "clock_100Hz" (rect 117 91 179 103)(font "Arial" ))
(line (pt 200 96)(pt 184 96)(line_width 1))
)
(port
(pt 200 112)
(output)
(text "clock_32Hz" (rect 0 0 56 12)(font "Arial" ))
(text "clock_32Hz" (rect 123 107 179 119)(font "Arial" ))
(line (pt 200 112)(pt 184 112)(line_width 1))
)
(port
(pt 200 128)
(output)
(text "clock_10Hz" (rect 0 0 56 12)(font "Arial" ))
(text "clock_10Hz" (rect 123 123 179 135)(font "Arial" ))
(line (pt 200 128)(pt 184 128)(line_width 1))
)
(port
(pt 200 144)
(output)
(text "clock_4Hz" (rect 0 0 50 12)(font "Arial" ))
(text "clock_4Hz" (rect 129 139 179 151)(font "Arial" ))
(line (pt 200 144)(pt 184 144)(line_width 1))
)
(drawing
(rectangle (rect 16 16 184 176)(line_width 1))
)
)