qspi is failing in compile stm32l476xx + stm32l486xx is missing define of bits QUADSPI_CR_DFM (also missing QUADSPI_CR_FSEL ..) #68423

tt0776 · 2024-02-01T14:41:23Z

tt0776
Feb 1, 2024

Maybe a Q & A for @erwango ?

In advance a apology on the way doing this, I am new in reporting this kind of things.
A the issue text directed me to make a discussion first before continue, this is it :-)

qspi is failing in compile stm32l476xx + stm32l486xx

Reported error is
warning: implicit declaration of function 'HAL_QSPI_SetFlashID'

Is missing define of bits QUADSPI_CR_DFM (also missing QUADSPI_CR_FSEL ..)

Fix is needed to be added after
#define QUADSPI_CR_SSHIFT QUADSPI_CR_SSHIFT_Msk /*!< Sample Shift */

Fix is to place bits missing (Copied from stm32l496xx.h)

#define QUADSPI_CR_DFM_Pos             (6U)
#define QUADSPI_CR_DFM_Msk             (0x1UL << QUADSPI_CR_DFM_Pos)           /*!< 0x00000040 */
#define QUADSPI_CR_DFM                 QUADSPI_CR_DFM_Msk                      /*!< Dual-flash mode */
#define QUADSPI_CR_FSEL_Pos            (7U)
#define QUADSPI_CR_FSEL_Msk            (0x1UL << QUADSPI_CR_FSEL_Pos)          /*!< 0x00000080 */
#define QUADSPI_CR_FSEL                QUADSPI_CR_FSEL_Msk                     /*!< Flash memory selection */

That result is tested to work on board stm32l476g_disco

Still having what looks to be a known warning and I see it also when compiling on other ST boards.
Looks to works anyway on my stm32l476g_disco

Warning (spi_bus_bridge): /soc/quadspi@a0001000: node name for SPI buses should be 'spi'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'

There is 2.6 QUADSPI errata.
Not sure it is a valide reason for not including bits and the option for getting samples working :-)

Using sample samples/drivers/spi_flash

*** Booting Zephyr OS build zephyr-v3.5.0 ***

qspi-nor-flash@0 SPI flash testing
==========================

Perform test on single sector
Test 1: Flash erase
Flash erase succeeded!

Test 2: Flash write
Attempting to write 4 bytes
Data read matches data written. Good!!

Perform test on multiple consequtive sectors
Test 1: Flash erase
Flash erase succeeded!

Test 2: Flash write
Attempting to write 4 bytes at offset 0xff000
Data read matches data written. Good!!
Attempting to write 4 bytes at offset 0x100000
Data read matches data written. Good!!

"stm32l476g_disco.conf" added to "boards" in sample
CONFIG_SPI=n

"stm32l476g_disco.overlay" added to board in sample

/ {

    chosen {
		zephyr,flash-controller = &n25q128a1;
	};

    aliases {
		spi-flash0 = &n25q128a1; 
	};
};


&dma2 {
	status = "okay";
};

&quadspi {
	pinctrl-0 = <&quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
				&quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15
				&quadspi_ncs_pe11 &quadspi_clk_pe10>;
	pinctrl-names = "default";
	
	// Copied from stm32l496 that had the STM32_DMA_.. values as 0x480>; 
	dmas = <&dma2 7 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>; /* channel 7 request 3 on DMA2 */
	dma-names = "tx_rx";

	flash-id = <1>;
	status = "okay";
	
    n25q128a1: qspi-nor-flash@0 {
		compatible = "st,stm32-qspi-nor";
		reg = <0>;
		qspi-max-frequency = <DT_FREQ_M(108)>;
		size = <DT_SIZE_M(128)>; /* 16 MBytes */
		status = "okay";
		spi-bus-width = <4>;
		
		// Was original writeoc = "PP_1_4_4", the stm32l476g_disco only worke with PP_1_1_4 ;
		writeoc = "PP_1_1_4"; 
	};

    partitions {
         compatible = "fixed-partitions";
         #address-cells = <1>;
         #size-cells = <1>;

         partition@0 {
             label = "nor";
             reg = <0x00000000 DT_SIZE_M(4)>;
         };
 	};
};

erwango · 2024-02-01T15:04:12Z

erwango
Feb 1, 2024
Collaborator

Please provide more info on the target you're using, the sample you're trying to build, any additional confiuguration you've done....

@FRASTM

3 replies

tt0776 Feb 2, 2024
Author

I am not sure what to replay more than I already has done.
Will Try to list it differently with more details
Using released "zephyr-v3.5.0"

That result is tested to work on board stm32l476g_disco
Patch stm32l476xx.h with the missing defines after "#define QUADSPI_CR_SSHIFT" (see copy of code in my first ticket)

Example on a git patch "stm32l476_stm32l486_QUADSPI_CR_DFM.patch" I have used in "/zephyrproject/modules/hal/stm32/stm32cube/stm32l4xx/soc"

diff --git a/stm32cube/stm32l4xx/soc/stm32l476xx.h b/stm32cube/stm32l4xx/soc/stm32l476xx.h
index 3971ae9f..e5841c5a 100644
--- a/stm32cube/stm32l4xx/soc/stm32l476xx.h
+++ b/stm32cube/stm32l4xx/soc/stm32l476xx.h
@@ -13378,6 +13378,12 @@ typedef struct
 #define QUADSPI_CR_SSHIFT_Pos          (4U)
 #define QUADSPI_CR_SSHIFT_Msk          (0x1UL << QUADSPI_CR_SSHIFT_Pos)        /*!< 0x00000010 */
 #define QUADSPI_CR_SSHIFT              QUADSPI_CR_SSHIFT_Msk                   /*!< Sample Shift */
+#define QUADSPI_CR_DFM_Pos             (6U)
+#define QUADSPI_CR_DFM_Msk             (0x1UL << QUADSPI_CR_DFM_Pos)           /*!< 0x00000040 */
+#define QUADSPI_CR_DFM                 QUADSPI_CR_DFM_Msk                      /*!< Dual-flash mode */
+#define QUADSPI_CR_FSEL_Pos            (7U)
+#define QUADSPI_CR_FSEL_Msk            (0x1UL << QUADSPI_CR_FSEL_Pos)          /*!< 0x00000080 */
+#define QUADSPI_CR_FSEL                QUADSPI_CR_FSEL_Msk                     /*!< Flash memory selection */
 #define QUADSPI_CR_FTHRES_Pos          (8U)
 #define QUADSPI_CR_FTHRES_Msk          (0xFUL << QUADSPI_CR_FTHRES_Pos)        /*!< 0x00000F00 */
 #define QUADSPI_CR_FTHRES              QUADSPI_CR_FTHRES_Msk                   /*!< FTHRES[3:0] FIFO Level */
diff --git a/stm32cube/stm32l4xx/soc/stm32l486xx.h b/stm32cube/stm32l4xx/soc/stm32l486xx.h
index da9e3445..2887eb36 100644
--- a/stm32cube/stm32l4xx/soc/stm32l486xx.h
+++ b/stm32cube/stm32l4xx/soc/stm32l486xx.h
@@ -13597,6 +13597,12 @@ typedef struct
 #define QUADSPI_CR_SSHIFT_Pos          (4U)
 #define QUADSPI_CR_SSHIFT_Msk          (0x1UL << QUADSPI_CR_SSHIFT_Pos)        /*!< 0x00000010 */
 #define QUADSPI_CR_SSHIFT              QUADSPI_CR_SSHIFT_Msk                   /*!< Sample Shift */
+#define QUADSPI_CR_DFM_Pos             (6U)
+#define QUADSPI_CR_DFM_Msk             (0x1UL << QUADSPI_CR_DFM_Pos)           /*!< 0x00000040 */
+#define QUADSPI_CR_DFM                 QUADSPI_CR_DFM_Msk                      /*!< Dual-flash mode */
+#define QUADSPI_CR_FSEL_Pos            (7U)
+#define QUADSPI_CR_FSEL_Msk            (0x1UL << QUADSPI_CR_FSEL_Pos)          /*!< 0x00000080 */
+#define QUADSPI_CR_FSEL                QUADSPI_CR_FSEL_Msk                     /*!< Flash memory selection */
 #define QUADSPI_CR_FTHRES_Pos          (8U)
 #define QUADSPI_CR_FTHRES_Msk          (0xFUL << QUADSPI_CR_FTHRES_Pos)        /*!< 0x00000F00 */
 #define QUADSPI_CR_FTHRES              QUADSPI_CR_FTHRES_Msk                   /*!< FTHRES[3:0] FIFO Level */

Using sample samples/drivers/spi_flash
Added a overlay in folder "boards" in sample to configure "stm32l476g_disco" with the missing connections.

In "/zephyrproject/zephyr/samples/drivers/spi_flash/boards/"
"stm32l476g_disco.conf" added to "boards" in sample
Paste in

CONFIG_SPI=n

"stm32l476g_disco.overlay" added to "boards" in sample (fix partitions needed { } move, even that it don't ignore this samle)
Paste in

/ {

    chosen {
        zephyr,flash-controller = &n25q128a1;
    };

    aliases {
        spi-flash0 = &n25q128a1;
    };
};


&dma2 {
    status = "okay";
};

&quadspi {
    pinctrl-0 = <&quadspi_bk1_io0_pe12 &quadspi_bk1_io1_pe13
    &quadspi_bk1_io2_pe14 &quadspi_bk1_io3_pe15
    &quadspi_ncs_pe11 &quadspi_clk_pe10>;
    pinctrl-names = "default";

    // Copied from stm32l496 that had the STM32_DMA_.. values as 0x480>;
    dmas = <&dma2 7 3 (STM32_DMA_PERIPH_TX | STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>; /* channel 7 request 3 on DMA2 */
    dma-names = "tx_rx";

    flash-id = <1>;
    status = "okay";

    n25q128a1: qspi-nor-flash@0 {
        compatible = "st,stm32-qspi-nor";
        reg = <0>;
        qspi-max-frequency = <DT_FREQ_M(108)>;
        size = <DT_SIZE_M(128)>; /* 16 MBytes */
        status = "okay";
        spi-bus-width = <4>;

        // Was original writeoc = "PP_1_4_4", the stm32l476g_disco only worke with PP_1_1_4 ;
        writeoc = "PP_1_1_4";

        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;

            partition@0 {
                label = "nor";
                reg = <0x00000000 DT_SIZE_M(4)>;
            };
        };
    };
};

Then just build the sample

west build -p -b stm32l476g_disco samples/drivers/spi_flash
west flash

FRASTM Feb 2, 2024
Collaborator

Hi

If you use the stm32l476 disco kit, there is only one qspi NOR flash connected, so even if the QUADSPI_CR_DFM definition is missing you should not need it, but flash-id = <1>; instead.

tt0776 Feb 5, 2024
Author

The intension is to use https://docs.zephyrproject.org/latest/build/dts/api/bindings/flash_controller/st,stm32-qspi-nor.html
Using sample samples/drivers/spi_flash
It looks to be depended on my requested bits is able to be set.
And flash-id = <1>; don't do that I don't need them.

... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c: In function 'flash_stm32_qspi_init':
... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1259:9: warning: implicit declaration of function 'HAL_QSPI_SetFlashID' [-Wimplicit-function-declaration]
 1259 |         HAL_QSPI_SetFlashID(&dev_data->hqspi,
      |         ^~~~~~~~~~~~~~~~~~~
... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1260:52: error: 'QUADSPI_CR_FSEL_Pos' undeclared (first use in this function); did you mean 'QUADSPI_CR_FTIE_Pos'?
 1260 |                             (qspi_flash_id - 1) << QUADSPI_CR_FSEL_Pos);

Is this answer the question?

Like with the "zephyr/boards/arm/stm32l496g_disco/stm32l496g_disco.dts" where bits is defined for soc. it works fine.

&quadspi {
	pinctrl-0 = <&quadspi_bk1_io0_pb1 &quadspi_bk1_io1_pb0
			&quadspi_bk1_io2_pa7 &quadspi_bk1_io3_pa6
			&quadspi_bk1_ncs_pb11 &quadspi_clk_pa3>;
	pinctrl-names = "default";

	dmas = <&dma2 7 3 0x480>; /* channel 7 request 3 on DMA2 */
	dma-names = "tx_rx";

	flash-id = <1>;
	status = "okay";

	mx25r6435: qspi-nor-flash@0 {
		compatible = "st,stm32-qspi-nor";
		reg = <0>;
		qspi-max-frequency = <8000000>;
		size = <DT_SIZE_M(64)>; /* 8 MBytes */
		status = "okay";
		spi-bus-width = <4>;
		writeoc = "PP_1_4_4";
	};
};

FRASTM · 2024-02-02T16:43:08Z

FRASTM
Feb 2, 2024
Collaborator

What is the purpose of your testcase, do you test erase/write/read operation directly on the external quad-flash ?

1 reply

tt0776 Feb 5, 2024
Author

The test case it to get qspi support to a nor flash.
The intension is to use https://docs.zephyrproject.org/latest/build/dts/api/bindings/flash_controller/st,stm32-qspi-nor.html
Using sample samples/drivers/spi_flash

Using the already designed "stm32l476g_disco" where I actually in reality need to connect to a "SST26VF032B"
It is just easier to get thing up and running on a dev. board and then figure out what needs to be changed later on the real board :-)

erwango · 2024-02-05T08:15:57Z

erwango
Feb 5, 2024
Collaborator

HAL_QSPI_SetFlashID is linked to dual flash feature which is not supported on L47XX devices.
Its usage (and related operations) should be contained under DFM feature flag (#ifdef using CSMIS define or new dt property)

8 replies

erwango Feb 6, 2024
Collaborator

In that case, I don't think you need the flash-id = <1>; anymore, but binding may still request it as it was mandatory information till now.
Anyway, having it shouldn't trigger issue.

What is the status with proposed modification ? Is driver compiling ? Is it functional ?

tt0776 Feb 6, 2024
Author

I am in process checking how to check the correct branch out and run a test of changes

tt0776 Feb 6, 2024
Author

I have checked out zephyr at Commit: e5d14c6
As dethatched head
Run a west update
what I think descripted here https://docs.zephyrproject.org/latest/develop/west/built-in.html#west-init

Added my missing "stm32l476g_disco.conf" "stm32l476g_disco.overlay"

west build -p -b stm32l476g_disco samples/drivers/spi_flash
west flash

And I get build errors that don't tell me at least what to fix?

-- west build: generating a build system
Loading Zephyr default modules (Zephyr base).
-- Application:  ... /zephyrproject/zephyr/samples/drivers/spi_flash
-- CMake version: 3.28.1
-- Found Python3: /usr/bin/python3 (found suitable version "3.10.12", minimum required is "3.8") found components: Interpreter 
-- Cache files will be written to:  ... /.cache/zephyr
-- Zephyr version: 3.5.99 ( ... /zephyrproject/zephyr)
-- Found west (found suitable version "1.2.0", minimum required is "0.14.0")
-- Board: stm32l476g_disco
-- ZEPHYR_TOOLCHAIN_VARIANT not set, trying to locate Zephyr SDK
-- Found host-tools: zephyr 0.16.3 ( ... /zephyr-sdk-0.16.3)
-- Found toolchain: zephyr 0.16.3 ( ... /zephyr-sdk-0.16.3)
-- Found Dtc:  ... /zephyr-sdk-0.16.3/sysroots/x86_64-pokysdk-linux/usr/bin/dtc (found suitable version "1.6.0", minimum required is "1.4.6") 
-- Found BOARD.dts:  ... /zephyrproject/zephyr/boards/arm/stm32l476g_disco/stm32l476g_disco.dts
-- Found devicetree overlay:  ... /zephyrproject/zephyr/samples/drivers/spi_flash/boards/stm32l476g_disco.overlay
-- Generated zephyr.dts:  ... /zephyrproject/build/zephyr/zephyr.dts
-- Generated devicetree_generated.h:  ... /zephyrproject/build/zephyr/include/generated/devicetree_generated.h
-- Including generated dts.cmake file:  ... /zephyrproject/build/zephyr/dts.cmake
 ... /zephyrproject/build/zephyr/zephyr.dts:249.29-280.5: Warning (spi_bus_bridge): /soc/quadspi@a0001000: node name for SPI buses should be 'spi'
<stdout>: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
Parsing  ... /zephyrproject/zephyr/Kconfig
Loaded configuration ' ... /zephyrproject/zephyr/boards/arm/stm32l476g_disco/stm32l476g_disco_defconfig'
Merged configuration ' ... /zephyrproject/zephyr/samples/drivers/spi_flash/prj.conf'
Merged configuration ' ... /zephyrproject/zephyr/samples/drivers/spi_flash/boards/stm32l476g_disco.conf'
Configuration saved to ' ... /zephyrproject/build/zephyr/.config'
Kconfig header saved to ' ... /zephyrproject/build/zephyr/include/generated/autoconf.h'
-- Found GnuLd:  ... /zephyr-sdk-0.16.3/arm-zephyr-eabi/bin/../lib/gcc/arm-zephyr-eabi/12.2.0/../../../../arm-zephyr-eabi/bin/ld.bfd (found version "2.38") 
-- The C compiler identification is GNU 12.2.0
-- The CXX compiler identification is GNU 12.2.0
-- The ASM compiler identification is GNU
-- Found assembler:  ... /zephyr-sdk-0.16.3/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc
-- Using ccache: /usr/bin/ccache
CMake Warning at  ... /zephyrproject/zephyr/CMakeLists.txt:864 (message):
  No SOURCES given to Zephyr library: lib__posix__options

  Excluding target from build.


-- Configuring done (2.3s)
-- Generating done (0.0s)
-- Build files have been written to:  ... /zephyrproject/build
-- west build: building application
[1/140] Preparing syscall dependency handling

[3/140] Generating include/generated/version.h
-- Zephyr version: 3.5.99 ( ... /zephyrproject/zephyr), build: zephyr-v3.5.0-5384-ge5d14c682136
[95/140] Building C object zephyr/driv...vers__flash.dir/flash_stm32_qspi.c.obj
FAILED: zephyr/drivers/flash/CMakeFiles/drivers__flash.dir/flash_stm32_qspi.c.obj 
ccache  ... /zephyr-sdk-0.16.3/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc -DCORE_CM4 -DHSE_VALUE=8000000 -DKERNEL -DK_HEAP_MEM_POOL_SIZE=0 -DPICOLIBC_LONG_LONG_PRINTF_SCANF -DSTM32L476xx -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -D__LINUX_ERRNO_EXTENSIONS__ -D__PROGRAM_START -D__ZEPHYR_SUPERVISOR__ -D__ZEPHYR__=1 -I ... /zephyrproject/zephyr/include -I ... /zephyrproject/build/zephyr/include/generated -I ... /zephyrproject/zephyr/soc/arm/st_stm32/stm32l4 -I ... /zephyrproject/zephyr/drivers -I ... /zephyrproject/zephyr/soc/arm/st_stm32/common -I ... /zephyrproject/modules/hal/cmsis/CMSIS/Core/Include -I ... /zephyrproject/zephyr/modules/cmsis/. -I ... /zephyrproject/modules/hal/stm32/stm32cube/stm32l4xx/soc -I ... /zephyrproject/modules/hal/stm32/stm32cube/stm32l4xx/drivers/include -I ... /zephyrproject/modules/hal/stm32/stm32cube/stm32l4xx/drivers/include/Legacy -I ... /zephyrproject/modules/hal/stm32/stm32cube/common_ll/include -isystem  ... /zephyrproject/zephyr/lib/libc/common/include -Wshadow -fno-strict-aliasing -Os -imacros  ... /zephyrproject/build/zephyr/include/generated/autoconf.h -fno-printf-return-value -fno-common -g -gdwarf-4 -fdiagnostics-color=always -mcpu=cortex-m4 -mthumb -mabi=aapcs -mfp16-format=ieee -mtp=soft --sysroot= ... /zephyr-sdk-0.16.3/arm-zephyr-eabi/arm-zephyr-eabi -imacros  ... /zephyrproject/zephyr/include/zephyr/toolchain/zephyr_stdint.h -Wall -Wformat -Wformat-security -Wno-format-zero-length -Wdouble-promotion -Wno-pointer-sign -Wpointer-arith -Wexpansion-to-defined -Wno-unused-but-set-variable -Werror=implicit-int -fno-pic -fno-pie -fno-asynchronous-unwind-tables -ftls-model=local-exec -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop -fmacro-prefix-map= ... /zephyrproject/zephyr/samples/drivers/spi_flash=CMAKE_SOURCE_DIR -fmacro-prefix-map= ... /zephyrproject/zephyr=ZEPHYR_BASE -fmacro-prefix-map= ... /zephyrproject=WEST_TOPDIR -ffunction-sections -fdata-sections --specs=picolibc.specs -std=c99 -MD -MT zephyr/drivers/flash/CMakeFiles/drivers__flash.dir/flash_stm32_qspi.c.obj -MF zephyr/drivers/flash/CMakeFiles/drivers__flash.dir/flash_stm32_qspi.c.obj.d -o zephyr/drivers/flash/CMakeFiles/drivers__flash.dir/flash_stm32_qspi.c.obj -c  ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c: In function 'flash_stm32_qspi_init':
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1289:9: warning: implicit declaration of function 'HAL_QSPI_SetFlashID' [-Wimplicit-function-declaration]
 1289 |         HAL_QSPI_SetFlashID(&dev_data->hqspi,
      |         ^~~~~~~~~~~~~~~~~~~
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1290:52: error: 'QUADSPI_CR_FSEL_Pos' undeclared (first use in this function); did you mean 'QUADSPI_CR_FTIE_Pos'?
 1290 |                             (qspi_flash_id - 1) << QUADSPI_CR_FSEL_Pos);
      |                                                    ^~~~~~~~~~~~~~~~~~~
      |                                                    QUADSPI_CR_FTIE_Pos
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1290:52: note: each undeclared identifier is reported only once for each function it appears in
In file included from  ... /zephyrproject/zephyr/include/zephyr/arch/arm/arch.h:20,
                 from  ... /zephyrproject/zephyr/include/zephyr/arch/cpu.h:19,
                 from  ... /zephyrproject/zephyr/include/zephyr/kernel_includes.h:37,
                 from  ... /zephyrproject/zephyr/include/zephyr/kernel.h:17,
                 from  ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:12:
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c: At top level:
 ... /zephyrproject/build/zephyr/include/generated/devicetree_generated.h:10829:39: error: 'DT_N_S_soc_S_quadspi_a0001000_S_qspi_nor_flash_0_REG_IDX_1_VAL_ADDRESS' undeclared here (not in a function); did you mean 'DT_N_S_soc_S_quadspi_a0001000_S_qspi_nor_flash_0_REG_IDX_0_VAL_ADDRESS'?
10829 | #define DT_N_INST_0_st_stm32_qspi_nor DT_N_S_soc_S_quadspi_a0001000_S_qspi_nor_flash_0
      |                                       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 ... /zephyrproject/zephyr/include/zephyr/devicetree.h:4454:33: note: in definition of macro 'DT_CAT4'
 4454 | #define DT_CAT4(a1, a2, a3, a4) a1 ## a2 ## a3 ## a4
      |                                 ^~
 ... /zephyrproject/zephyr/include/zephyr/devicetree.h:3879:44: note: in expansion of macro 'DT_REG_ADDR_BY_IDX'
 3879 | #define DT_INST_REG_ADDR_BY_IDX(inst, idx) DT_REG_ADDR_BY_IDX(DT_DRV_INST(inst), idx)
      |                                            ^~~~~~~~~~~~~~~~~~
 ... /zephyrproject/zephyr/include/zephyr/sys/util_internal.h:105:36: note: in expansion of macro 'DT_N_INST_0_st_stm32_qspi_nor'
  105 | #define UTIL_PRIMITIVE_CAT(a, ...) a##__VA_ARGS__
      |                                    ^
 ... /zephyrproject/zephyr/include/zephyr/sys/util_internal.h:104:26: note: in expansion of macro 'UTIL_PRIMITIVE_CAT'
  104 | #define UTIL_CAT(a, ...) UTIL_PRIMITIVE_CAT(a, __VA_ARGS__)
      |                          ^~~~~~~~~~~~~~~~~~
 ... /zephyrproject/zephyr/include/zephyr/devicetree.h:334:31: note: in expansion of macro 'UTIL_CAT'
  334 | #define DT_INST(inst, compat) UTIL_CAT(DT_N_INST, DT_DASH(inst, compat))
      |                               ^~~~~~~~
 ... /zephyrproject/zephyr/include/zephyr/devicetree.h:3410:27: note: in expansion of macro 'DT_INST'
 3410 | #define DT_DRV_INST(inst) DT_INST(inst, DT_DRV_COMPAT)
      |                           ^~~~~~~
 ... /zephyrproject/zephyr/include/zephyr/devicetree.h:3879:63: note: in expansion of macro 'DT_DRV_INST'
 3879 | #define DT_INST_REG_ADDR_BY_IDX(inst, idx) DT_REG_ADDR_BY_IDX(DT_DRV_INST(inst), idx)
      |                                                               ^~~~~~~~~~~
 ... /zephyrproject/zephyr/drivers/flash/flash_stm32_qspi.c:1430:23: note: in expansion of macro 'DT_INST_REG_ADDR_BY_IDX'
 1430 |         .flash_size = DT_INST_REG_ADDR_BY_IDX(0, 1),
      |                       ^~~~~~~~~~~~~~~~~~~~~~~
[100/140] Building C object modules/st...drivers/src/stm32l4xx_hal_rcc_ex.c.obj
ninja: build stopped: subcommand failed.
FATAL ERROR: command exited with status 1: /usr/bin/cmake --build  ... /zephyrproject/build

tt0776 Feb 16, 2024
Author

@FRASTM do you have a comment to if I tested this wrong or did I misunderstood what was need with the the comment?

zephyr/drivers/flash/flash_stm32_qspi.c

Lines 1286 to 1291 in e5d14c6

tt0776 Feb 27, 2024
Author

@FRASTM
.. Just a update that resolve this discussion for me :-)

You replied

you should not need it, but flash-id = <1>; instead.

When just comment out flash-id = <1>; the flash now works without the patch stm32l476xx.h stm32l486xx.h
I now can get it working with newly checkout Zephyr version 3.5.
Possible that other parameter also was fixed when tested again and the actual flash chip and SOC used worked after may other changes.

Note that the microchip flash still needed the fix to get driver write data to chip..
More on missing requires-ulbpr #68622

tt0776 · 2024-02-06T09:12:31Z

tt0776
Feb 6, 2024
Author

I also noticed that "requires-ulbpr" is not implemented in https://docs.zephyrproject.org/latest/build/dts/api/bindings/flash_controller/st,stm32-qspi-nor.html

That is pressent in as example https://docs.zephyrproject.org/latest/build/dts/api/bindings/mtd/nordic,qspi-nor.html
That looks to be implemented in st spi driver and I haven't found in the st qspi.

I am currently need it for the Microchip SST26VF that need this feature implemented :-(
Is there a workaround to send command SPI_NOR_CMD_ULBPR (98h)?

2 replies

erwango Feb 6, 2024
Collaborator

^^ @FRASTM

@tt0776 please note that there are a lot of things going on right now on Zephyr (V3.6.0 release and migration to hardware model V2), we d'ont have much time for feature requests. Don't hesitate to add a new zephyr issue about it if needed though.

tt0776 Feb 6, 2024
Author

Okay I try make a new feature request

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qspi is failing in compile stm32l476xx + stm32l486xx is missing define of bits QUADSPI_CR_DFM (also missing QUADSPI_CR_FSEL ..) #68423

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qspi is failing in compile stm32l476xx + stm32l486xx is missing define of bits QUADSPI_CR_DFM (also missing QUADSPI_CR_FSEL ..) #68423

tt0776 Feb 1, 2024

Replies: 4 comments · 14 replies

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