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@DuinOS

DUINOS - O Arduino Multitarefa

Arduino + FreeRTOS -> DuinOS

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  1. DuinOS DuinOS Public

    Fork from original DuinOS, but updated with FreeRTOS 7.4.0 and Arduino 1.5.x and 1.0.x

    C 72 34

  2. FreeRTOS FreeRTOS Public

    FreeRTOS

    C 64 76

Repositories

Showing 10 of 22 repositories
  • riscuinho Public archive Forked from RISCuinho/core

    **RISC**uinho - A scratch in the possibilities in the universe of microcontrollers

    DuinOS/riscuinho’s past year of commit activity
    8 BSD-3-Clause 4 0 0 Updated Jun 16, 2021
  • AprendaFPGA Public

    Algumas anotações de quem está aprendendo a sintetizar seu próprio microcontrolador em FPGA.

    DuinOS/AprendaFPGA’s past year of commit activity
    2 BSD-3-Clause 0 0 0 Updated May 6, 2021
  • FPGA-Memory Public

    Exemplos de Código Verilog para melhor Sintetizar representações de Memória em FPGA

    DuinOS/FPGA-Memory’s past year of commit activity
    0 BSD-3-Clause 0 0 0 Updated May 2, 2021
  • fusesoc Public Forked from olofk/fusesoc

    Package manager and build abstraction tool for FPGA/ASIC development

    DuinOS/fusesoc’s past year of commit activity
    Python 0 BSD-2-Clause 253 0 0 Updated Apr 9, 2021
  • intelhex2fpgamem Public

    Um conversor em Python para processar arquivos Hex no formato Intel para binário para uso em síntese FPGA, em especial com o projeto DuinOS/RISCuinho

    DuinOS/intelhex2fpgamem’s past year of commit activity
    0 BSD-3-Clause 0 0 0 Updated Apr 8, 2021
  • FPGA-MyLIB Public archive Forked from RISCuinho/LibFPGA

    Minha biblioteca de módulos útil a qualquer projeto com FPGA, de PLL, Gerador de números pseudo aleatórios, controladores externos, entre outros.

    DuinOS/FPGA-MyLIB’s past year of commit activity
    Verilog 0 LGPL-2.1 1 0 0 Updated Mar 15, 2021
  • vgasim Public Forked from ZipCPU/vgasim

    A Video display simulator

    DuinOS/vgasim’s past year of commit activity
    Verilog 0 19 0 0 Updated Jan 28, 2021
  • learn-fpga Public Forked from wuxx/learn-fpga

    Learning FPGA, yosys, nextpnr, and RISC-V

    DuinOS/learn-fpga’s past year of commit activity
    C 0 BSD-3-Clause 250 0 0 Updated Jan 5, 2021
  • f32c Public Forked from f32c/f32c

    A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz

    DuinOS/f32c’s past year of commit activity
    VHDL 0 BSD-2-Clause 111 0 0 Updated Jul 23, 2020
  • duinos.github.com Public

    Site do Fork DuinOS

    DuinOS/duinos.github.com’s past year of commit activity
    CSS 1 0 0 0 Updated Jul 11, 2020
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