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FEXCore/JIT: Encode the JITRIPReconstructionEntries using variable length integer Vixl Simulator run #7064: Pull request #4302 synchronize by Sonicadvance1
January 30, 2025 23:08 4m 14s Sonicadvance1:vl_jit_reconstruction
Sonicadvance1:vl_jit_reconstruction
January 30, 2025 23:08 4m 14s
Merge pull request #4313 from pmatos/StartupSleepname Vixl Simulator run #7063: Commit 55cbb0b pushed by Sonicadvance1
January 30, 2025 15:44 8m 27s main
main
January 30, 2025 15:44 8m 27s
Merge pull request #4311 from pmatos/RevertPredRA Vixl Simulator run #7062: Commit db7fb56 pushed by Sonicadvance1
January 30, 2025 15:41 7m 42s main
main
January 30, 2025 15:41 7m 42s
Merge pull request #4309 from pmatos/3DnowSkip Vixl Simulator run #7061: Commit 2bed744 pushed by Sonicadvance1
January 30, 2025 15:40 3m 22s main
main
January 30, 2025 15:40 3m 22s
Merge pull request #4314 from neobrain/fix_tso_ldr_bitmask Vixl Simulator run #7060: Commit 0019bde pushed by Sonicadvance1
January 30, 2025 14:32 3m 20s main
main
January 30, 2025 14:32 3m 20s
Arm64: Fix bitmask used to match load/store instructions Vixl Simulator run #7059: Pull request #4314 opened by neobrain
January 30, 2025 14:23 5m 42s neobrain:fix_tso_ldr_bitmask
neobrain:fix_tso_ldr_bitmask
January 30, 2025 14:23 5m 42s
Add option StartupSleepProcName Vixl Simulator run #7058: Pull request #4313 opened by pmatos
January 30, 2025 09:18 5m 20s pmatos:StartupSleepname
pmatos:StartupSleepname
January 30, 2025 09:18 5m 20s
Revert "Enable RA of SVE Predicate Registers" Vixl Simulator run #7057: Pull request #4311 opened by pmatos
January 29, 2025 12:54 5m 46s pmatos:RevertPredRA
pmatos:RevertPredRA
January 29, 2025 12:54 5m 46s
Wine: Properly Store and Restore TF, DF, and AF before clear Vixl Simulator run #7056: Pull request #4310 synchronize by MelodicAlbuild
January 29, 2025 08:29 Action required MelodicAlbuild:wine_eflag_cpsr
MelodicAlbuild:wine_eflag_cpsr
January 29, 2025 08:29 Action required
Wine: Properly Store and Restore TF, DF, and AF before clear Vixl Simulator run #7055: Pull request #4310 opened by MelodicAlbuild
January 29, 2025 08:14 Action required MelodicAlbuild:wine_eflag_cpsr
MelodicAlbuild:wine_eflag_cpsr
January 29, 2025 08:14 Action required
Skip 3DNow tests with precision issues Vixl Simulator run #7054: Pull request #4309 synchronize by pmatos
January 29, 2025 07:38 3m 50s pmatos:3DnowSkip
pmatos:3DnowSkip
January 29, 2025 07:38 3m 50s
Merge pull request #4292 from pmatos/EnsurePredCacheReset2 Vixl Simulator run #7053: Commit b148cc6 pushed by Sonicadvance1
January 29, 2025 02:41 9m 33s main
main
January 29, 2025 02:41 9m 33s
Merge pull request #4306 from Sonicadvance1/robust_zero_length_envp Vixl Simulator run #7052: Commit 2a4c169 pushed by Sonicadvance1
January 29, 2025 02:41 3m 17s main
main
January 29, 2025 02:41 3m 17s
FEXLoader/ELFCodeLoader: Be robust against zero length environment variables Vixl Simulator run #7051: Pull request #4306 synchronize by Sonicadvance1
January 29, 2025 00:53 3m 49s Sonicadvance1:robust_zero_length_envp
Sonicadvance1:robust_zero_length_envp
January 29, 2025 00:53 3m 49s
Merge pull request #4299 from Sonicadvance1/fix_48bit_wine Vixl Simulator run #7050: Commit c2f8b5b pushed by lioncash
January 29, 2025 00:26 3m 18s main
main
January 29, 2025 00:26 3m 18s
FEX: Allocate a VMA allocator when running on a 48-bit VA Vixl Simulator run #7049: Pull request #4299 synchronize by Sonicadvance1
January 29, 2025 00:08 3m 44s Sonicadvance1:fix_48bit_wine
Sonicadvance1:fix_48bit_wine
January 29, 2025 00:08 3m 44s
Merge pull request #4308 from Sonicadvance1/gpuvis_stack_mem Vixl Simulator run #7048: Commit fb2a59a pushed by lioncash
January 28, 2025 23:11 3m 23s main
main
January 28, 2025 23:11 3m 23s
Skip 3DNow tests with precision issues Vixl Simulator run #7047: Pull request #4309 synchronize by pmatos
January 28, 2025 15:03 8m 43s pmatos:3DnowSkip
pmatos:3DnowSkip
January 28, 2025 15:03 8m 43s
Skip 3DNow tests with precision issues Vixl Simulator run #7046: Pull request #4309 opened by pmatos
January 28, 2025 15:03 6m 6s pmatos:3DnowSkip
pmatos:3DnowSkip
January 28, 2025 15:03 6m 6s
Merge pull request #4307 from Sonicadvance1/fix_4296 Vixl Simulator run #7045: Commit f4c9275 pushed by lioncash
January 28, 2025 05:02 3m 17s main
main
January 28, 2025 05:02 3m 17s
GdbServer: Implement new netstream that can be interrupted Vixl Simulator run #7044: Pull request #4223 synchronize by Sonicadvance1
January 28, 2025 03:51 5m 12s Sonicadvance1:netstream_timeout
Sonicadvance1:netstream_timeout
January 28, 2025 03:51 5m 12s
Profiler/GPUViz: Stop allocating memory Vixl Simulator run #7043: Pull request #4308 opened by Sonicadvance1
January 28, 2025 02:50 3m 17s Sonicadvance1:gpuvis_stack_mem
Sonicadvance1:gpuvis_stack_mem
January 28, 2025 02:50 3m 17s
InstCountCI: Hardcode xchg instructions Vixl Simulator run #7042: Pull request #4307 opened by Sonicadvance1
January 28, 2025 02:31 4m 42s Sonicadvance1:fix_4296
Sonicadvance1:fix_4296
January 28, 2025 02:31 4m 42s
GdbServer: Implement new netstream that can be interrupted Vixl Simulator run #7041: Pull request #4223 synchronize by Sonicadvance1
January 28, 2025 02:04 6m 15s Sonicadvance1:netstream_timeout
Sonicadvance1:netstream_timeout
January 28, 2025 02:04 6m 15s
GdbServer: Implement new netstream that can be interrupted Vixl Simulator run #7040: Pull request #4223 synchronize by Sonicadvance1
January 28, 2025 02:01 3m 20s Sonicadvance1:netstream_timeout
Sonicadvance1:netstream_timeout
January 28, 2025 02:01 3m 20s