Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Add user sync functionality #72

Open
wants to merge 2 commits into
base: main
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 10 additions & 5 deletions emulator/badge.py
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,10 @@ def __init__(self):
self.initMemory()
self.clock = 0b0
self.oldTime = timer()
self.oldSync = timer()
self.newTime = timer()
self.speed = 250e3 # Hz
self.usync = 1e3 # Hz
self.progMem = []
#self.pc = 0
self.acc = [
Expand Down Expand Up @@ -52,7 +54,7 @@ def __init__(self):

def initMemory(self):
self.cpu.ram[0xff] = randint(0, 16) # Set random value at SFRFF

self.cpu.ram[0xf4] = 0 # zero RdFlags

def load(self, program):
self.progmem=[]
Expand Down Expand Up @@ -91,6 +93,9 @@ def step(self):

def update(self):
self.newTime = timer()
if self.newTime > self.oldSync + 0.5/self.usync:
self.oldSync = timer()
self.cpu.ram[0xf4] |= 0b0001 # set bit 0 in SFRF4
if self.newTime > self.oldTime + 0.5/self.speed:
if self.clock == 0:
# Set random value at SFRFF
Expand All @@ -105,9 +110,9 @@ def update(self):
self.clock = 0
self.oldTime = timer()

# Check SFR1 and set clock speed accordingly
# Check SFRF1 and set clock speed accordingly
speeds = [250e3, 100e3, 30e3, 10e3, 3e3, 1e3, 500, 200, 100, 50, 20, 10, 5, 2, 1, .5]
self.speed = speeds[self.cpu.ram[0xf1]]



# Check SFRF2 and set UserSync accordingly
usyncs = [1000, 600, 400, 250, 150, 100, 60, 40, 25, 15, 10, 6, 4, 2.5, 1.5, 1]
self.usync = usyncs[self.cpu.ram[0xf2]]
3 changes: 3 additions & 0 deletions emulator/bvmCPU.py
Original file line number Diff line number Diff line change
Expand Up @@ -281,6 +281,9 @@ def MOV(self, args):
self.ram[args['nn']] = self.ram[0]
elif args['mode'] == 5: # R0,NN
self.ram[0] = self.ram[args['nn']]
# UserSync; read clears bit 0
if self.ram[args['nn']] == 244:
self.cpu.ram[0xf4] &= 0b1110
elif args['mode'] == 6: # PC,NN
# print(f"before mov PC, {hex(args['nn'])}" )
self.ram[15] = (args['nn'] & 0xF0) >> 4
Expand Down