aarch64/fenv: fix fenv_t
#319
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Do we want to sync Seems there are some bugs: openlibm/include/openlibm_fenv_arm.h Lines 65 to 67 in 5a88ede /* We need to be able to map status flag positions to mask flag positions */
#ifndef __ARM_PCS_VFP
#define _FPUSW_SHIFT 16
#define _ENABLE_MASK (FE_ALL_EXCEPT << _FPUSW_SHIFT)
#endifAnd FreeBSD doesn't use #else /* __ARM_PCS_VFP */
...
#define _FPU_MASK_SHIFT 8 |
inkydragon
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Jan 15, 2025
Comment on lines
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| #define __mrs_fpcr(__r) __asm __volatile("mrs %0, fpcr" : "=r" (__r)) | ||
| #define __msr_fpcr(__r) __asm __volatile("msr fpcr, %0" : : "r" (__r)) |
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I'd like to rename those functions to __read_fpcr, __write_fpcr.
Or reg_fpcr_read(), reg_fpsr_write() (NetBSD style)
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AArch64 has two 64bit regs, AArch32 only has one.
The high 32 bits of both registers are reserved, so we only need to save the low 32 bits and pack them into a uint64.
aarch64/fenv.hfrom FreeBSDhttps://github.com/freebsd/freebsd-src/blob/de1aa3dab23c06fec962a14da3e7b4755c5880cf/lib/msun/aarch64/fenv.h
Fix #278