[SOL] Adjust backend after upgrade to LLVM 18

.github/workflows/llvm-project-tests.yml

@@ -130,7 +130,7 @@ jobs:
         if: "!startsWith(matrix.os, 'windows') && !startsWith(matrix.os, 'macOS') && contains(inputs.projects, 'libclc')"
         run: |
           # Make sure all of LLVM libraries that llvm-config needs are built.
-          ninja -C "$LLVM_BUILDDIR"
-          cmake -G Ninja -S libclc -B libclc-build -DLLVM_DIR="$LLVM_BUILDDIR"/lib/cmake/llvm -DLIBCLC_TARGETS_TO_BUILD="amdgcn--;amdgcn--amdhsa;r600--;nvptx--;nvptx64--;nvptx--nvidiacl;nvptx64--nvidiacl"
+          ninja -C build
+          cmake -G Ninja -S libclc -B libclc-build -DLLVM_DIR=$(pwd)/build/lib/cmake/llvm -DLIBCLC_TARGETS_TO_BUILD="amdgcn--;amdgcn--amdhsa;r600--;nvptx--;nvptx64--;nvptx--nvidiacl;nvptx64--nvidiacl"
           ninja -C libclc-build
           ninja -C libclc-build test

clang/lib/Basic/Targets/BPF.cpp

@@ -61,11 +61,13 @@ void BPFTargetInfo::getTargetDefines(const LangOptions &Opts,
     Builder.defineMacro("__BPF_FEATURE_SDIV_SMOD");
     Builder.defineMacro("__BPF_FEATURE_GOTOL");
     Builder.defineMacro("__BPF_FEATURE_ST");
-
+  }
+
   if (HasSolanaFeature) {
     Builder.defineMacro("__ELF__");
   }
 }
+
 
 static constexpr llvm::StringLiteral ValidCPUNames[] = {"generic", "v1", "v2",
                                                         "v3", "v4", "probe", "sbfv2"};

clang/test/CodeGen/ext-int-cc.c

@@ -64,8 +64,7 @@ void ParamPassing(_BitInt(128) b, _BitInt(64) c) {}
 // LA64: define{{.*}} void @ParamPassing(i128 %{{.+}}, i64 %{{.+}})
 // LA32: define{{.*}} void @ParamPassing(ptr %{{.+}}, i64 %{{.+}})
 // BPF: define{{.*}} void @ParamPassing(ptr %{{.+}}, i64 %{{.+}})
-// SBF: define{{.*}} void @ParamPassing(i128* byval(i128) align 8 %{{.+}}, i64 %{{.+}})
-// SBF: define{{.*}} void @ParamPassing(ptr %{{.+}}, i64 %{{.+}})
+// SBF: define{{.*}} void @ParamPassing(i128 %{{.+}}, i64 %{{.+}})
 
 void ParamPassing2(_BitInt(127) b, _BitInt(63) c) {}
 // LIN64: define{{.*}} void @ParamPassing2(i64 %{{.+}}, i64 %{{.+}}, i64 %{{.+}})
@@ -268,7 +267,7 @@ _BitInt(127) ReturnPassing3(void){}
 // AARCH64DARWIN: define{{.*}} i127 @ReturnPassing3(
 // ARM: define{{.*}} arm_aapcscc void @ReturnPassing3(ptr dead_on_unwind noalias writable sret
 // LA64: define{{.*}} i127 @ReturnPassing3(
-// LA32: define{{.*}} void @ReturnPassing3(ptr noalias sret
+// LA32: define{{.*}} void @ReturnPassing3(
 // BPF: define{{.*}} i127 @ReturnPassing3(
 // SBF: define{{.*}} i127 @ReturnPassing3(
 

clang/test/CodeGen/target-data.c

@@ -269,14 +269,6 @@
 // RUN: FileCheck %s -check-prefix=SBF
 // SBF: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
 
-// RUN: %clang_cc1 -triple bpfel -target-feature +solana -o - -emit-llvm %s | \
-// RUN: FileCheck %s -check-prefix=BPFELSOL
-// BPFELSOL: target datalayout = "e-m:e-p:64:64-i64:64-n32:64-S128"
-
-// RUN: %clang_cc1 -triple bpfeb -target-feature +solana -o - -emit-llvm %s | \
-// RUN: FileCheck %s -check-prefix=BPFEBSOL
-// BPFEBSOL: target datalayout = "E-m:e-p:64:64-i64:64-n32:64-S128"
-
 // RUN: %clang_cc1 -triple ve -o - -emit-llvm %s | \
 // RUN: FileCheck %s -check-prefix=VE
 // VE: target datalayout = "e-m:e-i64:64-n32:64-S128-v64:64:64-v128:64:64-v256:64:64-v512:64:64-v1024:64:64-v2048:64:64-v4096:64:64-v8192:64:64-v16384:64:64"

clang/test/Misc/target-invalid-cpu-note.c

@@ -73,11 +73,7 @@
 
 // RUN: not %clang_cc1 -triple bpf--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix BPF
 // BPF: error: unknown target CPU 'not-a-cpu'
-<<<<<<< HEAD
-// BPF-NEXT: note: valid target CPU values are: generic, v1, v2, v3, v4, probe{{$}}
-=======
-// BPF-NEXT: note: valid target CPU values are: generic, v1, v2, v3, probe, sbfv2{{$}}
->>>>>>> da6907c6359e ([SOL] Update failing tests after upgrade)
+// BPF-NEXT: note: valid target CPU values are: generic, v1, v2, v3, v4, probe, sbfv2{{$}}
 
 // RUN: not %clang_cc1 -triple avr--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AVR
 // AVR: error: unknown target CPU 'not-a-cpu'

lld/ELF/InputSection.cpp

@@ -917,21 +917,13 @@ void InputSection::relocateNonAlloc(uint8_t *buf, ArrayRef<RelTy> rels) {
 
   for (size_t i = 0, relsSize = rels.size(); i != relsSize; ++i) {
     const RelTy &rel = rels[i];
-    const RelType type = rel.getType(config->isMips64EL);
+    RelType type = rel.getType(config->isMips64EL);
     const uint64_t offset = rel.r_offset;
 
     // FIX: Temporary remap BPF_64_64 relocations in debug sections.
     if (config->emachine == EM_BPF && type == R_BPF_64_64 && isDebug)
       type = R_BPF_64_ABS64;
 
-    // GCC 8.0 or earlier have a bug that they emit R_386_GOTPC relocations
-    // against _GLOBAL_OFFSET_TABLE_ for .debug_info. The bug has been fixed
-    // in 2017 (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82630), but we
-    // need to keep this bug-compatible code for a while.
-    if (config->emachine == EM_386 && type == R_386_GOTPC)
-      continue;
-
-    uint64_t offset = rel.r_offset;
     uint8_t *bufLoc = buf + offset;
     int64_t addend = getAddend<ELFT>(rel);
     if (!RelTy::IsRela)

lld/tools/lld/lld.cpp

@@ -87,7 +87,6 @@ static void initLLVM() {
 
 int lld_main(int argc, char **argv, const llvm::ToolContext &) {
   initLLVM();
-  InitLLVM x(argc, argv);
   sys::Process::UseANSIEscapeCodes(true);
 
   if (::getenv("FORCE_LLD_DIAGNOSTICS_CRASH")) {

llvm/lib/Target/BPF/BPFISelLowering.cpp

@@ -132,7 +132,7 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine &TM,
 
     setOperationAction(ISD::SDIVREM, VT, Expand);
     setOperationAction(ISD::UDIVREM, VT, Expand);
-    if (!STI.hasSdivSmod()) {
+    if (!STI.hasSdivSmod() && !Subtarget->isSolana()) {
       setOperationAction(ISD::SDIV, VT, Custom);
       setOperationAction(ISD::SREM, VT, Custom);
     }
@@ -246,15 +246,6 @@ bool BPFTargetLowering::allowsMisalignedMemoryAccesses(
   return isSolana;
 }
 
-bool BPFTargetLowering::lowerAtomicStoreAsStoreSDNode(
-    const StoreInst &SI) const {
-  return Subtarget->isSolana();
-}
-
-bool BPFTargetLowering::lowerAtomicLoadAsLoadSDNode(const LoadInst &LI) const {
-  return Subtarget->isSolana();
-}
-
 bool BPFTargetLowering::isOffsetFoldingLegal(
     const GlobalAddressSDNode *GA) const {
   return false;
@@ -346,10 +337,6 @@ void BPFTargetLowering::ReplaceNodeResults(
   switch (Opcode) {
   default:
     report_fatal_error("unhandled custom legalization: " + Twine(Opcode));
-  case ISD::ATOMIC_LOAD_ADD:
-  case ISD::ATOMIC_LOAD_AND:
-  case ISD::ATOMIC_LOAD_OR:
-  case ISD::ATOMIC_LOAD_XOR:
   case ISD::ATOMIC_SWAP:
   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
   case ISD::ATOMIC_LOAD_ADD:
@@ -426,10 +413,6 @@ SDValue BPFTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
     // continue the expansion as defined with tablegen
     return SDValue();
   }
-  case ISD::DYNAMIC_STACKALLOC:
-    report_fatal_error("Unsupported dynamic stack allocation");
-  default:
-    llvm_unreachable("unimplemented operation");
   }
 }
 
@@ -462,6 +445,7 @@ SDValue BPFTargetLowering::LowerFormalArguments(
     CCInfo.AnalyzeFormalArguments(Ins, getHasAlu32() ? CC_BPF32 : CC_BPF64);
   }
 
+  bool HasMemArgs = false;
   for (auto &VA : ArgLocs) {
     if (VA.isRegLoc()) {
       // Argument passed in registers
@@ -514,7 +498,10 @@ SDValue BPFTargetLowering::LowerFormalArguments(
       SDV = DAG.getLoad(LocVT, DL, Chain, SDV, MachinePointerInfo());
       InVals.push_back(SDV);
     } else {
-      fail(DL, DAG, "defined with too many args");
+      if (VA.isMemLoc())
+        HasMemArgs = true;
+      else
+        report_fatal_error("unhandled argument location");
       InVals.push_back(DAG.getConstant(0, DL, VA.getLocVT()));
     }
   }
@@ -524,8 +511,13 @@ SDValue BPFTargetLowering::LowerFormalArguments(
       fail(DL, DAG, "Functions with VarArgs are not supported");
       assert(false);
     }
-  } else if (IsVarArg || MF.getFunction().hasStructRetAttr()) {
-    fail(DL, DAG, "functions with VarArgs or StructRet are not supported");
+  } else {
+    if (HasMemArgs)
+      fail(DL, DAG, "stack arguments are not supported");
+    if (IsVarArg)
+      fail(DL, DAG, "variadic functions are not supported");
+    if (MF.getFunction().hasStructRetAttr())
+      fail(DL, DAG, "aggregate returns are not supported");
   }
 
   return Chain;
@@ -590,7 +582,8 @@ SDValue BPFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
 
   // Walk arg assignments
   bool HasStackArgs = false;
-  unsigned e, i, ae = ArgLocs.size();
+  unsigned e, i;
+  size_t ae = ArgLocs.size();
   for (i = 0, e = (Subtarget->isSolana()) ? ae : std::min(ae, MaxArgs); i != e; ++i) {
     CCValAssign &VA = ArgLocs[i];
     SDValue Arg = OutVals[i];
@@ -747,7 +740,7 @@ BPFTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
       assert(false);
     }
   } else if (MF.getFunction().getReturnType()->isAggregateType()) {
-    fail(DL, DAG, "only integer returns supported");
+    fail(DL, DAG, "aggregate returns are not supported");
     return DAG.getNode(Opc, DL, MVT::Other, Chain);
   }
 

llvm/lib/Target/BPF/BPFISelLowering.h

@@ -71,9 +71,6 @@ class BPFTargetLowering : public TargetLowering {
 
   MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
 
-  bool lowerAtomicStoreAsStoreSDNode(const StoreInst &SI) const override;
-  bool lowerAtomicLoadAsLoadSDNode(const LoadInst &LI) const override;
-
 private:
   // Control Instruction Selection Features
   bool HasAlu32;

llvm/lib/Target/BPF/BPFInstrInfo.td

@@ -320,22 +320,27 @@ multiclass ALU<BPFArithOp Opc, int off, string OpcodeStr, SDNode OpNode> {
 
 let Constraints = "$dst = $src2" in {
     let isAsCheapAsAMove = 1 in {
-        defm ADD : ALU<BPF_ADD, "+=", add>;
-        defm SUB : ALU<BPF_SUB, "-=", sub>;
-        defm OR  : ALU<BPF_OR, "|=", or>;
-        defm AND : ALU<BPF_AND, "&=", and>;
-        defm SLL : ALU<BPF_LSH, "<<=", shl>;
-        defm SRL : ALU<BPF_RSH, ">>=", srl>;
-        defm XOR : ALU<BPF_XOR, "^=", xor>;
-        defm SRA : ALU<BPF_ARSH, "s>>=", sra>;
+        defm ADD : ALU<BPF_ADD, 0, "+=", add>;
+        defm SUB : ALU<BPF_SUB, 0, "-=", sub>;
+        defm OR  : ALU<BPF_OR, 0, "|=", or>;
+        defm AND : ALU<BPF_AND, 0, "&=", and>;
+        defm SLL : ALU<BPF_LSH, 0, "<<=", shl>;
+        defm SRL : ALU<BPF_RSH, 0, ">>=", srl>;
+        defm XOR : ALU<BPF_XOR, 0, "^=", xor>;
+        defm SRA : ALU<BPF_ARSH, 0, "s>>=", sra>;
     }
 
-    defm MUL : ALU<BPF_MUL, "*=", mul>;
-    defm DIV : ALU<BPF_DIV, "/=", udiv>;
-    defm MOD : ALU<BPF_MOD, "%=", urem>;
+    defm MUL : ALU<BPF_MUL, 0, "*=", mul>;
+    defm DIV : ALU<BPF_DIV, 0, "/=", udiv>;
+    defm MOD : ALU<BPF_MOD, 0, "%=", urem>;
 
     let Predicates = [BPFSubtargetSolana] in {
-        defm SDIV : ALU<BPF_SDIV, "s/=", sdiv>;
+        defm SDIV_SOL : ALU<BPF_SDIV, 0, "/s=", sdiv>;
+    }
+
+    let Predicates = [BPFHasSdivSmod] in {
+        defm SDIV : ALU<BPF_DIV, 1, "s/=", sdiv>;
+        defm SMOD : ALU<BPF_MOD, 1, "s%=", srem>;
     }
 }
 

llvm/lib/Target/BPF/BPFSubtarget.cpp

@@ -74,6 +74,10 @@ void BPFSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
 
   ParseSubtargetFeatures(CPU, /*TuneCPU*/ CPU, FS);
 
+  if (IsSolana) {
+    report_fatal_error("The Solana target is not supported in BPF. Use SBF instead.");
+  }
+
   if (CPU == "v2") {
     HasJmpExt = true;
   }

llvm/lib/Target/BPF/BPFTargetMachine.cpp

@@ -73,7 +73,7 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT,
                                    const TargetOptions &Options,
                                    std::optional<Reloc::Model> RM,
                                    std::optional<CodeModel::Model> CM,
-                                   CodeGenOpt::Level OL, bool JIT)
+                                   CodeGenOptLevel OL, bool JIT)
     : LLVMTargetMachine(T, computeDataLayout(TT, FS), TT, CPU, FS, Options,
                         getEffectiveRelocModel(RM),
                         getEffectiveCodeModel(CM, CodeModel::Small), OL),

llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp

@@ -26,7 +26,7 @@ namespace {
 
 class BPFAsmBackend : public MCAsmBackend {
 public:
-  BPFAsmBackend(support::endianness Endian, const MCSubtargetInfo &STI)
+  BPFAsmBackend(endianness Endian, const MCSubtargetInfo &STI)
       : MCAsmBackend(Endian),
         isSolana(STI.hasFeature(BPF::FeatureSolana) ||
                  STI.getTargetTriple().getArch() == Triple::sbf),
@@ -139,12 +139,12 @@ MCAsmBackend *llvm::createBPFAsmBackend(const Target &T,
                                         const MCSubtargetInfo &STI,
                                         const MCRegisterInfo &MRI,
                                         const MCTargetOptions &) {
-  return new BPFAsmBackend(support::little, STI);
+  return new BPFAsmBackend(endianness::little, STI);
 }
 
 MCAsmBackend *llvm::createBPFbeAsmBackend(const Target &T,
                                           const MCSubtargetInfo &STI,
                                           const MCRegisterInfo &MRI,
                                           const MCTargetOptions &) {
-  return new BPFAsmBackend(support::big, STI);
+  return new BPFAsmBackend(endianness::big, STI);
 }

llvm/lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp

@@ -28,7 +28,7 @@ class BPFELFObjectWriter : public MCELFObjectTargetWriter {
   unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
                         const MCFixup &Fixup, bool IsPCRel) const override;
 
-  bool needsRelocateWithSymbol(const MCSymbol &Sym,
+  bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
                                unsigned Type) const override;
 private:
   bool isSolana;
@@ -41,7 +41,8 @@ class BPFELFObjectWriter : public MCELFObjectTargetWriter {
 // section relocations with values (offset into the section containing
 // the symbol being relocated).  Forcing a relocation with a symbol
 // will result in the symbol's index being used in the .o file instead.
-bool BPFELFObjectWriter::needsRelocateWithSymbol(const MCSymbol &Sym,
+bool BPFELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
+                                                 const MCSymbol &Sym,
                                                  unsigned Type) const {
   return isSolana;
 }

llvm/lib/Target/SBF/AsmParser/SBFAsmParser.cpp

@@ -40,7 +40,7 @@ class SBFAsmParser : public MCTargetAsmParser {
 
   bool parseRegister(MCRegister &Reg, SMLoc &StartLoc,
                      SMLoc &EndLoc) override;
-  OperandMatchResultTy tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
+  ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
                                         SMLoc &EndLoc) override;
 
   bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
@@ -300,12 +300,12 @@ bool SBFAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
 
 bool SBFAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
                                  SMLoc &EndLoc) {
-  if (tryParseRegister(Reg, StartLoc, EndLoc) != MatchOperand_Success)
+  if (!tryParseRegister(Reg, StartLoc, EndLoc).isSuccess())
     return Error(StartLoc, "invalid register name");
   return false;
 }
 
-OperandMatchResultTy SBFAsmParser::tryParseRegister(MCRegister &Reg,
+ParseStatus SBFAsmParser::tryParseRegister(MCRegister &Reg,
                                                     SMLoc &StartLoc,
                                                     SMLoc &EndLoc) {
   const AsmToken &Tok = getParser().getTok();
@@ -316,10 +316,10 @@ OperandMatchResultTy SBFAsmParser::tryParseRegister(MCRegister &Reg,
 
   if (!MatchRegisterName(Name)) {
     getParser().Lex(); // Eat identifier token.
-    return MatchOperand_Success;
+    return ParseStatus::Success;
   }
 
-  return MatchOperand_NoMatch;
+  return ParseStatus::NoMatch;
 }
 
 OperandMatchResultTy SBFAsmParser::parseRegister(OperandVector &Operands) {

llvm/lib/Target/SBF/BTFDebug.cpp

@@ -977,7 +977,7 @@ std::string BTFDebug::populateFileContent(const DISubprogram *SP) {
   auto File = SP->getFile();
   std::string FileName;
 
-  if (!File->getFilename().startswith("/") && File->getDirectory().size())
+  if (!File->getFilename().starts_with("/") && File->getDirectory().size())
     FileName = File->getDirectory().str() + "/" + File->getFilename().str();
   else
     FileName = std::string(File->getFilename());
@@ -1411,7 +1411,7 @@ void BTFDebug::processGlobals(bool ProcessingMapDef) {
       SecName = Sec->getName();
     }
 
-    if (ProcessingMapDef != SecName.startswith(".maps"))
+    if (ProcessingMapDef != SecName.starts_with(".maps"))
       continue;
 
     // Create a .rodata datasec if the global variable is an initialized
@@ -1437,7 +1437,7 @@ void BTFDebug::processGlobals(bool ProcessingMapDef) {
     DIGlobalVariable *DIGlobal = nullptr;
     for (auto *GVE : GVs) {
       DIGlobal = GVE->getVariable();
-      if (SecName.startswith(".maps"))
+      if (SecName.starts_with(".maps"))
         visitMapDefType(DIGlobal->getType(), GVTypeId);
       else
         visitTypeEntry(DIGlobal->getType(), GVTypeId, false, false);

llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp

@@ -170,6 +170,7 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
 
   uint8_t InstClass = getInstClass(Insn);
   uint8_t InstMode = getInstMode(Insn);
+
   if ((InstClass == SBF_LDX || InstClass == SBF_STX) &&
       getInstSize(Insn) != SBF_DW &&
       (InstMode == SBF_MEM || InstMode == SBF_ATOMIC) &&