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[SOL] Bring upstream BPF changes to SBF
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LucasSte committed Feb 16, 2024
1 parent 67ecf20 commit 7416428
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Showing 23 changed files with 133 additions and 139 deletions.
4 changes: 0 additions & 4 deletions llvm/lib/Target/SBF/AsmParser/SBFAsmParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -46,8 +46,6 @@ class SBFAsmParser : public MCTargetAsmParser {
bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
SMLoc NameLoc, OperandVector &Operands) override;

bool ParseDirective(AsmToken DirectiveID) override;

#define GET_ASSEMBLER_HEADER
#include "SBFGenAsmMatcher.inc"

Expand Down Expand Up @@ -457,8 +455,6 @@ bool SBFAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
return false;
}

bool SBFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; }

extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSBFAsmParser() {
RegisterMCAsmParser<SBFAsmParser> XX(getTheSBFXTarget());
}
2 changes: 1 addition & 1 deletion llvm/lib/Target/SBF/BTFDebug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -983,7 +983,7 @@ std::string BTFDebug::populateFileContent(const DISubprogram *SP) {
FileName = std::string(File->getFilename());

// No need to populate the contends if it has been populated!
if (FileContent.find(FileName) != FileContent.end())
if (FileContent.contains(FileName))
return FileName;

std::vector<std::string> Content;
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/Target/SBF/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ add_llvm_target(SBFCodeGen
Analysis
AsmPrinter
CodeGen
CodeGenTypes
Core
MC
SBFDesc
Expand Down
8 changes: 4 additions & 4 deletions llvm/lib/Target/SBF/Disassembler/SBFDisassembler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -173,11 +173,11 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
if ((InstClass == SBF_LDX || InstClass == SBF_STX) &&
getInstSize(Insn) != SBF_DW &&
(InstMode == SBF_MEM || InstMode == SBF_ATOMIC) &&
STI.getFeatureBits()[SBF::ALU32])
STI.hasFeature(SBF::ALU32))
Result = decodeInstruction(DecoderTableSBFALU3264, Instr, Insn, Address,
this, STI);
else if (isMov32(Insn) && !STI.getFeatureBits()[SBF::ALU32] &&
STI.getFeatureBits()[SBF::FeatureDisableLddw])
else if (isMov32(Insn) && !STI.hasFeature(SBF::ALU32) &&
STI.hasFeature(SBF::FeatureDisableLddw))
Result =
decodeInstruction(DecoderTableSBFv264, Instr, Insn, Address, this, STI);
else
Expand Down Expand Up @@ -206,7 +206,7 @@ DecodeStatus SBFDisassembler::getInstruction(MCInst &Instr, uint64_t &Size,
break;
}
case SBF::JALX: {
if (STI.getFeatureBits()[SBF::FeatureCallxRegSrc]) {
if (STI.hasFeature(SBF::FeatureCallxRegSrc)) {
Result = decodeInstruction(DecoderTableSBFv264, Instr, Insn, Address,
this, STI);
}
Expand Down
18 changes: 10 additions & 8 deletions llvm/lib/Target/SBF/MCTargetDesc/SBFMCCodeEmitter.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -58,7 +58,7 @@ class SBFMCCodeEmitter : public MCCodeEmitter {
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;

void encodeInstruction(const MCInst &MI, raw_ostream &OS,
void encodeInstruction(const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
};
Expand Down Expand Up @@ -111,20 +111,22 @@ static uint8_t SwapBits(uint8_t Val) {
return (Val & 0x0F) << 4 | (Val & 0xF0) >> 4;
}

void SBFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
void SBFMCCodeEmitter::encodeInstruction(const MCInst &MI,
SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode();
raw_svector_ostream OS(CB);
support::endian::Writer OSE(OS,
IsLittleEndian ? support::little : support::big);

if (Opcode == SBF::LD_imm64 || Opcode == SBF::LD_pseudo) {
uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
OS << char(Value >> 56);
CB.push_back(Value >> 56);
if (IsLittleEndian)
OS << char((Value >> 48) & 0xff);
CB.push_back((Value >> 48) & 0xff);
else
OS << char(SwapBits((Value >> 48) & 0xff));
CB.push_back(SwapBits((Value >> 48) & 0xff));
OSE.write<uint16_t>(0);
OSE.write<uint32_t>(Value & 0xffffFFFF);

Expand All @@ -137,11 +139,11 @@ void SBFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
} else {
// Get instruction encoding and emit it
uint64_t Value = getBinaryCodeForInstr(MI, Fixups, STI);
OS << char(Value >> 56);
CB.push_back(Value >> 56);
if (IsLittleEndian)
OS << char((Value >> 48) & 0xff);
CB.push_back((Value >> 48) & 0xff);
else
OS << char(SwapBits((Value >> 48) & 0xff));
CB.push_back(SwapBits((Value >> 48) & 0xff));
OSE.write<uint16_t>((Value >> 32) & 0xffff);
OSE.write<uint32_t>(Value & 0xffffFFFF);
}
Expand Down
8 changes: 0 additions & 8 deletions llvm/lib/Target/SBF/SBF.h
Original file line number Diff line number Diff line change
Expand Up @@ -18,30 +18,22 @@ namespace llvm {
class SBFTargetMachine;
class PassRegistry;

ModulePass *createSBFAdjustOpt();
ModulePass *createSBFCheckAndAdjustIR();

FunctionPass *createSBFAbstractMemberAccess(SBFTargetMachine *TM);
FunctionPass *createSBFPreserveDIType();
FunctionPass *createSBFIRPeephole();
FunctionPass *createSBFISelDag(SBFTargetMachine &TM);
FunctionPass *createSBFMISimplifyPatchablePass();
FunctionPass *createSBFMIPeepholePass();
FunctionPass *createSBFMIPeepholeTruncElimPass();
FunctionPass *createSBFMIPreEmitPeepholePass();
FunctionPass *createSBFMIPreEmitCheckingPass();

void initializeSBFAbstractMemberAccessLegacyPassPass(PassRegistry &);
void initializeSBFAdjustOptPass(PassRegistry&);
void initializeSBFCheckAndAdjustIRPass(PassRegistry&);
void initializeSBFDAGToDAGISelPass(PassRegistry &);
void initializeSBFIRPeepholePass(PassRegistry &);
void initializeSBFMIPeepholePass(PassRegistry&);
void initializeSBFMIPeepholeTruncElimPass(PassRegistry &);
void initializeSBFMIPreEmitCheckingPass(PassRegistry&);
void initializeSBFMIPreEmitPeepholePass(PassRegistry &);
void initializeSBFMISimplifyPatchablePass(PassRegistry &);
void initializeSBFPreserveDITypePass(PassRegistry &);

class SBFAbstractMemberAccessPass
: public PassInfoMixin<SBFAbstractMemberAccessPass> {
Expand Down
26 changes: 0 additions & 26 deletions llvm/lib/Target/SBF/SBFAbstractMemberAccess.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -188,34 +188,8 @@ class SBFAbstractMemberAccess final {

std::map<std::string, GlobalVariable *> SBFAbstractMemberAccess::GEPGlobals;

class SBFAbstractMemberAccessLegacyPass final : public FunctionPass {
SBFTargetMachine *TM;

bool runOnFunction(Function &F) override {
return SBFAbstractMemberAccess(TM).run(F);
}

public:
static char ID;

// Add optional SBFTargetMachine parameter so that SBF backend can add the
// phase with target machine to find out the endianness. The default
// constructor (without parameters) is used by the pass manager for managing
// purposes.
SBFAbstractMemberAccessLegacyPass(SBFTargetMachine *TM = nullptr)
: FunctionPass(ID), TM(TM) {}
};

} // End anonymous namespace

char SBFAbstractMemberAccessLegacyPass::ID = 0;
INITIALIZE_PASS(SBFAbstractMemberAccessLegacyPass, DEBUG_TYPE,
"SBF Abstract Member Access", false, false)

FunctionPass *llvm::createSBFAbstractMemberAccess(SBFTargetMachine *TM) {
return new SBFAbstractMemberAccessLegacyPass(TM);
}

bool SBFAbstractMemberAccess::run(Function &F) {
LLVM_DEBUG(dbgs() << "********** Abstract Member Accesses **********\n");

Expand Down
16 changes: 0 additions & 16 deletions llvm/lib/Target/SBF/SBFAdjustOpt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -41,14 +41,6 @@ static cl::opt<bool> DisableSBFavoidSpeculation(

namespace {

class SBFAdjustOpt final : public ModulePass {
public:
static char ID;

SBFAdjustOpt() : ModulePass(ID) {}
bool runOnModule(Module &M) override;
};

class SBFAdjustOptImpl {
struct PassThroughInfo {
Instruction *Input;
Expand Down Expand Up @@ -78,14 +70,6 @@ class SBFAdjustOptImpl {

} // End anonymous namespace

char SBFAdjustOpt::ID = 0;
INITIALIZE_PASS(SBFAdjustOpt, "sbf-adjust-opt", "SBF Adjust Optimization",
false, false)

ModulePass *llvm::createSBFAdjustOpt() { return new SBFAdjustOpt(); }

bool SBFAdjustOpt::runOnModule(Module &M) { return SBFAdjustOptImpl(&M).run(); }

bool SBFAdjustOptImpl::run() {
bool Changed = adjustICmpToBuiltin();

Expand Down
15 changes: 0 additions & 15 deletions llvm/lib/Target/SBF/SBFIRPeephole.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -94,23 +94,8 @@ static bool SBFIRPeepholeImpl(Function &F) {

return Changed;
}

class SBFIRPeephole final : public FunctionPass {
bool runOnFunction(Function &F) override;

public:
static char ID;
SBFIRPeephole() : FunctionPass(ID) {}
};
} // End anonymous namespace

char SBFIRPeephole::ID = 0;
INITIALIZE_PASS(SBFIRPeephole, DEBUG_TYPE, "SBF IR Peephole", false, false)

FunctionPass *llvm::createSBFIRPeephole() { return new SBFIRPeephole(); }

bool SBFIRPeephole::runOnFunction(Function &F) { return SBFIRPeepholeImpl(F); }

PreservedAnalyses SBFIRPeepholePass::run(Function &F,
FunctionAnalysisManager &AM) {
return SBFIRPeepholeImpl(F) ? PreservedAnalyses::none()
Expand Down
3 changes: 1 addition & 2 deletions llvm/lib/Target/SBF/SBFISelDAGToDAG.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -77,7 +77,6 @@ class SBFDAGToDAGISel : public SelectionDAGISel {

// Node preprocessing cases
void PreprocessLoad(SDNode *Node, SelectionDAG::allnodes_iterator &I);
void PreprocessCopyToReg(SDNode *Node);
void PreprocessTrunc(SDNode *Node, SelectionDAG::allnodes_iterator &I);

// Find constants from a constant structure
Expand Down Expand Up @@ -172,7 +171,7 @@ bool SBFDAGToDAGISel::SelectInlineAsmMemoryOperand(
}

SDLoc DL(Op);
SDValue AluOp = CurDAG->getTargetConstant(ISD::ADD, DL, MVT::i32);;
SDValue AluOp = CurDAG->getTargetConstant(ISD::ADD, DL, MVT::i32);
OutOps.push_back(Op0);
OutOps.push_back(Op1);
OutOps.push_back(AluOp);
Expand Down
40 changes: 21 additions & 19 deletions llvm/lib/Target/SBF/SBFISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -588,7 +588,7 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
llvm_unreachable("call arg pass bug");
}

SDValue InFlag;
SDValue InGlue;

if (HasStackArgs) {
SDValue FramePtr = DAG.getCopyFromReg(Chain,
Expand Down Expand Up @@ -634,16 +634,16 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
// Pass the current stack frame pointer via SBF::R5, gluing the
// instruction to instructions passing the first 4 arguments in
// registers below.
Chain = DAG.getCopyToReg(Chain, CLI.DL, SBF::R5, FramePtr, InFlag);
InFlag = Chain.getValue(1);
Chain = DAG.getCopyToReg(Chain, CLI.DL, SBF::R5, FramePtr, InGlue);
InGlue = Chain.getValue(1);
}

// Build a sequence of copy-to-reg nodes chained together with token chain and
// flag operands which copy the outgoing args into registers. The InFlag is
// flag operands which copy the outgoing args into registers. The InGlue is
// necessary since all emitted instructions must be stuck together.
for (auto &Reg : RegsToPass) {
Chain = DAG.getCopyToReg(Chain, CLI.DL, Reg.first, Reg.second, InFlag);
InFlag = Chain.getValue(1);
Chain = DAG.getCopyToReg(Chain, CLI.DL, Reg.first, Reg.second, InGlue);
InGlue = Chain.getValue(1);
}

// If the callee is a GlobalAddress node (quite common, every direct call is)
Expand Down Expand Up @@ -677,19 +677,21 @@ SDValue SBFTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
Ops.push_back(DAG.getRegister(SBF::R5, MVT::i64));
}

if (InFlag.getNode())
Ops.push_back(InFlag);
if (InGlue.getNode())
Ops.push_back(InGlue);

Chain = DAG.getNode(SBFISD::CALL, CLI.DL, NodeTys, Ops);
InFlag = Chain.getValue(1);
InGlue = Chain.getValue(1);

DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge);

// Create the CALLSEQ_END node.
Chain = DAG.getCALLSEQ_END(Chain, NumBytes, 0, InFlag, CLI.DL);
InFlag = Chain.getValue(1);
Chain = DAG.getCALLSEQ_END(Chain, NumBytes, 0, InGlue, CLI.DL);
InGlue = Chain.getValue(1);

// Handle result values, copying them out of physregs into vregs that we
// return.
return LowerCallResult(Chain, InFlag, CallConv, IsVarArg, Ins, CLI.DL, DAG,
return LowerCallResult(Chain, InGlue, CallConv, IsVarArg, Ins, CLI.DL, DAG,
InVals);
}

Expand All @@ -715,7 +717,7 @@ SBFTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<SDValue> &OutVals,
const SDLoc &DL, SelectionDAG &DAG) const {
unsigned Opc = SBFISD::RET_FLAG;
unsigned Opc = SBFISD::RET_GLUE;

// CCValAssign - represent the assignment of the return value to a location
SmallVector<CCValAssign, 16> RVLocs;
Expand Down Expand Up @@ -763,7 +765,7 @@ SBFTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
}

SDValue SBFTargetLowering::LowerCallResult(
SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg,
SDValue Chain, SDValue InGlue, CallingConv::ID CallConv, bool IsVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &DL,
SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {

Expand All @@ -781,16 +783,16 @@ SDValue SBFTargetLowering::LowerCallResult(
fail(DL, DAG, "only small returns supported");
for (unsigned i = 0, e = Ins.size(); i != e; ++i)
InVals.push_back(DAG.getConstant(0, DL, Ins[i].VT));
return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InFlag).getValue(1);
return DAG.getCopyFromReg(Chain, DL, 1, Ins[0].VT, InGlue).getValue(1);
}

CCInfo.AnalyzeCallResult(Ins, getHasAlu32() ? RetCC_SBF32 : RetCC_SBF64);

// Copy all of the result registers out of their specified physreg.
for (auto &Val : RVLocs) {
Chain = DAG.getCopyFromReg(Chain, DL, Val.getLocReg(),
Val.getValVT(), InFlag).getValue(1);
InFlag = Chain.getValue(2);
Val.getValVT(), InGlue).getValue(1);
InGlue = Chain.getValue(2);
InVals.push_back(Chain.getValue(0));
}

Expand Down Expand Up @@ -956,8 +958,8 @@ const char *SBFTargetLowering::getTargetNodeName(unsigned Opcode) const {
switch ((SBFISD::NodeType)Opcode) {
case SBFISD::FIRST_NUMBER:
break;
case SBFISD::RET_FLAG:
return "SBFISD::RET_FLAG";
case SBFISD::RET_GLUE:
return "SBFISD::RET_GLUE";
case SBFISD::CALL:
return "SBFISD::CALL";
case SBFISD::SELECT_CC:
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/SBF/SBFISelLowering.h
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ class SBFSubtarget;
namespace SBFISD {
enum NodeType : unsigned {
FIRST_NUMBER = ISD::BUILTIN_OP_END,
RET_FLAG,
RET_GLUE,
CALL,
SELECT_CC,
BR_CC,
Expand Down Expand Up @@ -84,7 +84,7 @@ class SBFTargetLowering : public TargetLowering {
SDValue LowerATOMICRMW(SDValue Op, SelectionDAG &DAG) const;

// Lower the result values of a call, copying them out of physregs into vregs
SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
SDValue LowerCallResult(SDValue Chain, SDValue InGlue,
CallingConv::ID CallConv, bool IsVarArg,
const SmallVectorImpl<ISD::InputArg> &Ins,
const SDLoc &DL, SelectionDAG &DAG,
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/SBF/SBFInstrInfo.td
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ def SDT_SBFMEMCPY : SDTypeProfile<0, 4, [SDTCisVT<0, i64>,
def SBFcall : SDNode<"SBFISD::CALL", SDT_SBFCall,
[SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
SDNPVariadic]>;
def SBFretflag : SDNode<"SBFISD::RET_FLAG", SDTNone,
def SBFretglue : SDNode<"SBFISD::RET_GLUE", SDTNone,
[SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>;
def SBFcallseq_start: SDNode<"ISD::CALLSEQ_START", SDT_SBFCallSeqStart,
[SDNPHasChain, SDNPOutGlue]>;
Expand Down Expand Up @@ -609,7 +609,7 @@ class RET<string OpcodeStr>
(outs),
(ins),
!strconcat(OpcodeStr, ""),
[(SBFretflag)]> {
[(SBFretglue)]> {
let Inst{31-0} = 0;
let SBFClass = SBF_JMP;
}
Expand Down
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