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@LucasSte
LucasSte committed Nov 25, 2024
1 parent 5ab5a54 commit 840a96c
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31 changes: 19 additions & 12 deletions llvm/lib/Target/SBF/SBFInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -415,19 +415,19 @@ def MOV_ri_32 : MATH_RI<SBF_ALU, SBF_MOV,
"mov32 $dst, $imm",
[(set GPR32:$dst, (i32 i32immSExt32:$imm))]>;

def MOV_rr_32_no_sext_v1 : MATH_RR<SBF_ALU, SBF_MOV,
(outs GPR32:$dst),
(ins GPR32:$src),
"mov32 $dst, $src",
[]>, Requires<[SBFNoExplicitSignExt]>;

let Predicates = [SBFExplicitSignExt], DecoderNamespace = "SBFv2" in {
def MOV_rr_32_no_sext_v2 : MATH_RR<SBF_ALU64, SBF_MOV,
(outs GPR32:$dst),
(ins GPR32:$src),
"mov64 $dst, $src",
[]>;
}

def MOV_rr_32_no_sext_v1 : MATH_RR<SBF_ALU, SBF_MOV,
(outs GPR32:$dst),
(ins GPR32:$src),
"mov32 $dst, $src",
[]>, Requires<[SBFNoExplicitSignExt]>;
}

def FI_ri
Expand Down Expand Up @@ -948,10 +948,13 @@ let Constraints = "$dst = $src" in {
}
}

let isCodeGenOnly = 1 in {
let DecoderNamespace = "SBFv2" in {
def MOV_32_64 : MATH_RR<SBF_ALU, SBF_MOV,
(outs GPR:$dst), (ins GPR32:$src),
"mov32 $dst, $src", []>;
}

let isCodeGenOnly = 1 in {
def MOV_32_64_addr : MATH_RI<SBF_ALU, SBF_MOV,
(outs GPR:$dst), (ins u64imm:$imm),
"mov32 $dst, $imm", []>, Requires<[SBFNoLddw]>;
Expand Down Expand Up @@ -982,15 +985,15 @@ def : Pat<(SBFWrapper tglobaladdr:$in),
def : Pat<(i64 (sext GPR32:$src)),
(MOV_32_64 GPR32:$src)>, Requires<[SBFExplicitSignExt]>;

// SBFv2 zero extension
def : Pat<(i64 (zext GPR32:$src)), (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
GPR32:$src, sub_32)>, Requires<[SBFExplicitSignExt]>;

// SBFv1 sign extension
def : Pat<(i64 (sext GPR32:$src)),
(SRA_ri (SLL_ri (MOV_32_64 GPR32:$src), 32), 32)>,
Requires<[SBFNoExplicitSignExt]>;

// SBFv2 zero extension
def : Pat<(i64 (zext GPR32:$src)), (INSERT_SUBREG (i64 (IMPLICIT_DEF)),
GPR32:$src, sub_32)>, Requires<[SBFExplicitSignExt]>;

// SBFv1 zero extension
def : Pat<(i64 (zext GPR32:$src)), (MOV_32_64 GPR32:$src)>,
Requires<[SBFNoExplicitSignExt]>;
Expand All @@ -1004,9 +1007,13 @@ def : Pat<(i32 (trunc GPR:$src)),
def : Pat<(i32 (trunc GPR:$src)),
(i32 (EXTRACT_SUBREG GPR:$src, sub_32))>, Requires<[SBFNoExplicitSignExt]>;

// SBFv2 anyext
def : Pat<(i64 (anyext GPR32:$src)),
(MOV_32_64 GPR32:$src)>, Requires<[SBFExplicitSignExt]>;

// SBFv1 anyext
def : Pat<(i64 (anyext GPR32:$src)),
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32)>;
(INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32)>, Requires<[SBFNoExplicitSignExt]>;

class STORE32<SBFWidthModifer SizeOp, string Mnemonic, list<dag> Pattern>
: TYPE_LD_ST<SBF_MEM.Value, SizeOp.Value,
Expand Down
110 changes: 110 additions & 0 deletions llvm/test/CodeGen/SBF/explicit-sign-ext.ll
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Original file line number Diff line number Diff line change
@@ -0,0 +1,110 @@
; RUN: llc -march=sbf -mattr=+alu32 < %s | FileCheck --check-prefixes=CHECK-v1,CHECK %s
; RUN: llc -march=sbf -mattr=+alu32,+explicit-sext < %s | FileCheck --check-prefixes=CHECK-v2,CHECK %s


define dso_local i64 @my_sext(i32 %a) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: my_sext
%res = sext i32 %a to i64

; CHECK-v1: mov32 r0, w1
; CHECK-v1: lsh64 r0, 32
; CHECK-v1: arsh64 r0, 32

; CHECK-v2: mov32 r0, w1
ret i64 %res
}

define dso_local i64 @my_zext(i32 %a) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: my_zext
%res = zext i32 %a to i64

; CHECK-v1: mov32 r0, w1
; CHECK-v2: mov64 w0, w1

ret i64 %res
}

define dso_local i32 @my_trunc(i64 %a) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: my_trunc
%res = trunc i64 %a to i32

; CHECK-v1: mov64 r0, r1
; CHECK-v2: mov64 r0, r1
; CHECK-v2: and32 w0, -1
ret i32 %res
}

define dso_local i32 @copy_phys(i32 %a) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: copy_phys
%res = add i32 %a, 2
%b = sub i32 %res, 5
; CHECK-v1: mov32 w0, w1
; CHECK-v2: mov64 w0, w1
ret i32 %b
}

define dso_local i32 @select_cc_imm(i32 %a, i32 %c, i32 %d) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: select_cc_imm
%cmp = icmp sgt i32 %a, 10
; CHECK-v1: mov32 w0, w2
; CHECK-v2: mov64 w0, w2

; CHECK-v1: mov32 r1, w1
; CHECK-v1: lsh64 r1, 32
; CHECK-v1: arsh64 r1, 32
; CHECK-v2: mov32 r1, w1

%c.d = select i1 %cmp, i32 %c, i32 %d
; CHECK-v1: mov32 w0, w3
; CHECK-v2: mov64 w0, w3

ret i32 %c.d
}

define dso_local i32 @select_cc_reg(i32 %a, i32 %b, i32 %c, i32 %d) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: select_cc_reg
%cmp = icmp sgt i32 %a, %b
; CHECK-v1: mov32 w0, w3
; CHECK-v2: mov64 w0, w3

; CHECK-v1: mov32 r1, w1
; CHECK-v1: lsh64 r1, 32
; CHECK-v1: arsh64 r1, 32
; CHECK-v2: mov32 r1, w1

; CHECK-v1: mov32 r2, w2
; CHECK-v1: lsh64 r2, 32
; CHECK-v1: arsh64 r2, 32
; CHECK-v2: mov32 r2, w2

%c.d = select i1 %cmp, i32 %c, i32 %d
; CHECK-v1: mov32 w0, w4
; CHECK-v2: mov64 w0, w4
ret i32 %c.d
}

define dso_local i64 @select_cc_imm_64(i32 %a, i64 %c, i64 %d) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: select_cc_imm_64
; CHECK-v1: mov64 r0, r2
%cmp = icmp sgt i32 %a, 10
%c.d = select i1 %cmp, i64 %c, i64 %d
; CHECK: mov64 r0, r3
ret i64 %c.d
}

define dso_local i64 @select_cc_reg_64(i32 %a, i32 %b, i64 %c, i64 %d) local_unnamed_addr #0 {
entry:
; CHECK-LABEL: select_cc_reg_64
; CHECK: mov64 r0, r3
%cmp = icmp sgt i32 %a, %b
%c.d = select i1 %cmp, i64 %c, i64 %d
; CHECK: mov64 r0, r4
ret i64 %c.d
}
8 changes: 8 additions & 0 deletions llvm/test/MC/SBF/sbf-alu.s
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Original file line number Diff line number Diff line change
Expand Up @@ -291,6 +291,10 @@ mov64 r0, r9
# CHECK-ASM-NEW: encoding: [0xbf,0x23,0x00,0x00,0x00,0x00,0x00,0x00]
mov64 r3, r2

# CHECK-OBJ-NEW: mov64 r3, r2
# CHECK-ASM-NEW: encoding: [0xbf,0x23,0x00,0x00,0x00,0x00,0x00,0x00]
mov64 w3, w2

# CHECK-OBJ-NEW: mov64 r3, 0x7b
# CHECK-ASM-NEW: encoding: [0xb7,0x03,0x00,0x00,0x7b,0x00,0x00,0x00]
mov64 r3, 123
Expand All @@ -303,6 +307,10 @@ mov64 r5, -123
# CHECK-ASM-NEW: encoding: [0xbc,0x26,0x00,0x00,0x00,0x00,0x00,0x00]
mov32 w6, w2

# CHECK-OBJ-NEW: mov32 w6, w2
# CHECK-ASM-NEW: encoding: [0xbc,0x26,0x00,0x00,0x00,0x00,0x00,0x00]
mov32 r6, w2

# CHECK-OBJ-NEW: mov32 w5, -0x7b
# CHECK-ASM-NEW: encoding: [0xb4,0x05,0x00,0x00,0x85,0xff,0xff,0xff]
mov32 w5, -123
Expand Down

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